1 //=======- NVPTXFrameLowering.cpp - NVPTX Frame Information ---*- C++ -*-=====//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the NVPTX implementation of TargetFrameLowering class.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "NVPTXFrameLowering.h"
15 #include "NVPTX.h"
16 #include "NVPTXRegisterInfo.h"
17 #include "NVPTXSubtarget.h"
18 #include "NVPTXTargetMachine.h"
19 #include "llvm/ADT/BitVector.h"
20 #include "llvm/CodeGen/MachineFrameInfo.h"
21 #include "llvm/CodeGen/MachineFunction.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineRegisterInfo.h"
24 #include "llvm/MC/MachineLocation.h"
25 #include "llvm/Target/TargetInstrInfo.h"
26 
27 using namespace llvm;
28 
29 NVPTXFrameLowering::NVPTXFrameLowering()
30     : TargetFrameLowering(TargetFrameLowering::StackGrowsUp, 8, 0) {}
31 
32 bool NVPTXFrameLowering::hasFP(const MachineFunction &MF) const { return true; }
33 
34 void NVPTXFrameLowering::emitPrologue(MachineFunction &MF,
35                                       MachineBasicBlock &MBB) const {
36   if (MF.getFrameInfo()->hasStackObjects()) {
37     assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported");
38     MachineInstr *MI = MBB.begin();
39     MachineRegisterInfo &MR = MF.getRegInfo();
40 
41     // This instruction really occurs before first instruction
42     // in the BB, so giving it no debug location.
43     DebugLoc dl = DebugLoc();
44 
45     // Emits
46     //   mov %SPL, %depot;
47     //   cvta.local %SP, %SPL;
48     // for local address accesses in MF.
49     bool Is64Bit =
50         static_cast<const NVPTXTargetMachine &>(MF.getTarget()).is64Bit();
51     unsigned CvtaLocalOpcode =
52         (Is64Bit ? NVPTX::cvta_local_yes_64 : NVPTX::cvta_local_yes);
53     unsigned MovDepotOpcode =
54         (Is64Bit ? NVPTX::MOV_DEPOT_ADDR_64 : NVPTX::MOV_DEPOT_ADDR);
55     if (!MR.use_empty(NVPTX::VRFrame)) {
56       // If %SP is not used, do not bother emitting "cvta.local %SP, %SPL".
57       MI = BuildMI(MBB, MI, dl,
58                    MF.getSubtarget().getInstrInfo()->get(CvtaLocalOpcode),
59                    NVPTX::VRFrame)
60                .addReg(NVPTX::VRFrameLocal);
61     }
62     BuildMI(MBB, MI, dl, MF.getSubtarget().getInstrInfo()->get(MovDepotOpcode),
63             NVPTX::VRFrameLocal)
64         .addImm(MF.getFunctionNumber());
65   }
66 }
67 
68 void NVPTXFrameLowering::emitEpilogue(MachineFunction &MF,
69                                       MachineBasicBlock &MBB) const {}
70 
71 // This function eliminates ADJCALLSTACKDOWN,
72 // ADJCALLSTACKUP pseudo instructions
73 void NVPTXFrameLowering::eliminateCallFramePseudoInstr(
74     MachineFunction &MF, MachineBasicBlock &MBB,
75     MachineBasicBlock::iterator I) const {
76   // Simply discard ADJCALLSTACKDOWN,
77   // ADJCALLSTACKUP instructions.
78   MBB.erase(I);
79 }
80