1 //===-- MipsTargetMachine.h - Define TargetMachine for Mips -----*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file declares the Mips specific subclass of TargetMachine.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_MIPS_MIPSTARGETMACHINE_H
15 #define LLVM_LIB_TARGET_MIPS_MIPSTARGETMACHINE_H
16 
17 #include "MipsSubtarget.h"
18 #include "llvm/CodeGen/Passes.h"
19 #include "llvm/CodeGen/SelectionDAGISel.h"
20 #include "llvm/Target/TargetFrameLowering.h"
21 #include "llvm/Target/TargetMachine.h"
22 
23 namespace llvm {
24 class formatted_raw_ostream;
25 class MipsRegisterInfo;
26 
27 class MipsTargetMachine : public LLVMTargetMachine {
28   bool isLittle;
29   MipsSubtarget *Subtarget;
30   MipsSubtarget DefaultSubtarget;
31   MipsSubtarget NoMips16Subtarget;
32   MipsSubtarget Mips16Subtarget;
33 
34   mutable StringMap<std::unique_ptr<MipsSubtarget>> SubtargetMap;
35 
36 public:
37   MipsTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS,
38                     const TargetOptions &Options, Reloc::Model RM,
39                     CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle);
40 
41   virtual ~MipsTargetMachine() {}
42 
43   void addAnalysisPasses(PassManagerBase &PM) override;
44 
45   const MipsSubtarget *getSubtargetImpl() const override {
46     if (Subtarget)
47       return Subtarget;
48     return &DefaultSubtarget;
49   }
50 
51   const MipsSubtarget *getSubtargetImpl(const Function &F) const override;
52 
53   /// \brief Reset the subtarget for the Mips target.
54   void resetSubtarget(MachineFunction *MF);
55 
56   // Pass Pipeline Configuration
57   TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
58 };
59 
60 /// MipsebTargetMachine - Mips32/64 big endian target machine.
61 ///
62 class MipsebTargetMachine : public MipsTargetMachine {
63   virtual void anchor();
64 public:
65   MipsebTargetMachine(const Target &T, StringRef TT,
66                       StringRef CPU, StringRef FS, const TargetOptions &Options,
67                       Reloc::Model RM, CodeModel::Model CM,
68                       CodeGenOpt::Level OL);
69 };
70 
71 /// MipselTargetMachine - Mips32/64 little endian target machine.
72 ///
73 class MipselTargetMachine : public MipsTargetMachine {
74   virtual void anchor();
75 public:
76   MipselTargetMachine(const Target &T, StringRef TT,
77                       StringRef CPU, StringRef FS, const TargetOptions &Options,
78                       Reloc::Model RM, CodeModel::Model CM,
79                       CodeGenOpt::Level OL);
80 };
81 
82 } // End llvm namespace
83 
84 #endif
85