1 //===-- MipsTargetMachine.h - Define TargetMachine for Mips -----*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file declares the Mips specific subclass of TargetMachine.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef MIPSTARGETMACHINE_H
15 #define MIPSTARGETMACHINE_H
16 
17 #include "MipsFrameLowering.h"
18 #include "MipsISelLowering.h"
19 #include "MipsInstrInfo.h"
20 #include "MipsJITInfo.h"
21 #include "MipsSelectionDAGInfo.h"
22 #include "MipsSubtarget.h"
23 #include "llvm/CodeGen/Passes.h"
24 #include "llvm/CodeGen/SelectionDAGISel.h"
25 #include "llvm/IR/DataLayout.h"
26 #include "llvm/Target/TargetFrameLowering.h"
27 #include "llvm/Target/TargetMachine.h"
28 
29 namespace llvm {
30 class formatted_raw_ostream;
31 class MipsRegisterInfo;
32 
33 class MipsTargetMachine : public LLVMTargetMachine {
34   MipsSubtarget       Subtarget;
35   const DataLayout    DL; // Calculates type size & alignment
36   std::unique_ptr<const MipsInstrInfo> InstrInfo;
37   std::unique_ptr<const MipsFrameLowering> FrameLowering;
38   std::unique_ptr<const MipsTargetLowering> TLInfo;
39   std::unique_ptr<const MipsInstrInfo> InstrInfo16;
40   std::unique_ptr<const MipsFrameLowering> FrameLowering16;
41   std::unique_ptr<const MipsTargetLowering> TLInfo16;
42   std::unique_ptr<const MipsInstrInfo> InstrInfoSE;
43   std::unique_ptr<const MipsFrameLowering> FrameLoweringSE;
44   std::unique_ptr<const MipsTargetLowering> TLInfoSE;
45   MipsSelectionDAGInfo TSInfo;
46   const InstrItineraryData &InstrItins;
47   MipsJITInfo JITInfo;
48 
49 public:
50   MipsTargetMachine(const Target &T, StringRef TT,
51                     StringRef CPU, StringRef FS, const TargetOptions &Options,
52                     Reloc::Model RM, CodeModel::Model CM,
53                     CodeGenOpt::Level OL,
54                     bool isLittle);
55 
56   virtual ~MipsTargetMachine() {}
57 
58   virtual void addAnalysisPasses(PassManagerBase &PM);
59 
60   virtual const MipsInstrInfo *getInstrInfo() const
61   { return InstrInfo.get(); }
62   virtual const TargetFrameLowering *getFrameLowering() const
63   { return FrameLowering.get(); }
64   virtual const MipsSubtarget *getSubtargetImpl() const
65   { return &Subtarget; }
66   virtual const DataLayout *getDataLayout()    const
67   { return &DL;}
68 
69   virtual const InstrItineraryData *getInstrItineraryData() const {
70     return Subtarget.inMips16Mode() ? 0 : &InstrItins;
71   }
72 
73   virtual MipsJITInfo *getJITInfo()
74   { return &JITInfo; }
75 
76   virtual const MipsRegisterInfo *getRegisterInfo()  const {
77     return &InstrInfo->getRegisterInfo();
78   }
79 
80   virtual const MipsTargetLowering *getTargetLowering() const {
81     return TLInfo.get();
82   }
83 
84   virtual const MipsSelectionDAGInfo* getSelectionDAGInfo() const {
85     return &TSInfo;
86   }
87 
88   // Pass Pipeline Configuration
89   virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
90   virtual bool addCodeEmitter(PassManagerBase &PM, JITCodeEmitter &JCE);
91 
92   // Set helper classes
93   void setHelperClassesMips16();
94 
95   void setHelperClassesMipsSE();
96 
97 
98 };
99 
100 /// MipsebTargetMachine - Mips32/64 big endian target machine.
101 ///
102 class MipsebTargetMachine : public MipsTargetMachine {
103   virtual void anchor();
104 public:
105   MipsebTargetMachine(const Target &T, StringRef TT,
106                       StringRef CPU, StringRef FS, const TargetOptions &Options,
107                       Reloc::Model RM, CodeModel::Model CM,
108                       CodeGenOpt::Level OL);
109 };
110 
111 /// MipselTargetMachine - Mips32/64 little endian target machine.
112 ///
113 class MipselTargetMachine : public MipsTargetMachine {
114   virtual void anchor();
115 public:
116   MipselTargetMachine(const Target &T, StringRef TT,
117                       StringRef CPU, StringRef FS, const TargetOptions &Options,
118                       Reloc::Model RM, CodeModel::Model CM,
119                       CodeGenOpt::Level OL);
120 };
121 
122 } // End llvm namespace
123 
124 #endif
125