1 //===-- MipsTargetMachine.cpp - Define TargetMachine for Mips -------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // Implements the info about Mips target spec.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "Mips.h"
15 #include "MipsMCAsmInfo.h"
16 #include "MipsTargetMachine.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/Target/TargetRegistry.h"
19 using namespace llvm;
20 
21 extern "C" void LLVMInitializeMipsTarget() {
22   // Register the target.
23   RegisterTargetMachine<MipsTargetMachine> X(TheMipsTarget);
24   RegisterTargetMachine<MipselTargetMachine> Y(TheMipselTarget);
25   RegisterAsmInfo<MipsMCAsmInfo> A(TheMipsTarget);
26   RegisterAsmInfo<MipsMCAsmInfo> B(TheMipselTarget);
27 }
28 
29 // DataLayout --> Big-endian, 32-bit pointer/ABI/alignment
30 // The stack is always 8 byte aligned
31 // On function prologue, the stack is created by decrementing
32 // its pointer. Once decremented, all references are done with positive
33 // offset from the stack/frame pointer, using StackGrowsUp enables
34 // an easier handling.
35 // Using CodeModel::Large enables different CALL behavior.
36 MipsTargetMachine::
37 MipsTargetMachine(const Target &T, const std::string &TT, const std::string &FS,
38                   bool isLittle=false):
39   LLVMTargetMachine(T, TT),
40   Subtarget(TT, FS, isLittle),
41   DataLayout(isLittle ?
42              std::string("e-p:32:32:32-i8:8:32-i16:16:32-i64:64:64-n32") :
43              std::string("E-p:32:32:32-i8:8:32-i16:16:32-i64:64:64-n32")),
44   InstrInfo(*this),
45   FrameLowering(Subtarget),
46   TLInfo(*this), TSInfo(*this) {
47   // Abicall enables PIC by default
48   if (getRelocationModel() == Reloc::Default) {
49     if (Subtarget.isABI_O32())
50       setRelocationModel(Reloc::PIC_);
51     else
52       setRelocationModel(Reloc::Static);
53   }
54 }
55 
56 MipselTargetMachine::
57 MipselTargetMachine(const Target &T, const std::string &TT,
58                     const std::string &FS) :
59   MipsTargetMachine(T, TT, FS, true) {}
60 
61 // Install an instruction selector pass using
62 // the ISelDag to gen Mips code.
63 bool MipsTargetMachine::
64 addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel)
65 {
66   PM.add(createMipsISelDag(*this));
67   return false;
68 }
69 
70 // Implemented by targets that want to run passes immediately before
71 // machine code is emitted. return true if -print-machineinstrs should
72 // print out the code after the passes.
73 bool MipsTargetMachine::
74 addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel)
75 {
76   PM.add(createMipsDelaySlotFillerPass(*this));
77   return true;
78 }
79 
80 bool MipsTargetMachine::
81 addPreRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel) {
82   PM.add(createMipsEmitGPRestorePass(*this));
83   return true;
84 }
85 
86 bool MipsTargetMachine::
87 addPostRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel) {
88   PM.add(createMipsExpandPseudoPass(*this));
89   return true;
90 }
91