1 //===-- MipsSubtarget.cpp - Mips Subtarget Information --------------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the Mips specific subclass of TargetSubtargetInfo.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #define DEBUG_TYPE "mips-subtarget"
15 
16 #include "MipsMachineFunction.h"
17 #include "Mips.h"
18 #include "MipsRegisterInfo.h"
19 #include "MipsSubtarget.h"
20 #include "MipsTargetMachine.h"
21 #include "llvm/IR/Attributes.h"
22 #include "llvm/IR/Function.h"
23 #include "llvm/Support/CommandLine.h"
24 #include "llvm/Support/Debug.h"
25 #include "llvm/Support/TargetRegistry.h"
26 #include "llvm/Support/raw_ostream.h"
27 
28 #define GET_SUBTARGETINFO_TARGET_DESC
29 #define GET_SUBTARGETINFO_CTOR
30 #include "MipsGenSubtargetInfo.inc"
31 
32 
33 using namespace llvm;
34 
35 // FIXME: Maybe this should be on by default when Mips16 is specified
36 //
37 static cl::opt<bool> Mixed16_32(
38   "mips-mixed-16-32",
39   cl::init(false),
40   cl::desc("Allow for a mixture of Mips16 "
41            "and Mips32 code in a single source file"),
42   cl::Hidden);
43 
44 static cl::opt<bool> Mips_Os16(
45   "mips-os16",
46   cl::init(false),
47   cl::desc("Compile all functions that don' use "
48            "floating point as Mips 16"),
49   cl::Hidden);
50 
51 static cl::opt<bool>
52 Mips16HardFloat("mips16-hard-float", cl::NotHidden,
53                 cl::desc("MIPS: mips16 hard float enable."),
54                 cl::init(false));
55 
56 static cl::opt<bool>
57 Mips16ConstantIslands(
58   "mips16-constant-islands", cl::NotHidden,
59   cl::desc("MIPS: mips16 constant islands enable."),
60   cl::init(true));
61 
62 /// Select the Mips CPU for the given triple and cpu name.
63 /// FIXME: Merge with the copy in MipsMCTargetDesc.cpp
64 static inline StringRef selectMipsCPU(StringRef TT, StringRef CPU) {
65   if (CPU.empty() || CPU == "generic") {
66     Triple TheTriple(TT);
67     if (TheTriple.getArch() == Triple::mips ||
68         TheTriple.getArch() == Triple::mipsel)
69       CPU = "mips32";
70     else
71       CPU = "mips64";
72   }
73   return CPU;
74 }
75 
76 void MipsSubtarget::anchor() { }
77 
78 MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU,
79                              const std::string &FS, bool little,
80                              Reloc::Model _RM, MipsTargetMachine *_TM)
81     : MipsGenSubtargetInfo(TT, CPU, FS), MipsArchVersion(Mips32),
82       MipsABI(UnknownABI), IsLittle(little), IsSingleFloat(false),
83       IsFP64bit(false), IsNaN2008bit(false), IsGP64bit(false), HasVFPU(false),
84       HasCnMips(false), IsLinux(true), HasSEInReg(false), HasCondMov(false),
85       HasSwap(false), HasBitCount(false), HasFPIdx(false), InMips16Mode(false),
86       InMips16HardFloat(Mips16HardFloat), InMicroMipsMode(false), HasDSP(false),
87       HasDSPR2(false), AllowMixed16_32(Mixed16_32 | Mips_Os16), Os16(Mips_Os16),
88       HasMSA(false), RM(_RM), OverrideMode(NoOverride), TM(_TM),
89       TargetTriple(TT) {
90   std::string CPUName = CPU;
91   CPUName = selectMipsCPU(TT, CPUName);
92 
93   // Parse features string.
94   ParseSubtargetFeatures(CPUName, FS);
95 
96   if (InMips16Mode && !TM->Options.UseSoftFloat) {
97     // Hard float for mips16 means essentially to compile as soft float
98     // but to use a runtime library for soft float that is written with
99     // native mips32 floating point instructions (those runtime routines
100     // run in mips32 hard float mode).
101     TM->Options.UseSoftFloat = true;
102     TM->Options.FloatABIType = FloatABI::Soft;
103     InMips16HardFloat = true;
104   }
105 
106   PreviousInMips16Mode = InMips16Mode;
107 
108   // Initialize scheduling itinerary for the specified CPU.
109   InstrItins = getInstrItineraryForCPU(CPUName);
110 
111   // Assert exactly one ABI was chosen.
112   assert(MipsABI != UnknownABI);
113   assert((((getFeatureBits() & Mips::FeatureO32) != 0) +
114           ((getFeatureBits() & Mips::FeatureEABI) != 0) +
115           ((getFeatureBits() & Mips::FeatureN32) != 0) +
116           ((getFeatureBits() & Mips::FeatureN64) != 0)) == 1);
117 
118   // Check if Architecture and ABI are compatible.
119   assert(((!isGP64bit() && (isABI_O32() || isABI_EABI())) ||
120           (isGP64bit() && (isABI_N32() || isABI_N64()))) &&
121          "Invalid  Arch & ABI pair.");
122 
123   if (hasMSA() && !isFP64bit())
124     report_fatal_error("MSA requires a 64-bit FPU register file (FR=1 mode). "
125                        "See -mattr=+fp64.",
126                        false);
127 
128   // Is the target system Linux ?
129   if (TT.find("linux") == std::string::npos)
130     IsLinux = false;
131 
132   // Set UseSmallSection.
133   // TODO: Investigate the IsLinux check. I suspect it's really checking for
134   //       bare-metal.
135   UseSmallSection = !IsLinux && (RM == Reloc::Static);
136   // set some subtarget specific features
137   if (inMips16Mode())
138     HasBitCount=false;
139 }
140 
141 bool
142 MipsSubtarget::enablePostRAScheduler(CodeGenOpt::Level OptLevel,
143                                     TargetSubtargetInfo::AntiDepBreakMode &Mode,
144                                      RegClassVector &CriticalPathRCs) const {
145   Mode = TargetSubtargetInfo::ANTIDEP_NONE;
146   CriticalPathRCs.clear();
147   CriticalPathRCs.push_back(isGP64bit() ? &Mips::GPR64RegClass
148                                         : &Mips::GPR32RegClass);
149   return OptLevel >= CodeGenOpt::Aggressive;
150 }
151 
152 //FIXME: This logic for reseting the subtarget along with
153 // the helper classes can probably be simplified but there are a lot of
154 // cases so we will defer rewriting this to later.
155 //
156 void MipsSubtarget::resetSubtarget(MachineFunction *MF) {
157   bool ChangeToMips16 = false, ChangeToNoMips16 = false;
158   DEBUG(dbgs() << "resetSubtargetFeatures" << "\n");
159   AttributeSet FnAttrs = MF->getFunction()->getAttributes();
160   ChangeToMips16 = FnAttrs.hasAttribute(AttributeSet::FunctionIndex,
161                                         "mips16");
162   ChangeToNoMips16 = FnAttrs.hasAttribute(AttributeSet::FunctionIndex,
163                                         "nomips16");
164   assert (!(ChangeToMips16 & ChangeToNoMips16) &&
165           "mips16 and nomips16 specified on the same function");
166   if (ChangeToMips16) {
167     if (PreviousInMips16Mode)
168       return;
169     OverrideMode = Mips16Override;
170     PreviousInMips16Mode = true;
171     TM->setHelperClassesMips16();
172     return;
173   } else if (ChangeToNoMips16) {
174     if (!PreviousInMips16Mode)
175       return;
176     OverrideMode = NoMips16Override;
177     PreviousInMips16Mode = false;
178     TM->setHelperClassesMipsSE();
179     return;
180   } else {
181     if (OverrideMode == NoOverride)
182       return;
183     OverrideMode = NoOverride;
184     DEBUG(dbgs() << "back to default" << "\n");
185     if (inMips16Mode() && !PreviousInMips16Mode) {
186       TM->setHelperClassesMips16();
187       PreviousInMips16Mode = true;
188     } else if (!inMips16Mode() && PreviousInMips16Mode) {
189       TM->setHelperClassesMipsSE();
190       PreviousInMips16Mode = false;
191     }
192     return;
193   }
194 }
195 
196 bool MipsSubtarget::mipsSEUsesSoftFloat() const {
197   return TM->Options.UseSoftFloat && !InMips16HardFloat;
198 }
199 
200 bool MipsSubtarget::useConstantIslands() {
201   DEBUG(dbgs() << "use constant islands " << Mips16ConstantIslands << "\n");
202   return Mips16ConstantIslands;
203 }
204