1 //===-- MipsSubtarget.cpp - Mips Subtarget Information --------------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the Mips specific subclass of TargetSubtargetInfo.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "MipsMachineFunction.h"
15 #include "Mips.h"
16 #include "MipsRegisterInfo.h"
17 #include "MipsSubtarget.h"
18 #include "MipsTargetMachine.h"
19 #include "llvm/IR/Attributes.h"
20 #include "llvm/IR/Function.h"
21 #include "llvm/Support/CommandLine.h"
22 #include "llvm/Support/Debug.h"
23 #include "llvm/Support/TargetRegistry.h"
24 #include "llvm/Support/raw_ostream.h"
25 
26 using namespace llvm;
27 
28 #define DEBUG_TYPE "mips-subtarget"
29 
30 #define GET_SUBTARGETINFO_TARGET_DESC
31 #define GET_SUBTARGETINFO_CTOR
32 #include "MipsGenSubtargetInfo.inc"
33 
34 // FIXME: Maybe this should be on by default when Mips16 is specified
35 //
36 static cl::opt<bool> Mixed16_32(
37   "mips-mixed-16-32",
38   cl::init(false),
39   cl::desc("Allow for a mixture of Mips16 "
40            "and Mips32 code in a single source file"),
41   cl::Hidden);
42 
43 static cl::opt<bool> Mips_Os16(
44   "mips-os16",
45   cl::init(false),
46   cl::desc("Compile all functions that don' use "
47            "floating point as Mips 16"),
48   cl::Hidden);
49 
50 static cl::opt<bool>
51 Mips16HardFloat("mips16-hard-float", cl::NotHidden,
52                 cl::desc("MIPS: mips16 hard float enable."),
53                 cl::init(false));
54 
55 static cl::opt<bool>
56 Mips16ConstantIslands(
57   "mips16-constant-islands", cl::NotHidden,
58   cl::desc("MIPS: mips16 constant islands enable."),
59   cl::init(true));
60 
61 /// Select the Mips CPU for the given triple and cpu name.
62 /// FIXME: Merge with the copy in MipsMCTargetDesc.cpp
63 static StringRef selectMipsCPU(Triple TT, StringRef CPU) {
64   if (CPU.empty() || CPU == "generic") {
65     if (TT.getArch() == Triple::mips || TT.getArch() == Triple::mipsel)
66       CPU = "mips32";
67     else
68       CPU = "mips64";
69   }
70   return CPU;
71 }
72 
73 void MipsSubtarget::anchor() { }
74 
75 MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU,
76                              const std::string &FS, bool little,
77                              Reloc::Model _RM, MipsTargetMachine *_TM)
78     : MipsGenSubtargetInfo(TT, CPU, FS), MipsArchVersion(Mips32),
79       MipsABI(UnknownABI), IsLittle(little), IsSingleFloat(false),
80       IsFP64bit(false), IsNaN2008bit(false), IsGP64bit(false), HasVFPU(false),
81       HasCnMips(false), IsLinux(true), HasMips3_32(false), HasMips3_32r2(false),
82       HasMips4_32(false), HasMips4_32r2(false), HasMips5_32r2(false),
83       InMips16Mode(false), InMips16HardFloat(Mips16HardFloat),
84       InMicroMipsMode(false), HasDSP(false), HasDSPR2(false),
85       AllowMixed16_32(Mixed16_32 | Mips_Os16), Os16(Mips_Os16), HasMSA(false),
86       RM(_RM), OverrideMode(NoOverride), TM(_TM), TargetTriple(TT), JITInfo() {
87 
88   initializeSubtargetDependencies(CPU, FS);
89 
90   if (InMips16Mode && !TM->Options.UseSoftFloat) {
91     // Hard float for mips16 means essentially to compile as soft float
92     // but to use a runtime library for soft float that is written with
93     // native mips32 floating point instructions (those runtime routines
94     // run in mips32 hard float mode).
95     TM->Options.UseSoftFloat = true;
96     TM->Options.FloatABIType = FloatABI::Soft;
97     InMips16HardFloat = true;
98   }
99 
100   PreviousInMips16Mode = InMips16Mode;
101 
102   // Don't even attempt to generate code for MIPS-I, MIPS-II, MIPS-III, and
103   // MIPS-V. They have not been tested and currently exist for the integrated
104   // assembler only.
105   if (MipsArchVersion == Mips1)
106     report_fatal_error("Code generation for MIPS-I is not implemented", false);
107   if (MipsArchVersion == Mips2)
108     report_fatal_error("Code generation for MIPS-II is not implemented", false);
109   if (MipsArchVersion == Mips3)
110     report_fatal_error("Code generation for MIPS-III is not implemented",
111                        false);
112   if (MipsArchVersion == Mips5)
113     report_fatal_error("Code generation for MIPS-V is not implemented", false);
114 
115   // Assert exactly one ABI was chosen.
116   assert(MipsABI != UnknownABI);
117   assert((((getFeatureBits() & Mips::FeatureO32) != 0) +
118           ((getFeatureBits() & Mips::FeatureEABI) != 0) +
119           ((getFeatureBits() & Mips::FeatureN32) != 0) +
120           ((getFeatureBits() & Mips::FeatureN64) != 0)) == 1);
121 
122   // Check if Architecture and ABI are compatible.
123   assert(((!isGP64bit() && (isABI_O32() || isABI_EABI())) ||
124           (isGP64bit() && (isABI_N32() || isABI_N64()))) &&
125          "Invalid  Arch & ABI pair.");
126 
127   if (hasMSA() && !isFP64bit())
128     report_fatal_error("MSA requires a 64-bit FPU register file (FR=1 mode). "
129                        "See -mattr=+fp64.",
130                        false);
131 
132   if (hasMips32r6()) {
133     StringRef ISA = hasMips64r6() ? "MIPS64r6" : "MIPS32r6";
134 
135     assert(isFP64bit());
136     assert(isNaN2008());
137     if (hasDSP())
138       report_fatal_error(ISA + " is not compatible with the DSP ASE", false);
139   }
140 
141   // Is the target system Linux ?
142   if (TT.find("linux") == std::string::npos)
143     IsLinux = false;
144 
145   // Set UseSmallSection.
146   // TODO: Investigate the IsLinux check. I suspect it's really checking for
147   //       bare-metal.
148   UseSmallSection = !IsLinux && (RM == Reloc::Static);
149 }
150 
151 bool
152 MipsSubtarget::enablePostRAScheduler(CodeGenOpt::Level OptLevel,
153                                     TargetSubtargetInfo::AntiDepBreakMode &Mode,
154                                      RegClassVector &CriticalPathRCs) const {
155   Mode = TargetSubtargetInfo::ANTIDEP_NONE;
156   CriticalPathRCs.clear();
157   CriticalPathRCs.push_back(isGP64bit() ? &Mips::GPR64RegClass
158                                         : &Mips::GPR32RegClass);
159   return OptLevel >= CodeGenOpt::Aggressive;
160 }
161 
162 MipsSubtarget &MipsSubtarget::initializeSubtargetDependencies(StringRef CPU,
163                                                               StringRef FS) {
164   std::string CPUName = selectMipsCPU(TargetTriple, CPU);
165 
166   // Parse features string.
167   ParseSubtargetFeatures(CPUName, FS);
168   // Initialize scheduling itinerary for the specified CPU.
169   InstrItins = getInstrItineraryForCPU(CPUName);
170   return *this;
171 }
172 
173 //FIXME: This logic for reseting the subtarget along with
174 // the helper classes can probably be simplified but there are a lot of
175 // cases so we will defer rewriting this to later.
176 //
177 void MipsSubtarget::resetSubtarget(MachineFunction *MF) {
178   bool ChangeToMips16 = false, ChangeToNoMips16 = false;
179   DEBUG(dbgs() << "resetSubtargetFeatures" << "\n");
180   AttributeSet FnAttrs = MF->getFunction()->getAttributes();
181   ChangeToMips16 = FnAttrs.hasAttribute(AttributeSet::FunctionIndex,
182                                         "mips16");
183   ChangeToNoMips16 = FnAttrs.hasAttribute(AttributeSet::FunctionIndex,
184                                         "nomips16");
185   assert (!(ChangeToMips16 & ChangeToNoMips16) &&
186           "mips16 and nomips16 specified on the same function");
187   if (ChangeToMips16) {
188     if (PreviousInMips16Mode)
189       return;
190     OverrideMode = Mips16Override;
191     PreviousInMips16Mode = true;
192     TM->setHelperClassesMips16();
193     return;
194   } else if (ChangeToNoMips16) {
195     if (!PreviousInMips16Mode)
196       return;
197     OverrideMode = NoMips16Override;
198     PreviousInMips16Mode = false;
199     TM->setHelperClassesMipsSE();
200     return;
201   } else {
202     if (OverrideMode == NoOverride)
203       return;
204     OverrideMode = NoOverride;
205     DEBUG(dbgs() << "back to default" << "\n");
206     if (inMips16Mode() && !PreviousInMips16Mode) {
207       TM->setHelperClassesMips16();
208       PreviousInMips16Mode = true;
209     } else if (!inMips16Mode() && PreviousInMips16Mode) {
210       TM->setHelperClassesMipsSE();
211       PreviousInMips16Mode = false;
212     }
213     return;
214   }
215 }
216 
217 bool MipsSubtarget::mipsSEUsesSoftFloat() const {
218   return TM->Options.UseSoftFloat && !InMips16HardFloat;
219 }
220 
221 bool MipsSubtarget::useConstantIslands() {
222   DEBUG(dbgs() << "use constant islands " << Mips16ConstantIslands << "\n");
223   return Mips16ConstantIslands;
224 }
225