1 //===-- MipsSubtarget.cpp - Mips Subtarget Information --------------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the Mips specific subclass of TargetSubtargetInfo.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "MipsMachineFunction.h"
15 #include "Mips.h"
16 #include "MipsRegisterInfo.h"
17 #include "MipsSubtarget.h"
18 #include "MipsTargetMachine.h"
19 #include "llvm/IR/Attributes.h"
20 #include "llvm/IR/Function.h"
21 #include "llvm/Support/CommandLine.h"
22 #include "llvm/Support/Debug.h"
23 #include "llvm/Support/TargetRegistry.h"
24 #include "llvm/Support/raw_ostream.h"
25 
26 using namespace llvm;
27 
28 #define DEBUG_TYPE "mips-subtarget"
29 
30 #define GET_SUBTARGETINFO_TARGET_DESC
31 #define GET_SUBTARGETINFO_CTOR
32 #include "MipsGenSubtargetInfo.inc"
33 
34 // FIXME: Maybe this should be on by default when Mips16 is specified
35 //
36 static cl::opt<bool> Mixed16_32(
37   "mips-mixed-16-32",
38   cl::init(false),
39   cl::desc("Allow for a mixture of Mips16 "
40            "and Mips32 code in a single source file"),
41   cl::Hidden);
42 
43 static cl::opt<bool> Mips_Os16(
44   "mips-os16",
45   cl::init(false),
46   cl::desc("Compile all functions that don' use "
47            "floating point as Mips 16"),
48   cl::Hidden);
49 
50 static cl::opt<bool>
51 Mips16HardFloat("mips16-hard-float", cl::NotHidden,
52                 cl::desc("MIPS: mips16 hard float enable."),
53                 cl::init(false));
54 
55 static cl::opt<bool>
56 Mips16ConstantIslands(
57   "mips16-constant-islands", cl::NotHidden,
58   cl::desc("MIPS: mips16 constant islands enable."),
59   cl::init(true));
60 
61 /// Select the Mips CPU for the given triple and cpu name.
62 /// FIXME: Merge with the copy in MipsMCTargetDesc.cpp
63 static inline StringRef selectMipsCPU(StringRef TT, StringRef CPU) {
64   if (CPU.empty() || CPU == "generic") {
65     Triple TheTriple(TT);
66     if (TheTriple.getArch() == Triple::mips ||
67         TheTriple.getArch() == Triple::mipsel)
68       CPU = "mips32";
69     else
70       CPU = "mips64";
71   }
72   return CPU;
73 }
74 
75 void MipsSubtarget::anchor() { }
76 
77 MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU,
78                              const std::string &FS, bool little,
79                              Reloc::Model _RM, MipsTargetMachine *_TM)
80     : MipsGenSubtargetInfo(TT, CPU, FS), MipsArchVersion(Mips32),
81       MipsABI(UnknownABI), IsLittle(little), IsSingleFloat(false),
82       IsFP64bit(false), IsNaN2008bit(false), IsGP64bit(false), HasVFPU(false),
83       HasCnMips(false), IsLinux(true), HasSEInReg(false), HasCondMov(false),
84       HasSwap(false), HasBitCount(false), HasFPIdx(false), InMips16Mode(false),
85       InMips16HardFloat(Mips16HardFloat), InMicroMipsMode(false), HasDSP(false),
86       HasDSPR2(false), AllowMixed16_32(Mixed16_32 | Mips_Os16), Os16(Mips_Os16),
87       HasMSA(false), RM(_RM), OverrideMode(NoOverride), TM(_TM),
88       TargetTriple(TT) {
89   std::string CPUName = CPU;
90   CPUName = selectMipsCPU(TT, CPUName);
91 
92   // Parse features string.
93   ParseSubtargetFeatures(CPUName, FS);
94 
95   if (InMips16Mode && !TM->Options.UseSoftFloat) {
96     // Hard float for mips16 means essentially to compile as soft float
97     // but to use a runtime library for soft float that is written with
98     // native mips32 floating point instructions (those runtime routines
99     // run in mips32 hard float mode).
100     TM->Options.UseSoftFloat = true;
101     TM->Options.FloatABIType = FloatABI::Soft;
102     InMips16HardFloat = true;
103   }
104 
105   PreviousInMips16Mode = InMips16Mode;
106 
107   // Initialize scheduling itinerary for the specified CPU.
108   InstrItins = getInstrItineraryForCPU(CPUName);
109 
110   // Assert exactly one ABI was chosen.
111   assert(MipsABI != UnknownABI);
112   assert((((getFeatureBits() & Mips::FeatureO32) != 0) +
113           ((getFeatureBits() & Mips::FeatureEABI) != 0) +
114           ((getFeatureBits() & Mips::FeatureN32) != 0) +
115           ((getFeatureBits() & Mips::FeatureN64) != 0)) == 1);
116 
117   // Check if Architecture and ABI are compatible.
118   assert(((!isGP64bit() && (isABI_O32() || isABI_EABI())) ||
119           (isGP64bit() && (isABI_N32() || isABI_N64()))) &&
120          "Invalid  Arch & ABI pair.");
121 
122   if (hasMSA() && !isFP64bit())
123     report_fatal_error("MSA requires a 64-bit FPU register file (FR=1 mode). "
124                        "See -mattr=+fp64.",
125                        false);
126 
127   // Is the target system Linux ?
128   if (TT.find("linux") == std::string::npos)
129     IsLinux = false;
130 
131   // Set UseSmallSection.
132   // TODO: Investigate the IsLinux check. I suspect it's really checking for
133   //       bare-metal.
134   UseSmallSection = !IsLinux && (RM == Reloc::Static);
135   // set some subtarget specific features
136   if (inMips16Mode())
137     HasBitCount=false;
138 }
139 
140 bool
141 MipsSubtarget::enablePostRAScheduler(CodeGenOpt::Level OptLevel,
142                                     TargetSubtargetInfo::AntiDepBreakMode &Mode,
143                                      RegClassVector &CriticalPathRCs) const {
144   Mode = TargetSubtargetInfo::ANTIDEP_NONE;
145   CriticalPathRCs.clear();
146   CriticalPathRCs.push_back(isGP64bit() ? &Mips::GPR64RegClass
147                                         : &Mips::GPR32RegClass);
148   return OptLevel >= CodeGenOpt::Aggressive;
149 }
150 
151 //FIXME: This logic for reseting the subtarget along with
152 // the helper classes can probably be simplified but there are a lot of
153 // cases so we will defer rewriting this to later.
154 //
155 void MipsSubtarget::resetSubtarget(MachineFunction *MF) {
156   bool ChangeToMips16 = false, ChangeToNoMips16 = false;
157   DEBUG(dbgs() << "resetSubtargetFeatures" << "\n");
158   AttributeSet FnAttrs = MF->getFunction()->getAttributes();
159   ChangeToMips16 = FnAttrs.hasAttribute(AttributeSet::FunctionIndex,
160                                         "mips16");
161   ChangeToNoMips16 = FnAttrs.hasAttribute(AttributeSet::FunctionIndex,
162                                         "nomips16");
163   assert (!(ChangeToMips16 & ChangeToNoMips16) &&
164           "mips16 and nomips16 specified on the same function");
165   if (ChangeToMips16) {
166     if (PreviousInMips16Mode)
167       return;
168     OverrideMode = Mips16Override;
169     PreviousInMips16Mode = true;
170     TM->setHelperClassesMips16();
171     return;
172   } else if (ChangeToNoMips16) {
173     if (!PreviousInMips16Mode)
174       return;
175     OverrideMode = NoMips16Override;
176     PreviousInMips16Mode = false;
177     TM->setHelperClassesMipsSE();
178     return;
179   } else {
180     if (OverrideMode == NoOverride)
181       return;
182     OverrideMode = NoOverride;
183     DEBUG(dbgs() << "back to default" << "\n");
184     if (inMips16Mode() && !PreviousInMips16Mode) {
185       TM->setHelperClassesMips16();
186       PreviousInMips16Mode = true;
187     } else if (!inMips16Mode() && PreviousInMips16Mode) {
188       TM->setHelperClassesMipsSE();
189       PreviousInMips16Mode = false;
190     }
191     return;
192   }
193 }
194 
195 bool MipsSubtarget::mipsSEUsesSoftFloat() const {
196   return TM->Options.UseSoftFloat && !InMips16HardFloat;
197 }
198 
199 bool MipsSubtarget::useConstantIslands() {
200   DEBUG(dbgs() << "use constant islands " << Mips16ConstantIslands << "\n");
201   return Mips16ConstantIslands;
202 }
203