1 //===-- MipsRegisterInfo.h - Mips Register Information Impl -----*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains the Mips implementation of the TargetRegisterInfo class. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H 15 #define LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H 16 17 #include "Mips.h" 18 #include "llvm/Target/TargetRegisterInfo.h" 19 20 #define GET_REGINFO_HEADER 21 #include "MipsGenRegisterInfo.inc" 22 23 namespace llvm { 24 class MipsRegisterInfo : public MipsGenRegisterInfo { 25 public: 26 MipsRegisterInfo(); 27 28 /// Get PIC indirect call register 29 static unsigned getPICCallReg(); 30 31 /// Code Generation virtual methods... 32 const TargetRegisterClass *getPointerRegClass(const MachineFunction &MF, 33 unsigned Kind) const override; 34 35 unsigned getRegPressureLimit(const TargetRegisterClass *RC, 36 MachineFunction &MF) const override; 37 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override; 38 const uint32_t *getCallPreservedMask(const MachineFunction &MF, 39 CallingConv::ID) const override; 40 static const uint32_t *getMips16RetHelperMask(); 41 42 BitVector getReservedRegs(const MachineFunction &MF) const override; 43 44 bool requiresRegisterScavenging(const MachineFunction &MF) const override; 45 46 bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override; 47 48 /// Stack Frame Processing Methods 49 void eliminateFrameIndex(MachineBasicBlock::iterator II, 50 int SPAdj, unsigned FIOperandNum, 51 RegScavenger *RS = nullptr) const override; 52 53 // Stack realignment queries. 54 bool canRealignStack(const MachineFunction &MF) const override; 55 56 /// Debug information queries. 57 unsigned getFrameRegister(const MachineFunction &MF) const override; 58 59 /// \brief Return GPR register class. 60 virtual const TargetRegisterClass *intRegClass(unsigned Size) const = 0; 61 62 private: 63 virtual void eliminateFI(MachineBasicBlock::iterator II, unsigned OpNo, 64 int FrameIndex, uint64_t StackSize, 65 int64_t SPOffset) const = 0; 66 }; 67 68 } // end namespace llvm 69 70 #endif 71