1 //===- MipsRegisterInfo.cpp - MIPS Register Information -== -----*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the MIPS implementation of the TargetRegisterInfo class.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #define DEBUG_TYPE "mips-reg-info"
15 
16 #include "Mips.h"
17 #include "MipsSubtarget.h"
18 #include "MipsRegisterInfo.h"
19 #include "MipsMachineFunction.h"
20 #include "llvm/Constants.h"
21 #include "llvm/Type.h"
22 #include "llvm/Function.h"
23 #include "llvm/CodeGen/ValueTypes.h"
24 #include "llvm/CodeGen/MachineInstrBuilder.h"
25 #include "llvm/CodeGen/MachineFunction.h"
26 #include "llvm/CodeGen/MachineFrameInfo.h"
27 #include "llvm/Target/TargetFrameLowering.h"
28 #include "llvm/Target/TargetMachine.h"
29 #include "llvm/Target/TargetOptions.h"
30 #include "llvm/Target/TargetInstrInfo.h"
31 #include "llvm/Support/CommandLine.h"
32 #include "llvm/Support/Debug.h"
33 #include "llvm/Support/ErrorHandling.h"
34 #include "llvm/Support/raw_ostream.h"
35 #include "llvm/ADT/BitVector.h"
36 #include "llvm/ADT/STLExtras.h"
37 #include "llvm/Analysis/DebugInfo.h"
38 
39 #define GET_REGINFO_TARGET_DESC
40 #include "MipsGenRegisterInfo.inc"
41 
42 using namespace llvm;
43 
44 MipsRegisterInfo::MipsRegisterInfo(const MipsSubtarget &ST,
45                                    const TargetInstrInfo &tii)
46   : MipsGenRegisterInfo(Mips::RA), Subtarget(ST), TII(tii) {}
47 
48 /// getRegisterNumbering - Given the enum value for some register, e.g.
49 /// Mips::RA, return the number that it corresponds to (e.g. 31).
50 unsigned MipsRegisterInfo::
51 getRegisterNumbering(unsigned RegEnum)
52 {
53   switch (RegEnum) {
54     case Mips::ZERO : case Mips::F0 : case Mips::D0 : return 0;
55     case Mips::AT   : case Mips::F1 : return 1;
56     case Mips::V0   : case Mips::F2 : case Mips::D1 : return 2;
57     case Mips::V1   : case Mips::F3 : return 3;
58     case Mips::A0   : case Mips::F4 : case Mips::D2 : return 4;
59     case Mips::A1   : case Mips::F5 : return 5;
60     case Mips::A2   : case Mips::F6 : case Mips::D3 : return 6;
61     case Mips::A3   : case Mips::F7 : return 7;
62     case Mips::T0   : case Mips::F8 : case Mips::D4 : return 8;
63     case Mips::T1   : case Mips::F9 : return 9;
64     case Mips::T2   : case Mips::F10: case Mips::D5: return 10;
65     case Mips::T3   : case Mips::F11: return 11;
66     case Mips::T4   : case Mips::F12: case Mips::D6: return 12;
67     case Mips::T5   : case Mips::F13: return 13;
68     case Mips::T6   : case Mips::F14: case Mips::D7: return 14;
69     case Mips::T7   : case Mips::F15: return 15;
70     case Mips::S0   : case Mips::F16: case Mips::D8: return 16;
71     case Mips::S1   : case Mips::F17: return 17;
72     case Mips::S2   : case Mips::F18: case Mips::D9: return 18;
73     case Mips::S3   : case Mips::F19: return 19;
74     case Mips::S4   : case Mips::F20: case Mips::D10: return 20;
75     case Mips::S5   : case Mips::F21: return 21;
76     case Mips::S6   : case Mips::F22: case Mips::D11: return 22;
77     case Mips::S7   : case Mips::F23: return 23;
78     case Mips::T8   : case Mips::F24: case Mips::D12: return 24;
79     case Mips::T9   : case Mips::F25: return 25;
80     case Mips::K0   : case Mips::F26: case Mips::D13: return 26;
81     case Mips::K1   : case Mips::F27: return 27;
82     case Mips::GP   : case Mips::F28: case Mips::D14: return 28;
83     case Mips::SP   : case Mips::F29: return 29;
84     case Mips::FP   : case Mips::F30: case Mips::D15: return 30;
85     case Mips::RA   : case Mips::F31: return 31;
86     default: llvm_unreachable("Unknown register number!");
87   }
88   return 0; // Not reached
89 }
90 
91 unsigned MipsRegisterInfo::getPICCallReg() { return Mips::T9; }
92 
93 //===----------------------------------------------------------------------===//
94 // Callee Saved Registers methods
95 //===----------------------------------------------------------------------===//
96 
97 /// Mips Callee Saved Registers
98 const unsigned* MipsRegisterInfo::
99 getCalleeSavedRegs(const MachineFunction *MF) const
100 {
101   // Mips callee-save register range is $16-$23, $f20-$f30
102   static const unsigned SingleFloatOnlyCalleeSavedRegs[] = {
103     Mips::F30, Mips::F29, Mips::F28, Mips::F27, Mips::F26,
104     Mips::F25, Mips::F24, Mips::F23, Mips::F22, Mips::F21, Mips::F20,
105     Mips::RA, Mips::FP, Mips::S7, Mips::S6, Mips::S5, Mips::S4,
106     Mips::S3, Mips::S2, Mips::S1, Mips::S0, 0
107   };
108 
109   static const unsigned Mips32CalleeSavedRegs[] = {
110     Mips::D15, Mips::D14, Mips::D13, Mips::D12, Mips::D11, Mips::D10,
111     Mips::RA, Mips::FP, Mips::S7, Mips::S6, Mips::S5, Mips::S4,
112     Mips::S3, Mips::S2, Mips::S1, Mips::S0, 0
113   };
114 
115   if (Subtarget.isSingleFloat())
116     return SingleFloatOnlyCalleeSavedRegs;
117   else
118     return Mips32CalleeSavedRegs;
119 }
120 
121 BitVector MipsRegisterInfo::
122 getReservedRegs(const MachineFunction &MF) const {
123   BitVector Reserved(getNumRegs());
124   Reserved.set(Mips::ZERO);
125   Reserved.set(Mips::AT);
126   Reserved.set(Mips::K0);
127   Reserved.set(Mips::K1);
128   Reserved.set(Mips::GP);
129   Reserved.set(Mips::SP);
130   Reserved.set(Mips::FP);
131   Reserved.set(Mips::RA);
132 
133   return Reserved;
134 }
135 
136 // This function eliminate ADJCALLSTACKDOWN,
137 // ADJCALLSTACKUP pseudo instructions
138 void MipsRegisterInfo::
139 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
140                               MachineBasicBlock::iterator I) const {
141   // Simply discard ADJCALLSTACKDOWN, ADJCALLSTACKUP instructions.
142   MBB.erase(I);
143 }
144 
145 // FrameIndex represent objects inside a abstract stack.
146 // We must replace FrameIndex with an stack/frame pointer
147 // direct reference.
148 void MipsRegisterInfo::
149 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
150                     RegScavenger *RS) const {
151   MachineInstr &MI = *II;
152   MachineFunction &MF = *MI.getParent()->getParent();
153   MachineFrameInfo *MFI = MF.getFrameInfo();
154   MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>();
155 
156   unsigned i = 0;
157   while (!MI.getOperand(i).isFI()) {
158     ++i;
159     assert(i < MI.getNumOperands() &&
160            "Instr doesn't have FrameIndex operand!");
161   }
162 
163   DEBUG(errs() << "\nFunction : " << MF.getFunction()->getName() << "\n";
164         errs() << "<--------->\n" << MI);
165 
166   int FrameIndex = MI.getOperand(i).getIndex();
167   int stackSize  = MF.getFrameInfo()->getStackSize();
168   int spOffset   = MF.getFrameInfo()->getObjectOffset(FrameIndex);
169 
170   DEBUG(errs() << "FrameIndex : " << FrameIndex << "\n"
171                << "spOffset   : " << spOffset << "\n"
172                << "stackSize  : " << stackSize << "\n");
173 
174   const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
175   int MinCSFI = 0;
176   int MaxCSFI = -1;
177 
178   if (CSI.size()) {
179     MinCSFI = CSI[0].getFrameIdx();
180     MaxCSFI = CSI[CSI.size() - 1].getFrameIdx();
181   }
182 
183   // The following stack frame objects are always referenced relative to $sp:
184   //  1. Outgoing arguments.
185   //  2. Pointer to dynamically allocated stack space.
186   //  3. Locations for callee-saved registers.
187   // Everything else is referenced relative to whatever register
188   // getFrameRegister() returns.
189   unsigned FrameReg;
190 
191   if (MipsFI->isOutArgFI(FrameIndex) || MipsFI->isDynAllocFI(FrameIndex) ||
192       (FrameIndex >= MinCSFI && FrameIndex <= MaxCSFI))
193     FrameReg = Mips::SP;
194   else
195     FrameReg = getFrameRegister(MF);
196 
197   // Calculate final offset.
198   // - There is no need to change the offset if the frame object is one of the
199   //   following: an outgoing argument, pointer to a dynamically allocated
200   //   stack space or a $gp restore location,
201   // - If the frame object is any of the following, its offset must be adjusted
202   //   by adding the size of the stack:
203   //   incoming argument, callee-saved register location or local variable.
204   int Offset;
205 
206   if (MipsFI->isOutArgFI(FrameIndex) || MipsFI->isGPFI(FrameIndex) ||
207       MipsFI->isDynAllocFI(FrameIndex))
208     Offset = spOffset;
209   else
210     Offset = spOffset + stackSize;
211 
212   Offset    += MI.getOperand(i+1).getImm();
213 
214   DEBUG(errs() << "Offset     : " << Offset << "\n" << "<--------->\n");
215 
216   // If MI is not a debug value, make sure Offset fits in the 16-bit immediate
217   // field.
218   if (!MI.isDebugValue() && (Offset >= 0x8000 || Offset < -0x8000)) {
219     MachineBasicBlock &MBB = *MI.getParent();
220     DebugLoc DL = II->getDebugLoc();
221     int ImmHi = (((unsigned)Offset & 0xffff0000) >> 16) +
222                 ((Offset & 0x8000) != 0);
223 
224     // FIXME: change this when mips goes MC".
225     BuildMI(MBB, II, DL, TII.get(Mips::NOAT));
226     BuildMI(MBB, II, DL, TII.get(Mips::LUi), Mips::AT).addImm(ImmHi);
227     BuildMI(MBB, II, DL, TII.get(Mips::ADDu), Mips::AT).addReg(FrameReg)
228                                                        .addReg(Mips::AT);
229     FrameReg = Mips::AT;
230     Offset = (short)(Offset & 0xffff);
231 
232     BuildMI(MBB, ++II, MI.getDebugLoc(), TII.get(Mips::ATMACRO));
233   }
234 
235   MI.getOperand(i).ChangeToRegister(FrameReg, false);
236   MI.getOperand(i+1).ChangeToImmediate(Offset);
237 }
238 
239 unsigned MipsRegisterInfo::
240 getFrameRegister(const MachineFunction &MF) const {
241   const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
242 
243   return TFI->hasFP(MF) ? Mips::FP : Mips::SP;
244 }
245 
246 unsigned MipsRegisterInfo::
247 getEHExceptionRegister() const {
248   llvm_unreachable("What is the exception register");
249   return 0;
250 }
251 
252 unsigned MipsRegisterInfo::
253 getEHHandlerRegister() const {
254   llvm_unreachable("What is the exception handler register");
255   return 0;
256 }
257