1 //===-- MipsMachineFunctionInfo.cpp - Private data used for Mips ----------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #include "MCTargetDesc/MipsBaseInfo.h"
11 #include "MipsInstrInfo.h"
12 #include "MipsMachineFunction.h"
13 #include "MipsSubtarget.h"
14 #include "MipsTargetMachine.h"
15 #include "llvm/CodeGen/MachineInstrBuilder.h"
16 #include "llvm/CodeGen/MachineRegisterInfo.h"
17 #include "llvm/IR/Function.h"
18 #include "llvm/Support/CommandLine.h"
19 #include "llvm/Support/raw_ostream.h"
20 
21 using namespace llvm;
22 
23 static cl::opt<bool>
24 FixGlobalBaseReg("mips-fix-global-base-reg", cl::Hidden, cl::init(true),
25                  cl::desc("Always use $gp as the global base register."));
26 
27 MipsFunctionInfo::~MipsFunctionInfo() {}
28 
29 bool MipsFunctionInfo::globalBaseRegSet() const {
30   return GlobalBaseReg;
31 }
32 
33 unsigned MipsFunctionInfo::getGlobalBaseReg() {
34   // Return if it has already been initialized.
35   if (GlobalBaseReg)
36     return GlobalBaseReg;
37 
38   MipsSubtarget const &STI =
39       static_cast<const MipsSubtarget &>(MF.getSubtarget());
40 
41   const TargetRegisterClass *RC =
42       STI.inMips16Mode()
43           ? &Mips::CPU16RegsRegClass
44           : STI.inMicroMipsMode()
45                 ? &Mips::GPRMM16RegClass
46                 : static_cast<const MipsTargetMachine &>(MF.getTarget())
47                           .getABI()
48                           .IsN64()
49                       ? &Mips::GPR64RegClass
50                       : &Mips::GPR32RegClass;
51   return GlobalBaseReg = MF.getRegInfo().createVirtualRegister(RC);
52 }
53 
54 bool MipsFunctionInfo::mips16SPAliasRegSet() const {
55   return Mips16SPAliasReg;
56 }
57 unsigned MipsFunctionInfo::getMips16SPAliasReg() {
58   // Return if it has already been initialized.
59   if (Mips16SPAliasReg)
60     return Mips16SPAliasReg;
61 
62   const TargetRegisterClass *RC = &Mips::CPU16RegsRegClass;
63   return Mips16SPAliasReg = MF.getRegInfo().createVirtualRegister(RC);
64 }
65 
66 void MipsFunctionInfo::createEhDataRegsFI() {
67   for (int I = 0; I < 4; ++I) {
68     const TargetRegisterClass *RC =
69         static_cast<const MipsTargetMachine &>(MF.getTarget()).getABI().IsN64()
70             ? &Mips::GPR64RegClass
71             : &Mips::GPR32RegClass;
72 
73     EhDataRegFI[I] = MF.getFrameInfo()->CreateStackObject(RC->getSize(),
74         RC->getAlignment(), false);
75   }
76 }
77 
78 bool MipsFunctionInfo::isEhDataRegFI(int FI) const {
79   return CallsEhReturn && (FI == EhDataRegFI[0] || FI == EhDataRegFI[1]
80                         || FI == EhDataRegFI[2] || FI == EhDataRegFI[3]);
81 }
82 
83 MachinePointerInfo MipsFunctionInfo::callPtrInfo(const char *ES) {
84   return MachinePointerInfo(MF.getPSVManager().getExternalSymbolCallEntry(ES));
85 }
86 
87 MachinePointerInfo MipsFunctionInfo::callPtrInfo(const GlobalValue *GV) {
88   return MachinePointerInfo(MF.getPSVManager().getGlobalValueCallEntry(GV));
89 }
90 
91 int MipsFunctionInfo::getMoveF64ViaSpillFI(const TargetRegisterClass *RC) {
92   if (MoveF64ViaSpillFI == -1) {
93     MoveF64ViaSpillFI = MF.getFrameInfo()->CreateStackObject(
94         RC->getSize(), RC->getAlignment(), false);
95   }
96   return MoveF64ViaSpillFI;
97 }
98 
99 void MipsFunctionInfo::anchor() { }
100