1 //===-- MipsMCInstLower.cpp - Convert Mips MachineInstr to MCInst ---------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains code to lower Mips MachineInstrs to their corresponding
11 // MCInst records.
12 //
13 //===----------------------------------------------------------------------===//
14 #include "MipsMCInstLower.h"
15 #include "MCTargetDesc/MipsBaseInfo.h"
16 #include "MipsAsmPrinter.h"
17 #include "MipsInstrInfo.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/CodeGen/MachineInstr.h"
20 #include "llvm/CodeGen/MachineOperand.h"
21 #include "llvm/IR/Mangler.h"
22 #include "llvm/MC/MCContext.h"
23 #include "llvm/MC/MCExpr.h"
24 #include "llvm/MC/MCInst.h"
25 #include "llvm/MC/MCStreamer.h"
26 
27 using namespace llvm;
28 
29 MipsMCInstLower::MipsMCInstLower(MipsAsmPrinter &asmprinter)
30   : AsmPrinter(asmprinter) {}
31 
32 void MipsMCInstLower::Initialize(MCContext *C) {
33   Ctx = C;
34 }
35 
36 MCOperand MipsMCInstLower::LowerSymbolOperand(const MachineOperand &MO,
37                                               MachineOperandType MOTy,
38                                               unsigned Offset) const {
39   MCSymbolRefExpr::VariantKind Kind;
40   const MCSymbol *Symbol;
41 
42   switch(MO.getTargetFlags()) {
43   default:                   llvm_unreachable("Invalid target flag!");
44   case MipsII::MO_NO_FLAG:   Kind = MCSymbolRefExpr::VK_None; break;
45   case MipsII::MO_GPREL:     Kind = MCSymbolRefExpr::VK_Mips_GPREL; break;
46   case MipsII::MO_GOT_CALL:  Kind = MCSymbolRefExpr::VK_Mips_GOT_CALL; break;
47   case MipsII::MO_GOT16:     Kind = MCSymbolRefExpr::VK_Mips_GOT16; break;
48   case MipsII::MO_GOT:       Kind = MCSymbolRefExpr::VK_Mips_GOT; break;
49   case MipsII::MO_ABS_HI:    Kind = MCSymbolRefExpr::VK_Mips_ABS_HI; break;
50   case MipsII::MO_ABS_LO:    Kind = MCSymbolRefExpr::VK_Mips_ABS_LO; break;
51   case MipsII::MO_TLSGD:     Kind = MCSymbolRefExpr::VK_Mips_TLSGD; break;
52   case MipsII::MO_TLSLDM:    Kind = MCSymbolRefExpr::VK_Mips_TLSLDM; break;
53   case MipsII::MO_DTPREL_HI: Kind = MCSymbolRefExpr::VK_Mips_DTPREL_HI; break;
54   case MipsII::MO_DTPREL_LO: Kind = MCSymbolRefExpr::VK_Mips_DTPREL_LO; break;
55   case MipsII::MO_GOTTPREL:  Kind = MCSymbolRefExpr::VK_Mips_GOTTPREL; break;
56   case MipsII::MO_TPREL_HI:  Kind = MCSymbolRefExpr::VK_Mips_TPREL_HI; break;
57   case MipsII::MO_TPREL_LO:  Kind = MCSymbolRefExpr::VK_Mips_TPREL_LO; break;
58   case MipsII::MO_GPOFF_HI:  Kind = MCSymbolRefExpr::VK_Mips_GPOFF_HI; break;
59   case MipsII::MO_GPOFF_LO:  Kind = MCSymbolRefExpr::VK_Mips_GPOFF_LO; break;
60   case MipsII::MO_GOT_DISP:  Kind = MCSymbolRefExpr::VK_Mips_GOT_DISP; break;
61   case MipsII::MO_GOT_PAGE:  Kind = MCSymbolRefExpr::VK_Mips_GOT_PAGE; break;
62   case MipsII::MO_GOT_OFST:  Kind = MCSymbolRefExpr::VK_Mips_GOT_OFST; break;
63   case MipsII::MO_HIGHER:    Kind = MCSymbolRefExpr::VK_Mips_HIGHER; break;
64   case MipsII::MO_HIGHEST:   Kind = MCSymbolRefExpr::VK_Mips_HIGHEST; break;
65   case MipsII::MO_GOT_HI16:  Kind = MCSymbolRefExpr::VK_Mips_GOT_HI16; break;
66   case MipsII::MO_GOT_LO16:  Kind = MCSymbolRefExpr::VK_Mips_GOT_LO16; break;
67   case MipsII::MO_CALL_HI16: Kind = MCSymbolRefExpr::VK_Mips_CALL_HI16; break;
68   case MipsII::MO_CALL_LO16: Kind = MCSymbolRefExpr::VK_Mips_CALL_LO16; break;
69   }
70 
71   switch (MOTy) {
72   case MachineOperand::MO_MachineBasicBlock:
73     Symbol = MO.getMBB()->getSymbol();
74     break;
75 
76   case MachineOperand::MO_GlobalAddress:
77     Symbol = AsmPrinter.getSymbol(MO.getGlobal());
78     Offset += MO.getOffset();
79     break;
80 
81   case MachineOperand::MO_BlockAddress:
82     Symbol = AsmPrinter.GetBlockAddressSymbol(MO.getBlockAddress());
83     Offset += MO.getOffset();
84     break;
85 
86   case MachineOperand::MO_ExternalSymbol:
87     Symbol = AsmPrinter.GetExternalSymbolSymbol(MO.getSymbolName());
88     Offset += MO.getOffset();
89     break;
90 
91   case MachineOperand::MO_JumpTableIndex:
92     Symbol = AsmPrinter.GetJTISymbol(MO.getIndex());
93     break;
94 
95   case MachineOperand::MO_ConstantPoolIndex:
96     Symbol = AsmPrinter.GetCPISymbol(MO.getIndex());
97     Offset += MO.getOffset();
98     break;
99 
100   default:
101     llvm_unreachable("<unknown operand type>");
102   }
103 
104   const MCSymbolRefExpr *MCSym = MCSymbolRefExpr::Create(Symbol, Kind, *Ctx);
105 
106   if (!Offset)
107     return MCOperand::CreateExpr(MCSym);
108 
109   // Assume offset is never negative.
110   assert(Offset > 0);
111 
112   const MCConstantExpr *OffsetExpr =  MCConstantExpr::Create(Offset, *Ctx);
113   const MCBinaryExpr *Add = MCBinaryExpr::CreateAdd(MCSym, OffsetExpr, *Ctx);
114   return MCOperand::CreateExpr(Add);
115 }
116 
117 /*
118 static void CreateMCInst(MCInst& Inst, unsigned Opc, const MCOperand &Opnd0,
119                          const MCOperand &Opnd1,
120                          const MCOperand &Opnd2 = MCOperand()) {
121   Inst.setOpcode(Opc);
122   Inst.addOperand(Opnd0);
123   Inst.addOperand(Opnd1);
124   if (Opnd2.isValid())
125     Inst.addOperand(Opnd2);
126 }
127 */
128 
129 MCOperand MipsMCInstLower::LowerOperand(const MachineOperand &MO,
130                                         unsigned offset) const {
131   MachineOperandType MOTy = MO.getType();
132 
133   switch (MOTy) {
134   default: llvm_unreachable("unknown operand type");
135   case MachineOperand::MO_Register:
136     // Ignore all implicit register operands.
137     if (MO.isImplicit()) break;
138     return MCOperand::CreateReg(MO.getReg());
139   case MachineOperand::MO_Immediate:
140     return MCOperand::CreateImm(MO.getImm() + offset);
141   case MachineOperand::MO_MachineBasicBlock:
142   case MachineOperand::MO_GlobalAddress:
143   case MachineOperand::MO_ExternalSymbol:
144   case MachineOperand::MO_JumpTableIndex:
145   case MachineOperand::MO_ConstantPoolIndex:
146   case MachineOperand::MO_BlockAddress:
147     return LowerSymbolOperand(MO, MOTy, offset);
148   case MachineOperand::MO_RegisterMask:
149     break;
150  }
151 
152   return MCOperand();
153 }
154 
155 MCOperand MipsMCInstLower::createSub(MachineBasicBlock *BB1,
156                                      MachineBasicBlock *BB2,
157                                      MCSymbolRefExpr::VariantKind Kind) const {
158   const MCSymbolRefExpr *Sym1 = MCSymbolRefExpr::Create(BB1->getSymbol(), *Ctx);
159   const MCSymbolRefExpr *Sym2 = MCSymbolRefExpr::Create(BB2->getSymbol(), *Ctx);
160   const MCBinaryExpr *Sub = MCBinaryExpr::CreateSub(Sym1, Sym2, *Ctx);
161 
162   return MCOperand::CreateExpr(MipsMCExpr::Create(Kind, Sub, *Ctx));
163 }
164 
165 void MipsMCInstLower::
166 lowerLongBranchLUi(const MachineInstr *MI, MCInst &OutMI) const {
167   OutMI.setOpcode(Mips::LUi);
168 
169   // Lower register operand.
170   OutMI.addOperand(LowerOperand(MI->getOperand(0)));
171 
172   // Create %hi($tgt-$baltgt).
173   OutMI.addOperand(createSub(MI->getOperand(1).getMBB(),
174                              MI->getOperand(2).getMBB(),
175                              MCSymbolRefExpr::VK_Mips_ABS_HI));
176 }
177 
178 void MipsMCInstLower::
179 lowerLongBranchADDiu(const MachineInstr *MI, MCInst &OutMI, int Opcode,
180                      MCSymbolRefExpr::VariantKind Kind) const {
181   OutMI.setOpcode(Opcode);
182 
183   // Lower two register operands.
184   for (unsigned I = 0, E = 2; I != E; ++I) {
185     const MachineOperand &MO = MI->getOperand(I);
186     OutMI.addOperand(LowerOperand(MO));
187   }
188 
189   // Create %lo($tgt-$baltgt) or %hi($tgt-$baltgt).
190   OutMI.addOperand(createSub(MI->getOperand(2).getMBB(),
191                              MI->getOperand(3).getMBB(), Kind));
192 }
193 
194 bool MipsMCInstLower::lowerLongBranch(const MachineInstr *MI,
195                                       MCInst &OutMI) const {
196   switch (MI->getOpcode()) {
197   default:
198     return false;
199   case Mips::LONG_BRANCH_LUi:
200     lowerLongBranchLUi(MI, OutMI);
201     return true;
202   case Mips::LONG_BRANCH_ADDiu:
203     lowerLongBranchADDiu(MI, OutMI, Mips::ADDiu,
204                          MCSymbolRefExpr::VK_Mips_ABS_LO);
205     return true;
206   case Mips::LONG_BRANCH_DADDiu:
207     unsigned TargetFlags = MI->getOperand(2).getTargetFlags();
208     if (TargetFlags == MipsII::MO_ABS_HI)
209       lowerLongBranchADDiu(MI, OutMI, Mips::DADDiu,
210                            MCSymbolRefExpr::VK_Mips_ABS_HI);
211     else if (TargetFlags == MipsII::MO_ABS_LO)
212       lowerLongBranchADDiu(MI, OutMI, Mips::DADDiu,
213                            MCSymbolRefExpr::VK_Mips_ABS_LO);
214     else
215       report_fatal_error("Unexpected flags for LONG_BRANCH_DADDiu");
216     return true;
217   }
218 }
219 
220 void MipsMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
221   if (lowerLongBranch(MI, OutMI))
222     return;
223 
224   OutMI.setOpcode(MI->getOpcode());
225 
226   for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
227     const MachineOperand &MO = MI->getOperand(i);
228     MCOperand MCOp = LowerOperand(MO);
229 
230     if (MCOp.isValid())
231       OutMI.addOperand(MCOp);
232   }
233 }
234 
235