1 //===-- MipsMCInstLower.cpp - Convert Mips MachineInstr to MCInst ---------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains code to lower Mips MachineInstrs to their corresponding
11 // MCInst records.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #include "MipsMCInstLower.h"
16 #include "MipsAsmPrinter.h"
17 #include "MipsInstrInfo.h"
18 #include "MCTargetDesc/MipsBaseInfo.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/MachineInstr.h"
21 #include "llvm/CodeGen/MachineOperand.h"
22 #include "llvm/MC/MCContext.h"
23 #include "llvm/MC/MCExpr.h"
24 #include "llvm/MC/MCInst.h"
25 #include "llvm/Target/Mangler.h"
26 
27 using namespace llvm;
28 
29 MipsMCInstLower::MipsMCInstLower(MipsAsmPrinter &asmprinter)
30   : AsmPrinter(asmprinter) {}
31 
32 void MipsMCInstLower::Initialize(Mangler *M, MCContext *C) {
33   Mang = M;
34   Ctx = C;
35 }
36 
37 MCOperand MipsMCInstLower::LowerSymbolOperand(const MachineOperand &MO,
38                                               MachineOperandType MOTy,
39                                               unsigned Offset) const {
40   MCSymbolRefExpr::VariantKind Kind;
41   const MCSymbol *Symbol;
42 
43   switch(MO.getTargetFlags()) {
44   default:                   llvm_unreachable("Invalid target flag!");
45   case MipsII::MO_NO_FLAG:   Kind = MCSymbolRefExpr::VK_None; break;
46   case MipsII::MO_GPREL:     Kind = MCSymbolRefExpr::VK_Mips_GPREL; break;
47   case MipsII::MO_GOT_CALL:  Kind = MCSymbolRefExpr::VK_Mips_GOT_CALL; break;
48   case MipsII::MO_GOT16:     Kind = MCSymbolRefExpr::VK_Mips_GOT16; break;
49   case MipsII::MO_GOT:       Kind = MCSymbolRefExpr::VK_Mips_GOT; break;
50   case MipsII::MO_ABS_HI:    Kind = MCSymbolRefExpr::VK_Mips_ABS_HI; break;
51   case MipsII::MO_ABS_LO:    Kind = MCSymbolRefExpr::VK_Mips_ABS_LO; break;
52   case MipsII::MO_TLSGD:     Kind = MCSymbolRefExpr::VK_Mips_TLSGD; break;
53   case MipsII::MO_TLSLDM:    Kind = MCSymbolRefExpr::VK_Mips_TLSLDM; break;
54   case MipsII::MO_DTPREL_HI: Kind = MCSymbolRefExpr::VK_Mips_DTPREL_HI; break;
55   case MipsII::MO_DTPREL_LO: Kind = MCSymbolRefExpr::VK_Mips_DTPREL_LO; break;
56   case MipsII::MO_GOTTPREL:  Kind = MCSymbolRefExpr::VK_Mips_GOTTPREL; break;
57   case MipsII::MO_TPREL_HI:  Kind = MCSymbolRefExpr::VK_Mips_TPREL_HI; break;
58   case MipsII::MO_TPREL_LO:  Kind = MCSymbolRefExpr::VK_Mips_TPREL_LO; break;
59   case MipsII::MO_GPOFF_HI:  Kind = MCSymbolRefExpr::VK_Mips_GPOFF_HI; break;
60   case MipsII::MO_GPOFF_LO:  Kind = MCSymbolRefExpr::VK_Mips_GPOFF_LO; break;
61   case MipsII::MO_GOT_DISP:  Kind = MCSymbolRefExpr::VK_Mips_GOT_DISP; break;
62   case MipsII::MO_GOT_PAGE:  Kind = MCSymbolRefExpr::VK_Mips_GOT_PAGE; break;
63   case MipsII::MO_GOT_OFST:  Kind = MCSymbolRefExpr::VK_Mips_GOT_OFST; break;
64   case MipsII::MO_HIGHER:    Kind = MCSymbolRefExpr::VK_Mips_HIGHER; break;
65   case MipsII::MO_HIGHEST:   Kind = MCSymbolRefExpr::VK_Mips_HIGHEST; break;
66   }
67 
68   switch (MOTy) {
69   case MachineOperand::MO_MachineBasicBlock:
70     Symbol = MO.getMBB()->getSymbol();
71     break;
72 
73   case MachineOperand::MO_GlobalAddress:
74     Symbol = Mang->getSymbol(MO.getGlobal());
75     Offset += MO.getOffset();
76     break;
77 
78   case MachineOperand::MO_BlockAddress:
79     Symbol = AsmPrinter.GetBlockAddressSymbol(MO.getBlockAddress());
80     Offset += MO.getOffset();
81     break;
82 
83   case MachineOperand::MO_ExternalSymbol:
84     Symbol = AsmPrinter.GetExternalSymbolSymbol(MO.getSymbolName());
85     Offset += MO.getOffset();
86     break;
87 
88   case MachineOperand::MO_JumpTableIndex:
89     Symbol = AsmPrinter.GetJTISymbol(MO.getIndex());
90     break;
91 
92   case MachineOperand::MO_ConstantPoolIndex:
93     Symbol = AsmPrinter.GetCPISymbol(MO.getIndex());
94     Offset += MO.getOffset();
95     break;
96 
97   default:
98     llvm_unreachable("<unknown operand type>");
99   }
100 
101   const MCSymbolRefExpr *MCSym = MCSymbolRefExpr::Create(Symbol, Kind, *Ctx);
102 
103   if (!Offset)
104     return MCOperand::CreateExpr(MCSym);
105 
106   // Assume offset is never negative.
107   assert(Offset > 0);
108 
109   const MCConstantExpr *OffsetExpr =  MCConstantExpr::Create(Offset, *Ctx);
110   const MCBinaryExpr *Add = MCBinaryExpr::CreateAdd(MCSym, OffsetExpr, *Ctx);
111   return MCOperand::CreateExpr(Add);
112 }
113 
114 /*
115 static void CreateMCInst(MCInst& Inst, unsigned Opc, const MCOperand &Opnd0,
116                          const MCOperand &Opnd1,
117                          const MCOperand &Opnd2 = MCOperand()) {
118   Inst.setOpcode(Opc);
119   Inst.addOperand(Opnd0);
120   Inst.addOperand(Opnd1);
121   if (Opnd2.isValid())
122     Inst.addOperand(Opnd2);
123 }
124 */
125 
126 MCOperand MipsMCInstLower::LowerOperand(const MachineOperand &MO,
127                                         unsigned offset) const {
128   MachineOperandType MOTy = MO.getType();
129 
130   switch (MOTy) {
131   default: llvm_unreachable("unknown operand type");
132   case MachineOperand::MO_Register:
133     // Ignore all implicit register operands.
134     if (MO.isImplicit()) break;
135     return MCOperand::CreateReg(MO.getReg());
136   case MachineOperand::MO_Immediate:
137     return MCOperand::CreateImm(MO.getImm() + offset);
138   case MachineOperand::MO_MachineBasicBlock:
139   case MachineOperand::MO_GlobalAddress:
140   case MachineOperand::MO_ExternalSymbol:
141   case MachineOperand::MO_JumpTableIndex:
142   case MachineOperand::MO_ConstantPoolIndex:
143   case MachineOperand::MO_BlockAddress:
144     return LowerSymbolOperand(MO, MOTy, offset);
145   case MachineOperand::MO_RegisterMask:
146     break;
147  }
148 
149   return MCOperand();
150 }
151 
152 void MipsMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
153   OutMI.setOpcode(MI->getOpcode());
154 
155   for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
156     const MachineOperand &MO = MI->getOperand(i);
157     MCOperand MCOp = LowerOperand(MO);
158 
159     if (MCOp.isValid())
160       OutMI.addOperand(MCOp);
161   }
162 }
163 
164 // If the D<shift> instruction has a shift amount that is greater
165 // than 31 (checked in calling routine), lower it to a D<shift>32 instruction
166 void MipsMCInstLower::LowerLargeShift(const MachineInstr *MI,
167                                       MCInst& Inst,
168                                       int64_t Shift) {
169   // rt
170   Inst.addOperand(LowerOperand(MI->getOperand(0)));
171   // rd
172   Inst.addOperand(LowerOperand(MI->getOperand(1)));
173   // saminus32
174   Inst.addOperand(MCOperand::CreateImm(Shift));
175 
176   switch (MI->getOpcode()) {
177   default:
178     // Calling function is not synchronized
179     llvm_unreachable("Unexpected shift instruction");
180     break;
181   case Mips::DSLL:
182     Inst.setOpcode(Mips::DSLL32);
183     break;
184   case Mips::DSRL:
185     Inst.setOpcode(Mips::DSRL32);
186     break;
187   case Mips::DSRA:
188     Inst.setOpcode(Mips::DSRA32);
189     break;
190   }
191 }
192