1 //===- MipsLegalizerInfo.cpp ------------------------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 /// This file implements the targeting of the Machinelegalizer class for Mips.
10 /// \todo This should be generated by TableGen.
11 //===----------------------------------------------------------------------===//
12 
13 #include "MipsLegalizerInfo.h"
14 #include "MipsTargetMachine.h"
15 #include "llvm/CodeGen/GlobalISel/LegalizerHelper.h"
16 
17 using namespace llvm;
18 
19 MipsLegalizerInfo::MipsLegalizerInfo(const MipsSubtarget &ST) {
20   using namespace TargetOpcode;
21 
22   const LLT s1 = LLT::scalar(1);
23   const LLT s32 = LLT::scalar(32);
24   const LLT s64 = LLT::scalar(64);
25   const LLT p0 = LLT::pointer(0, 32);
26 
27   getActionDefinitionsBuilder({G_ADD, G_SUB})
28       .legalFor({s32})
29       .clampScalar(0, s32, s32);
30 
31   getActionDefinitionsBuilder(G_MUL)
32       .legalFor({s32})
33       .minScalar(0, s32);
34 
35   getActionDefinitionsBuilder({G_UADDO, G_UADDE, G_USUBO, G_USUBE, G_UMULO})
36       .lowerFor({{s32, s1}});
37 
38   getActionDefinitionsBuilder(G_UMULH)
39       .legalFor({s32});
40 
41   getActionDefinitionsBuilder({G_LOAD, G_STORE})
42       .legalForTypesWithMemDesc({{s32, p0, 8, 8},
43                                  {s32, p0, 16, 8},
44                                  {s32, p0, 32, 8},
45                                  {p0, p0, 32, 8}})
46       .minScalar(0, s32);
47 
48   getActionDefinitionsBuilder({G_ZEXTLOAD, G_SEXTLOAD})
49     .legalForTypesWithMemDesc({{s32, p0, 8, 8},
50                                {s32, p0, 16, 8}})
51       .minScalar(0, s32);
52 
53   getActionDefinitionsBuilder(G_SELECT)
54       .legalForCartesianProduct({p0, s32}, {s32})
55       .minScalar(0, s32)
56       .minScalar(1, s32);
57 
58   getActionDefinitionsBuilder(G_BRCOND)
59       .legalFor({s32})
60       .minScalar(0, s32);
61 
62   getActionDefinitionsBuilder(G_PHI)
63       .legalFor({p0, s32})
64       .minScalar(0, s32);
65 
66   getActionDefinitionsBuilder({G_AND, G_OR, G_XOR})
67       .legalFor({s32})
68       .clampScalar(0, s32, s32);
69 
70   getActionDefinitionsBuilder({G_SDIV, G_SREM, G_UREM, G_UDIV})
71       .legalFor({s32})
72       .minScalar(0, s32)
73       .libcallFor({s64});
74 
75   getActionDefinitionsBuilder({G_SHL, G_ASHR, G_LSHR})
76     .legalFor({s32, s32})
77     .minScalar(1, s32);
78 
79   getActionDefinitionsBuilder(G_ICMP)
80       .legalFor({{s32, s32}})
81       .minScalar(0, s32);
82 
83   getActionDefinitionsBuilder(G_CONSTANT)
84       .legalFor({s32})
85       .clampScalar(0, s32, s32);
86 
87   getActionDefinitionsBuilder(G_GEP)
88       .legalFor({{p0, s32}});
89 
90   getActionDefinitionsBuilder(G_FRAME_INDEX)
91       .legalFor({p0});
92 
93   getActionDefinitionsBuilder(G_GLOBAL_VALUE)
94       .legalFor({p0});
95 
96   computeTables();
97   verify(*ST.getInstrInfo());
98 }
99 
100 bool MipsLegalizerInfo::legalizeCustom(MachineInstr &MI,
101                                        MachineRegisterInfo &MRI,
102                                        MachineIRBuilder &MIRBuilder,
103                                        GISelChangeObserver &Observer) const {
104 
105   using namespace TargetOpcode;
106 
107   MIRBuilder.setInstr(MI);
108 
109   return false;
110 }
111