1 //===- MipsLegalizerInfo.cpp ------------------------------------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 /// \file 10 /// This file implements the targeting of the Machinelegalizer class for Mips. 11 /// \todo This should be generated by TableGen. 12 //===----------------------------------------------------------------------===// 13 14 #include "MipsLegalizerInfo.h" 15 #include "MipsTargetMachine.h" 16 #include "llvm/CodeGen/GlobalISel/LegalizerHelper.h" 17 18 using namespace llvm; 19 20 MipsLegalizerInfo::MipsLegalizerInfo(const MipsSubtarget &ST) { 21 using namespace TargetOpcode; 22 23 const LLT s1 = LLT::scalar(1); 24 const LLT s32 = LLT::scalar(32); 25 const LLT s64 = LLT::scalar(64); 26 const LLT p0 = LLT::pointer(0, 32); 27 28 getActionDefinitionsBuilder(G_ADD) 29 .legalFor({s32}) 30 .clampScalar(0, s32, s32); 31 32 getActionDefinitionsBuilder(G_UADDE) 33 .lowerFor({{s32, s1}}); 34 35 getActionDefinitionsBuilder({G_LOAD, G_STORE}) 36 .legalForCartesianProduct({p0, s32}, {p0}); 37 38 getActionDefinitionsBuilder({G_AND, G_OR, G_XOR}) 39 .legalFor({s32}) 40 .clampScalar(0, s32, s32); 41 42 getActionDefinitionsBuilder({G_SHL, G_ASHR, G_LSHR}) 43 .legalFor({s32}); 44 45 getActionDefinitionsBuilder({G_SDIV, G_SREM, G_UREM, G_UDIV}) 46 .legalFor({s32}) 47 .minScalar(0, s32) 48 .libcallFor({s64}); 49 50 getActionDefinitionsBuilder(G_ICMP) 51 .legalFor({{s32, s32}}) 52 .minScalar(0, s32); 53 54 getActionDefinitionsBuilder(G_CONSTANT) 55 .legalFor({s32}) 56 .clampScalar(0, s32, s32); 57 58 getActionDefinitionsBuilder(G_GEP) 59 .legalFor({{p0, s32}}); 60 61 getActionDefinitionsBuilder(G_FRAME_INDEX) 62 .legalFor({p0}); 63 64 getActionDefinitionsBuilder(G_GLOBAL_VALUE) 65 .legalFor({p0}); 66 67 computeTables(); 68 verify(*ST.getInstrInfo()); 69 } 70 71 bool MipsLegalizerInfo::legalizeCustom(MachineInstr &MI, 72 MachineRegisterInfo &MRI, 73 MachineIRBuilder &MIRBuilder, 74 GISelChangeObserver &Observer) const { 75 76 using namespace TargetOpcode; 77 78 MIRBuilder.setInstr(MI); 79 80 return false; 81 } 82