1 //===-- MipsISelDAGToDAG.cpp - A Dag to Dag Inst Selector for Mips --------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines an instruction selector for the MIPS target.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #define DEBUG_TYPE "mips-isel"
15 #include "MipsISelDAGToDAG.h"
16 #include "MCTargetDesc/MipsBaseInfo.h"
17 #include "Mips.h"
18 #include "Mips16ISelDAGToDAG.h"
19 #include "MipsMachineFunction.h"
20 #include "MipsRegisterInfo.h"
21 #include "MipsSEISelDAGToDAG.h"
22 #include "llvm/CodeGen/MachineConstantPool.h"
23 #include "llvm/CodeGen/MachineFrameInfo.h"
24 #include "llvm/CodeGen/MachineFunction.h"
25 #include "llvm/CodeGen/MachineInstrBuilder.h"
26 #include "llvm/CodeGen/MachineRegisterInfo.h"
27 #include "llvm/CodeGen/SelectionDAGNodes.h"
28 #include "llvm/IR/CFG.h"
29 #include "llvm/IR/GlobalValue.h"
30 #include "llvm/IR/Instructions.h"
31 #include "llvm/IR/Intrinsics.h"
32 #include "llvm/IR/Type.h"
33 #include "llvm/Support/Debug.h"
34 #include "llvm/Support/ErrorHandling.h"
35 #include "llvm/Support/raw_ostream.h"
36 #include "llvm/Target/TargetMachine.h"
37 using namespace llvm;
38 
39 //===----------------------------------------------------------------------===//
40 // Instruction Selector Implementation
41 //===----------------------------------------------------------------------===//
42 
43 //===----------------------------------------------------------------------===//
44 // MipsDAGToDAGISel - MIPS specific code to select MIPS machine
45 // instructions for SelectionDAG operations.
46 //===----------------------------------------------------------------------===//
47 
48 bool MipsDAGToDAGISel::runOnMachineFunction(MachineFunction &MF) {
49   bool Ret = SelectionDAGISel::runOnMachineFunction(MF);
50 
51   processFunctionAfterISel(MF);
52 
53   return Ret;
54 }
55 
56 /// getGlobalBaseReg - Output the instructions required to put the
57 /// GOT address into a register.
58 SDNode *MipsDAGToDAGISel::getGlobalBaseReg() {
59   unsigned GlobalBaseReg = MF->getInfo<MipsFunctionInfo>()->getGlobalBaseReg();
60   return CurDAG->getRegister(GlobalBaseReg,
61                              getTargetLowering()->getPointerTy()).getNode();
62 }
63 
64 /// ComplexPattern used on MipsInstrInfo
65 /// Used on Mips Load/Store instructions
66 bool MipsDAGToDAGISel::selectAddrRegImm(SDValue Addr, SDValue &Base,
67                                         SDValue &Offset) const {
68   llvm_unreachable("Unimplemented function.");
69   return false;
70 }
71 
72 bool MipsDAGToDAGISel::selectAddrRegReg(SDValue Addr, SDValue &Base,
73                                         SDValue &Offset) const {
74   llvm_unreachable("Unimplemented function.");
75   return false;
76 }
77 
78 bool MipsDAGToDAGISel::selectAddrDefault(SDValue Addr, SDValue &Base,
79                                          SDValue &Offset) const {
80   llvm_unreachable("Unimplemented function.");
81   return false;
82 }
83 
84 bool MipsDAGToDAGISel::selectIntAddr(SDValue Addr, SDValue &Base,
85                                      SDValue &Offset) const {
86   llvm_unreachable("Unimplemented function.");
87   return false;
88 }
89 
90 bool MipsDAGToDAGISel::selectIntAddrMM(SDValue Addr, SDValue &Base,
91                                        SDValue &Offset) const {
92   llvm_unreachable("Unimplemented function.");
93   return false;
94 }
95 
96 bool MipsDAGToDAGISel::selectIntAddrMSA(SDValue Addr, SDValue &Base,
97                                         SDValue &Offset) const {
98   llvm_unreachable("Unimplemented function.");
99   return false;
100 }
101 
102 bool MipsDAGToDAGISel::selectAddr16(SDNode *Parent, SDValue N, SDValue &Base,
103                                     SDValue &Offset, SDValue &Alias) {
104   llvm_unreachable("Unimplemented function.");
105   return false;
106 }
107 
108 bool MipsDAGToDAGISel::selectVSplat(SDNode *N, APInt &Imm) const {
109   llvm_unreachable("Unimplemented function.");
110   return false;
111 }
112 
113 bool MipsDAGToDAGISel::selectVSplatUimm1(SDValue N, SDValue &Imm) const {
114   llvm_unreachable("Unimplemented function.");
115   return false;
116 }
117 
118 bool MipsDAGToDAGISel::selectVSplatUimm2(SDValue N, SDValue &Imm) const {
119   llvm_unreachable("Unimplemented function.");
120   return false;
121 }
122 
123 bool MipsDAGToDAGISel::selectVSplatUimm3(SDValue N, SDValue &Imm) const {
124   llvm_unreachable("Unimplemented function.");
125   return false;
126 }
127 
128 bool MipsDAGToDAGISel::selectVSplatUimm4(SDValue N, SDValue &Imm) const {
129   llvm_unreachable("Unimplemented function.");
130   return false;
131 }
132 
133 bool MipsDAGToDAGISel::selectVSplatUimm5(SDValue N, SDValue &Imm) const {
134   llvm_unreachable("Unimplemented function.");
135   return false;
136 }
137 
138 bool MipsDAGToDAGISel::selectVSplatUimm6(SDValue N, SDValue &Imm) const {
139   llvm_unreachable("Unimplemented function.");
140   return false;
141 }
142 
143 bool MipsDAGToDAGISel::selectVSplatUimm8(SDValue N, SDValue &Imm) const {
144   llvm_unreachable("Unimplemented function.");
145   return false;
146 }
147 
148 bool MipsDAGToDAGISel::selectVSplatSimm5(SDValue N, SDValue &Imm) const {
149   llvm_unreachable("Unimplemented function.");
150   return false;
151 }
152 
153 bool MipsDAGToDAGISel::selectVSplatUimmPow2(SDValue N, SDValue &Imm) const {
154   llvm_unreachable("Unimplemented function.");
155   return false;
156 }
157 
158 bool MipsDAGToDAGISel::selectVSplatUimmInvPow2(SDValue N, SDValue &Imm) const {
159   llvm_unreachable("Unimplemented function.");
160   return false;
161 }
162 
163 bool MipsDAGToDAGISel::selectVSplatMaskL(SDValue N, SDValue &Imm) const {
164   llvm_unreachable("Unimplemented function.");
165   return false;
166 }
167 
168 bool MipsDAGToDAGISel::selectVSplatMaskR(SDValue N, SDValue &Imm) const {
169   llvm_unreachable("Unimplemented function.");
170   return false;
171 }
172 
173 /// Select instructions not customized! Used for
174 /// expanded, promoted and normal instructions
175 SDNode* MipsDAGToDAGISel::Select(SDNode *Node) {
176   unsigned Opcode = Node->getOpcode();
177 
178   // Dump information about the Node being selected
179   DEBUG(errs() << "Selecting: "; Node->dump(CurDAG); errs() << "\n");
180 
181   // If we have a custom node, we already have selected!
182   if (Node->isMachineOpcode()) {
183     DEBUG(errs() << "== "; Node->dump(CurDAG); errs() << "\n");
184     Node->setNodeId(-1);
185     return NULL;
186   }
187 
188   // See if subclasses can handle this node.
189   std::pair<bool, SDNode*> Ret = selectNode(Node);
190 
191   if (Ret.first)
192     return Ret.second;
193 
194   switch(Opcode) {
195   default: break;
196 
197   // Get target GOT address.
198   case ISD::GLOBAL_OFFSET_TABLE:
199     return getGlobalBaseReg();
200 
201 #ifndef NDEBUG
202   case ISD::LOAD:
203   case ISD::STORE:
204     assert(cast<MemSDNode>(Node)->getMemoryVT().getSizeInBits() / 8 <=
205            cast<MemSDNode>(Node)->getAlignment() &&
206            "Unexpected unaligned loads/stores.");
207     break;
208 #endif
209   }
210 
211   // Select the default instruction
212   SDNode *ResNode = SelectCode(Node);
213 
214   DEBUG(errs() << "=> ");
215   if (ResNode == NULL || ResNode == Node)
216     DEBUG(Node->dump(CurDAG));
217   else
218     DEBUG(ResNode->dump(CurDAG));
219   DEBUG(errs() << "\n");
220   return ResNode;
221 }
222 
223 bool MipsDAGToDAGISel::
224 SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode,
225                              std::vector<SDValue> &OutOps) {
226   assert(ConstraintCode == 'm' && "unexpected asm memory constraint");
227   OutOps.push_back(Op);
228   return false;
229 }
230 
231 /// createMipsISelDag - This pass converts a legalized DAG into a
232 /// MIPS-specific DAG, ready for instruction scheduling.
233 FunctionPass *llvm::createMipsISelDag(MipsTargetMachine &TM) {
234   if (TM.getSubtargetImpl()->inMips16Mode())
235     return llvm::createMips16ISelDag(TM);
236 
237   return llvm::createMipsSEISelDag(TM);
238 }
239