1 //=======- MipsFrameLowering.cpp - Mips Frame Information ------*- C++ -*-====//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the Mips implementation of TargetFrameLowering class.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "MipsFrameLowering.h"
15 #include "MipsInstrInfo.h"
16 #include "MipsMachineFunction.h"
17 #include "llvm/Function.h"
18 #include "llvm/CodeGen/MachineFrameInfo.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/MachineInstrBuilder.h"
21 #include "llvm/CodeGen/MachineModuleInfo.h"
22 #include "llvm/CodeGen/MachineRegisterInfo.h"
23 #include "llvm/Target/TargetData.h"
24 #include "llvm/Target/TargetOptions.h"
25 #include "llvm/Support/CommandLine.h"
26 
27 using namespace llvm;
28 
29 
30 //===----------------------------------------------------------------------===//
31 //
32 // Stack Frame Processing methods
33 // +----------------------------+
34 //
35 // The stack is allocated decrementing the stack pointer on
36 // the first instruction of a function prologue. Once decremented,
37 // all stack references are done thought a positive offset
38 // from the stack/frame pointer, so the stack is considering
39 // to grow up! Otherwise terrible hacks would have to be made
40 // to get this stack ABI compliant :)
41 //
42 //  The stack frame required by the ABI (after call):
43 //  Offset
44 //
45 //  0                 ----------
46 //  4                 Args to pass
47 //  .                 saved $GP  (used in PIC)
48 //  .                 Alloca allocations
49 //  .                 Local Area
50 //  .                 CPU "Callee Saved" Registers
51 //  .                 saved FP
52 //  .                 saved RA
53 //  .                 FPU "Callee Saved" Registers
54 //  StackSize         -----------
55 //
56 // Offset - offset from sp after stack allocation on function prologue
57 //
58 // The sp is the stack pointer subtracted/added from the stack size
59 // at the Prologue/Epilogue
60 //
61 // References to the previous stack (to obtain arguments) are done
62 // with offsets that exceeds the stack size: (stacksize+(4*(num_arg-1))
63 //
64 // Examples:
65 // - reference to the actual stack frame
66 //   for any local area var there is smt like : FI >= 0, StackOffset: 4
67 //     sw REGX, 4(SP)
68 //
69 // - reference to previous stack frame
70 //   suppose there's a load to the 5th arguments : FI < 0, StackOffset: 16.
71 //   The emitted instruction will be something like:
72 //     lw REGX, 16+StackSize(SP)
73 //
74 // Since the total stack size is unknown on LowerFormalArguments, all
75 // stack references (ObjectOffset) created to reference the function
76 // arguments, are negative numbers. This way, on eliminateFrameIndex it's
77 // possible to detect those references and the offsets are adjusted to
78 // their real location.
79 //
80 //===----------------------------------------------------------------------===//
81 
82 // hasFP - Return true if the specified function should have a dedicated frame
83 // pointer register.  This is true if the function has variable sized allocas or
84 // if frame pointer elimination is disabled.
85 bool MipsFrameLowering::hasFP(const MachineFunction &MF) const {
86   const MachineFrameInfo *MFI = MF.getFrameInfo();
87   return DisableFramePointerElim(MF) || MFI->hasVarSizedObjects()
88       || MFI->isFrameAddressTaken();
89 }
90 
91 bool MipsFrameLowering::targetHandlesStackFrameRounding() const {
92   return true;
93 }
94 
95 static unsigned AlignOffset(unsigned Offset, unsigned Align) {
96   return (Offset + Align - 1) / Align * Align;
97 }
98 
99 // expand pair of register and immediate if the immediate doesn't fit in the
100 // 16-bit offset field.
101 // e.g.
102 //  if OrigImm = 0x10000, OrigReg = $sp:
103 //    generate the following sequence of instrs:
104 //      lui  $at, hi(0x10000)
105 //      addu $at, $sp, $at
106 //
107 //    (NewReg, NewImm) = ($at, lo(Ox10000))
108 //    return true
109 static bool expandRegLargeImmPair(unsigned OrigReg, int OrigImm,
110                                   unsigned& NewReg, int& NewImm,
111                                   MachineBasicBlock& MBB,
112                                   MachineBasicBlock::iterator I) {
113   // OrigImm fits in the 16-bit field
114   if (OrigImm < 0x8000 && OrigImm >= -0x8000) {
115     NewReg = OrigReg;
116     NewImm = OrigImm;
117     return false;
118   }
119 
120   MachineFunction* MF = MBB.getParent();
121   const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
122   DebugLoc DL = I->getDebugLoc();
123   int ImmLo = (short)(OrigImm & 0xffff);
124   int ImmHi = (((unsigned)OrigImm & 0xffff0000) >> 16) +
125               ((OrigImm & 0x8000) != 0);
126 
127   // FIXME: change this when mips goes MC".
128   BuildMI(MBB, I, DL, TII->get(Mips::NOAT));
129   BuildMI(MBB, I, DL, TII->get(Mips::LUi), Mips::AT).addImm(ImmHi);
130   BuildMI(MBB, I, DL, TII->get(Mips::ADDu), Mips::AT).addReg(OrigReg)
131                                                      .addReg(Mips::AT);
132   NewReg = Mips::AT;
133   NewImm = ImmLo;
134 
135   return true;
136 }
137 
138 void MipsFrameLowering::emitPrologue(MachineFunction &MF) const {
139   MachineBasicBlock &MBB   = MF.front();
140   MachineFrameInfo *MFI    = MF.getFrameInfo();
141   MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>();
142   const MipsRegisterInfo *RegInfo =
143     static_cast<const MipsRegisterInfo*>(MF.getTarget().getRegisterInfo());
144   const MipsInstrInfo &TII =
145     *static_cast<const MipsInstrInfo*>(MF.getTarget().getInstrInfo());
146   MachineBasicBlock::iterator MBBI = MBB.begin();
147   DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
148   bool isPIC = (MF.getTarget().getRelocationModel() == Reloc::PIC_);
149   unsigned NewReg = 0;
150   int NewImm = 0;
151   bool ATUsed;
152 
153   // First, compute final stack size.
154   unsigned RegSize = STI.isGP32bit() ? 4 : 8;
155   unsigned StackAlign = getStackAlignment();
156   unsigned LocalVarAreaOffset = MipsFI->needGPSaveRestore() ?
157     (MFI->getObjectOffset(MipsFI->getGPFI()) + RegSize) :
158     MipsFI->getMaxCallFrameSize();
159   unsigned StackSize = AlignOffset(LocalVarAreaOffset, StackAlign) +
160     AlignOffset(MFI->getStackSize(), StackAlign);
161 
162    // Update stack size
163   MFI->setStackSize(StackSize);
164 
165   BuildMI(MBB, MBBI, dl, TII.get(Mips::NOREORDER));
166 
167   // TODO: check need from GP here.
168   if (isPIC && STI.isABI_O32())
169     BuildMI(MBB, MBBI, dl, TII.get(Mips::CPLOAD))
170       .addReg(RegInfo->getPICCallReg());
171   BuildMI(MBB, MBBI, dl, TII.get(Mips::NOMACRO));
172 
173   // No need to allocate space on the stack.
174   if (StackSize == 0 && !MFI->adjustsStack()) return;
175 
176   // Adjust stack : addi sp, sp, (-imm)
177   ATUsed = expandRegLargeImmPair(Mips::SP, -StackSize, NewReg, NewImm, MBB,
178                                  MBBI);
179   BuildMI(MBB, MBBI, dl, TII.get(Mips::ADDiu), Mips::SP)
180     .addReg(NewReg).addImm(NewImm);
181 
182   // FIXME: change this when mips goes MC".
183   if (ATUsed)
184     BuildMI(MBB, MBBI, dl, TII.get(Mips::ATMACRO));
185 
186   // Find the instruction past the last instruction that saves a callee-saved
187   // register to the stack.
188   const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
189 
190   for (unsigned i = 0; i < CSI.size(); ++i)
191     ++MBBI;
192 
193   // if framepointer enabled, set it to point to the stack pointer.
194   if (hasFP(MF))
195     // Insert instruction "move $fp, $sp" at this location.
196     BuildMI(MBB, MBBI, dl, TII.get(Mips::ADDu), Mips::FP)
197       .addReg(Mips::SP).addReg(Mips::ZERO);
198 
199   // Restore GP from the saved stack location
200   if (MipsFI->needGPSaveRestore())
201     BuildMI(MBB, MBBI, dl, TII.get(Mips::CPRESTORE))
202       .addImm(MFI->getObjectOffset(MipsFI->getGPFI()));
203 
204   // EH Frame infomation.
205   MachineModuleInfo &MMI = MF.getMMI();
206   std::vector<MachineMove> &Moves = MMI.getFrameMoves();
207   MCSymbol *FrameLabel = MMI.getContext().CreateTempSymbol();
208   BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::PROLOG_LABEL)).addSym(FrameLabel);
209 
210   if (hasFP(MF)) {
211     MachineLocation SPDst(Mips::FP);
212     MachineLocation SPSrc(Mips::SP);
213     Moves.push_back(MachineMove(FrameLabel, SPDst, SPSrc));
214   }
215 
216   if (StackSize) {
217     MachineLocation SPDst(MachineLocation::VirtualFP);
218     MachineLocation SPSrc(MachineLocation::VirtualFP, -StackSize);
219     Moves.push_back(MachineMove(FrameLabel, SPDst, SPSrc));
220   }
221 
222   for (std::vector<CalleeSavedInfo>::const_iterator I = CSI.begin(),
223        E = CSI.end(); I != E; ++I) {
224     int64_t Offset = MFI->getObjectOffset(I->getFrameIdx());
225     MachineLocation CSDst(MachineLocation::VirtualFP, Offset);
226     MachineLocation CSSrc(I->getReg());
227     Moves.push_back(MachineMove(FrameLabel, CSDst, CSSrc));
228   }
229 }
230 
231 void MipsFrameLowering::emitEpilogue(MachineFunction &MF,
232                                  MachineBasicBlock &MBB) const {
233   MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
234   MachineFrameInfo *MFI            = MF.getFrameInfo();
235   const MipsInstrInfo &TII =
236     *static_cast<const MipsInstrInfo*>(MF.getTarget().getInstrInfo());
237   DebugLoc dl = MBBI->getDebugLoc();
238 
239   // Get the number of bytes from FrameInfo
240   unsigned StackSize = MFI->getStackSize();
241 
242   unsigned NewReg = 0;
243   int NewImm = 0;
244   bool ATUsed = false;
245 
246   // if framepointer enabled, restore the stack pointer.
247   if (hasFP(MF)) {
248     // Find the first instruction that restores a callee-saved register.
249     MachineBasicBlock::iterator I = MBBI;
250 
251     for (unsigned i = 0; i < MFI->getCalleeSavedInfo().size(); ++i)
252       --I;
253 
254     // Insert instruction "move $sp, $fp" at this location.
255     BuildMI(MBB, I, dl, TII.get(Mips::ADDu), Mips::SP)
256       .addReg(Mips::FP).addReg(Mips::ZERO);
257   }
258 
259   // adjust stack  : insert addi sp, sp, (imm)
260   if (StackSize) {
261     ATUsed = expandRegLargeImmPair(Mips::SP, StackSize, NewReg, NewImm, MBB,
262                                    MBBI);
263     BuildMI(MBB, MBBI, dl, TII.get(Mips::ADDiu), Mips::SP)
264       .addReg(NewReg).addImm(NewImm);
265 
266     // FIXME: change this when mips goes MC".
267     if (ATUsed)
268       BuildMI(MBB, MBBI, dl, TII.get(Mips::ATMACRO));
269   }
270 }
271 
272 void
273 MipsFrameLowering::getInitialFrameState(std::vector<MachineMove> &Moves) const {
274   MachineLocation Dst(MachineLocation::VirtualFP);
275   MachineLocation Src(Mips::SP, 0);
276   Moves.push_back(MachineMove(0, Dst, Src));
277 }
278 
279 void MipsFrameLowering::
280 processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
281                                      RegScavenger *RS) const {
282   MachineRegisterInfo& MRI = MF.getRegInfo();
283 
284   // FIXME: remove this code if register allocator can correctly mark
285   //        $fp and $ra used or unused.
286 
287   // Mark $fp and $ra as used or unused.
288   if (hasFP(MF))
289     MRI.setPhysRegUsed(Mips::FP);
290 
291   // The register allocator might determine $ra is used after seeing
292   // instruction "jr $ra", but we do not want PrologEpilogInserter to insert
293   // instructions to save/restore $ra unless there is a function call.
294   // To correct this, $ra is explicitly marked unused if there is no
295   // function call.
296   if (MF.getFrameInfo()->hasCalls())
297     MRI.setPhysRegUsed(Mips::RA);
298   else
299     MRI.setPhysRegUnused(Mips::RA);
300 }
301