1 //===-- MipsFrameLowering.cpp - Mips Frame Information --------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains the Mips implementation of TargetFrameLowering class. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "MipsFrameLowering.h" 15 #include "MCTargetDesc/MipsBaseInfo.h" 16 #include "MipsInstrInfo.h" 17 #include "MipsMachineFunction.h" 18 #include "MipsTargetMachine.h" 19 #include "llvm/CodeGen/MachineFrameInfo.h" 20 #include "llvm/CodeGen/MachineFunction.h" 21 #include "llvm/CodeGen/MachineInstrBuilder.h" 22 #include "llvm/CodeGen/MachineModuleInfo.h" 23 #include "llvm/CodeGen/MachineRegisterInfo.h" 24 #include "llvm/IR/DataLayout.h" 25 #include "llvm/IR/Function.h" 26 #include "llvm/Support/CommandLine.h" 27 #include "llvm/Target/TargetOptions.h" 28 29 using namespace llvm; 30 31 32 //===----------------------------------------------------------------------===// 33 // 34 // Stack Frame Processing methods 35 // +----------------------------+ 36 // 37 // The stack is allocated decrementing the stack pointer on 38 // the first instruction of a function prologue. Once decremented, 39 // all stack references are done thought a positive offset 40 // from the stack/frame pointer, so the stack is considering 41 // to grow up! Otherwise terrible hacks would have to be made 42 // to get this stack ABI compliant :) 43 // 44 // The stack frame required by the ABI (after call): 45 // Offset 46 // 47 // 0 ---------- 48 // 4 Args to pass 49 // . saved $GP (used in PIC) 50 // . Alloca allocations 51 // . Local Area 52 // . CPU "Callee Saved" Registers 53 // . saved FP 54 // . saved RA 55 // . FPU "Callee Saved" Registers 56 // StackSize ----------- 57 // 58 // Offset - offset from sp after stack allocation on function prologue 59 // 60 // The sp is the stack pointer subtracted/added from the stack size 61 // at the Prologue/Epilogue 62 // 63 // References to the previous stack (to obtain arguments) are done 64 // with offsets that exceeds the stack size: (stacksize+(4*(num_arg-1)) 65 // 66 // Examples: 67 // - reference to the actual stack frame 68 // for any local area var there is smt like : FI >= 0, StackOffset: 4 69 // sw REGX, 4(SP) 70 // 71 // - reference to previous stack frame 72 // suppose there's a load to the 5th arguments : FI < 0, StackOffset: 16. 73 // The emitted instruction will be something like: 74 // lw REGX, 16+StackSize(SP) 75 // 76 // Since the total stack size is unknown on LowerFormalArguments, all 77 // stack references (ObjectOffset) created to reference the function 78 // arguments, are negative numbers. This way, on eliminateFrameIndex it's 79 // possible to detect those references and the offsets are adjusted to 80 // their real location. 81 // 82 //===----------------------------------------------------------------------===// 83 84 const MipsFrameLowering *MipsFrameLowering::create(const MipsSubtarget &ST) { 85 if (ST.inMips16Mode()) 86 return llvm::createMips16FrameLowering(ST); 87 88 return llvm::createMipsSEFrameLowering(ST); 89 } 90 91 // hasFP - Return true if the specified function should have a dedicated frame 92 // pointer register. This is true if the function has variable sized allocas, 93 // if it needs dynamic stack realignment, if frame pointer elimination is 94 // disabled, or if the frame address is taken. 95 bool MipsFrameLowering::hasFP(const MachineFunction &MF) const { 96 const MachineFrameInfo *MFI = MF.getFrameInfo(); 97 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); 98 99 return MF.getTarget().Options.DisableFramePointerElim(MF) || 100 MFI->hasVarSizedObjects() || MFI->isFrameAddressTaken() || 101 TRI->needsStackRealignment(MF); 102 } 103 104 bool MipsFrameLowering::hasBP(const MachineFunction &MF) const { 105 const MachineFrameInfo *MFI = MF.getFrameInfo(); 106 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); 107 108 return MFI->hasVarSizedObjects() && TRI->needsStackRealignment(MF); 109 } 110 111 uint64_t MipsFrameLowering::estimateStackSize(const MachineFunction &MF) const { 112 const MachineFrameInfo *MFI = MF.getFrameInfo(); 113 const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); 114 115 int64_t Offset = 0; 116 117 // Iterate over fixed sized objects. 118 for (int I = MFI->getObjectIndexBegin(); I != 0; ++I) 119 Offset = std::max(Offset, -MFI->getObjectOffset(I)); 120 121 // Conservatively assume all callee-saved registers will be saved. 122 for (const MCPhysReg *R = TRI.getCalleeSavedRegs(&MF); *R; ++R) { 123 unsigned Size = TRI.getMinimalPhysRegClass(*R)->getSize(); 124 Offset = alignTo(Offset + Size, Size); 125 } 126 127 unsigned MaxAlign = MFI->getMaxAlignment(); 128 129 // Check that MaxAlign is not zero if there is a stack object that is not a 130 // callee-saved spill. 131 assert(!MFI->getObjectIndexEnd() || MaxAlign); 132 133 // Iterate over other objects. 134 for (unsigned I = 0, E = MFI->getObjectIndexEnd(); I != E; ++I) 135 Offset = alignTo(Offset + MFI->getObjectSize(I), MaxAlign); 136 137 // Call frame. 138 if (MFI->adjustsStack() && hasReservedCallFrame(MF)) 139 Offset = alignTo(Offset + MFI->getMaxCallFrameSize(), 140 std::max(MaxAlign, getStackAlignment())); 141 142 return alignTo(Offset, getStackAlignment()); 143 } 144 145 // Eliminate ADJCALLSTACKDOWN, ADJCALLSTACKUP pseudo instructions 146 MachineBasicBlock::iterator MipsFrameLowering:: 147 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, 148 MachineBasicBlock::iterator I) const { 149 unsigned SP = STI.getABI().IsN64() ? Mips::SP_64 : Mips::SP; 150 151 if (!hasReservedCallFrame(MF)) { 152 int64_t Amount = I->getOperand(0).getImm(); 153 if (I->getOpcode() == Mips::ADJCALLSTACKDOWN) 154 Amount = -Amount; 155 156 STI.getInstrInfo()->adjustStackPtr(SP, Amount, MBB, I); 157 } 158 159 return MBB.erase(I); 160 } 161