1 //===-- MipsFrameLowering.cpp - Mips Frame Information --------------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the Mips implementation of TargetFrameLowering class.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "MipsFrameLowering.h"
15 #include "MipsAnalyzeImmediate.h"
16 #include "MipsInstrInfo.h"
17 #include "MipsMachineFunction.h"
18 #include "MCTargetDesc/MipsBaseInfo.h"
19 #include "llvm/Function.h"
20 #include "llvm/CodeGen/MachineFrameInfo.h"
21 #include "llvm/CodeGen/MachineFunction.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineModuleInfo.h"
24 #include "llvm/CodeGen/MachineRegisterInfo.h"
25 #include "llvm/Target/TargetData.h"
26 #include "llvm/Target/TargetOptions.h"
27 #include "llvm/Support/CommandLine.h"
28 
29 using namespace llvm;
30 
31 
32 //===----------------------------------------------------------------------===//
33 //
34 // Stack Frame Processing methods
35 // +----------------------------+
36 //
37 // The stack is allocated decrementing the stack pointer on
38 // the first instruction of a function prologue. Once decremented,
39 // all stack references are done thought a positive offset
40 // from the stack/frame pointer, so the stack is considering
41 // to grow up! Otherwise terrible hacks would have to be made
42 // to get this stack ABI compliant :)
43 //
44 //  The stack frame required by the ABI (after call):
45 //  Offset
46 //
47 //  0                 ----------
48 //  4                 Args to pass
49 //  .                 saved $GP  (used in PIC)
50 //  .                 Alloca allocations
51 //  .                 Local Area
52 //  .                 CPU "Callee Saved" Registers
53 //  .                 saved FP
54 //  .                 saved RA
55 //  .                 FPU "Callee Saved" Registers
56 //  StackSize         -----------
57 //
58 // Offset - offset from sp after stack allocation on function prologue
59 //
60 // The sp is the stack pointer subtracted/added from the stack size
61 // at the Prologue/Epilogue
62 //
63 // References to the previous stack (to obtain arguments) are done
64 // with offsets that exceeds the stack size: (stacksize+(4*(num_arg-1))
65 //
66 // Examples:
67 // - reference to the actual stack frame
68 //   for any local area var there is smt like : FI >= 0, StackOffset: 4
69 //     sw REGX, 4(SP)
70 //
71 // - reference to previous stack frame
72 //   suppose there's a load to the 5th arguments : FI < 0, StackOffset: 16.
73 //   The emitted instruction will be something like:
74 //     lw REGX, 16+StackSize(SP)
75 //
76 // Since the total stack size is unknown on LowerFormalArguments, all
77 // stack references (ObjectOffset) created to reference the function
78 // arguments, are negative numbers. This way, on eliminateFrameIndex it's
79 // possible to detect those references and the offsets are adjusted to
80 // their real location.
81 //
82 //===----------------------------------------------------------------------===//
83 
84 // hasFP - Return true if the specified function should have a dedicated frame
85 // pointer register.  This is true if the function has variable sized allocas or
86 // if frame pointer elimination is disabled.
87 bool MipsFrameLowering::hasFP(const MachineFunction &MF) const {
88   const MachineFrameInfo *MFI = MF.getFrameInfo();
89   return MF.getTarget().Options.DisableFramePointerElim(MF) ||
90       MFI->hasVarSizedObjects() || MFI->isFrameAddressTaken();
91 }
92 
93 void MipsFrameLowering::emitPrologue(MachineFunction &MF) const {
94   MachineBasicBlock &MBB   = MF.front();
95   MachineFrameInfo *MFI    = MF.getFrameInfo();
96   const MipsRegisterInfo *RegInfo =
97     static_cast<const MipsRegisterInfo*>(MF.getTarget().getRegisterInfo());
98   const MipsInstrInfo &TII =
99     *static_cast<const MipsInstrInfo*>(MF.getTarget().getInstrInfo());
100   MachineBasicBlock::iterator MBBI = MBB.begin();
101   DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
102   unsigned SP = STI.isABI_N64() ? Mips::SP_64 : Mips::SP;
103   unsigned FP = STI.isABI_N64() ? Mips::FP_64 : Mips::FP;
104   unsigned ZERO = STI.isABI_N64() ? Mips::ZERO_64 : Mips::ZERO;
105   unsigned ADDu = STI.isABI_N64() ? Mips::DADDu : Mips::ADDu;
106   unsigned ADDiu = STI.isABI_N64() ? Mips::DADDiu : Mips::ADDiu;
107 
108   // First, compute final stack size.
109   uint64_t StackSize = MFI->getStackSize();
110 
111   // No need to allocate space on the stack.
112   if (StackSize == 0 && !MFI->adjustsStack()) return;
113 
114   MachineModuleInfo &MMI = MF.getMMI();
115   std::vector<MachineMove> &Moves = MMI.getFrameMoves();
116   MachineLocation DstML, SrcML;
117 
118   // Adjust stack.
119   if (isInt<16>(-StackSize)) {// addi sp, sp, (-stacksize)
120     if (STI.inMips16Mode())
121       BuildMI(MBB, MBBI, dl,
122               TII.get(Mips::SaveRaF16)).addImm(StackSize); // cleanup
123     else
124       BuildMI(MBB, MBBI, dl, TII.get(ADDiu), SP).addReg(SP).addImm(-StackSize);
125   }
126   else { // Expand immediate that doesn't fit in 16-bit.
127     unsigned ATReg = STI.isABI_N64() ? Mips::AT_64 : Mips::AT;
128 
129     MF.getInfo<MipsFunctionInfo>()->setEmitNOAT();
130     Mips::loadImmediate(-StackSize, STI.isABI_N64(), TII, MBB, MBBI, dl, false,
131                         0);
132     BuildMI(MBB, MBBI, dl, TII.get(ADDu), SP).addReg(SP).addReg(ATReg);
133   }
134 
135   // emit ".cfi_def_cfa_offset StackSize"
136   MCSymbol *AdjustSPLabel = MMI.getContext().CreateTempSymbol();
137   BuildMI(MBB, MBBI, dl,
138           TII.get(TargetOpcode::PROLOG_LABEL)).addSym(AdjustSPLabel);
139   DstML = MachineLocation(MachineLocation::VirtualFP);
140   SrcML = MachineLocation(MachineLocation::VirtualFP, -StackSize);
141   Moves.push_back(MachineMove(AdjustSPLabel, DstML, SrcML));
142 
143   const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
144 
145   if (CSI.size()) {
146     // Find the instruction past the last instruction that saves a callee-saved
147     // register to the stack.
148     for (unsigned i = 0; i < CSI.size(); ++i)
149       ++MBBI;
150 
151     // Iterate over list of callee-saved registers and emit .cfi_offset
152     // directives.
153     MCSymbol *CSLabel = MMI.getContext().CreateTempSymbol();
154     BuildMI(MBB, MBBI, dl,
155             TII.get(TargetOpcode::PROLOG_LABEL)).addSym(CSLabel);
156 
157     for (std::vector<CalleeSavedInfo>::const_iterator I = CSI.begin(),
158            E = CSI.end(); I != E; ++I) {
159       int64_t Offset = MFI->getObjectOffset(I->getFrameIdx());
160       unsigned Reg = I->getReg();
161 
162       // If Reg is a double precision register, emit two cfa_offsets,
163       // one for each of the paired single precision registers.
164       if (Mips::AFGR64RegClass.contains(Reg)) {
165         MachineLocation DstML0(MachineLocation::VirtualFP, Offset);
166         MachineLocation DstML1(MachineLocation::VirtualFP, Offset + 4);
167         MachineLocation SrcML0(RegInfo->getSubReg(Reg, Mips::sub_fpeven));
168         MachineLocation SrcML1(RegInfo->getSubReg(Reg, Mips::sub_fpodd));
169 
170         if (!STI.isLittle())
171           std::swap(SrcML0, SrcML1);
172 
173         Moves.push_back(MachineMove(CSLabel, DstML0, SrcML0));
174         Moves.push_back(MachineMove(CSLabel, DstML1, SrcML1));
175       } else {
176         // Reg is either in CPURegs or FGR32.
177         DstML = MachineLocation(MachineLocation::VirtualFP, Offset);
178         SrcML = MachineLocation(Reg);
179         Moves.push_back(MachineMove(CSLabel, DstML, SrcML));
180       }
181     }
182   }
183 
184   // if framepointer enabled, set it to point to the stack pointer.
185   if (hasFP(MF)) {
186     // Insert instruction "move $fp, $sp" at this location.
187     BuildMI(MBB, MBBI, dl, TII.get(ADDu), FP).addReg(SP).addReg(ZERO);
188 
189     // emit ".cfi_def_cfa_register $fp"
190     MCSymbol *SetFPLabel = MMI.getContext().CreateTempSymbol();
191     BuildMI(MBB, MBBI, dl,
192             TII.get(TargetOpcode::PROLOG_LABEL)).addSym(SetFPLabel);
193     DstML = MachineLocation(FP);
194     SrcML = MachineLocation(MachineLocation::VirtualFP);
195     Moves.push_back(MachineMove(SetFPLabel, DstML, SrcML));
196   }
197 }
198 
199 void MipsFrameLowering::emitEpilogue(MachineFunction &MF,
200                                  MachineBasicBlock &MBB) const {
201   MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
202   MachineFrameInfo *MFI            = MF.getFrameInfo();
203   const MipsInstrInfo &TII =
204     *static_cast<const MipsInstrInfo*>(MF.getTarget().getInstrInfo());
205   DebugLoc dl = MBBI->getDebugLoc();
206   unsigned SP = STI.isABI_N64() ? Mips::SP_64 : Mips::SP;
207   unsigned FP = STI.isABI_N64() ? Mips::FP_64 : Mips::FP;
208   unsigned ZERO = STI.isABI_N64() ? Mips::ZERO_64 : Mips::ZERO;
209   unsigned ADDu = STI.isABI_N64() ? Mips::DADDu : Mips::ADDu;
210   unsigned ADDiu = STI.isABI_N64() ? Mips::DADDiu : Mips::ADDiu;
211 
212   // if framepointer enabled, restore the stack pointer.
213   if (hasFP(MF)) {
214     // Find the first instruction that restores a callee-saved register.
215     MachineBasicBlock::iterator I = MBBI;
216 
217     for (unsigned i = 0; i < MFI->getCalleeSavedInfo().size(); ++i)
218       --I;
219 
220     // Insert instruction "move $sp, $fp" at this location.
221     BuildMI(MBB, I, dl, TII.get(ADDu), SP).addReg(FP).addReg(ZERO);
222   }
223 
224   // Get the number of bytes from FrameInfo
225   uint64_t StackSize = MFI->getStackSize();
226 
227   if (!StackSize)
228     return;
229 
230   // Adjust stack.
231   if (isInt<16>(StackSize)) { // addi sp, sp, (-stacksize)
232     if (STI.inMips16Mode())
233       // assumes stacksize multiple of 8
234       BuildMI(MBB, MBBI, dl,
235               TII.get(Mips::RestoreRaF16)).addImm(StackSize);
236     else
237       BuildMI(MBB, MBBI, dl, TII.get(ADDiu), SP).addReg(SP).addImm(StackSize);
238   }
239   else { // Expand immediate that doesn't fit in 16-bit.
240     unsigned ATReg = STI.isABI_N64() ? Mips::AT_64 : Mips::AT;
241 
242     MF.getInfo<MipsFunctionInfo>()->setEmitNOAT();
243     Mips::loadImmediate(StackSize, STI.isABI_N64(), TII, MBB, MBBI, dl, false,
244                         0);
245     BuildMI(MBB, MBBI, dl, TII.get(ADDu), SP).addReg(SP).addReg(ATReg);
246   }
247 }
248 
249 void MipsFrameLowering::
250 processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
251                                      RegScavenger *RS) const {
252   MachineRegisterInfo &MRI = MF.getRegInfo();
253   unsigned FP = STI.isABI_N64() ? Mips::FP_64 : Mips::FP;
254 
255   // FIXME: remove this code if register allocator can correctly mark
256   //        $fp and $ra used or unused.
257 
258   // Mark $fp and $ra as used or unused.
259   if (hasFP(MF))
260     MRI.setPhysRegUsed(FP);
261 }
262 
263 bool MipsFrameLowering::
264 spillCalleeSavedRegisters(MachineBasicBlock &MBB,
265                           MachineBasicBlock::iterator MI,
266                           const std::vector<CalleeSavedInfo> &CSI,
267                           const TargetRegisterInfo *TRI) const {
268   MachineFunction *MF = MBB.getParent();
269   MachineBasicBlock *EntryBlock = MF->begin();
270   const TargetInstrInfo &TII = *MF->getTarget().getInstrInfo();
271 
272   for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
273     // Add the callee-saved register as live-in. Do not add if the register is
274     // RA and return address is taken, because it has already been added in
275     // method MipsTargetLowering::LowerRETURNADDR.
276     // It's killed at the spill, unless the register is RA and return address
277     // is taken.
278     unsigned Reg = CSI[i].getReg();
279     bool IsRAAndRetAddrIsTaken = (Reg == Mips::RA || Reg == Mips::RA_64)
280         && MF->getFrameInfo()->isReturnAddressTaken();
281     if (!IsRAAndRetAddrIsTaken)
282       EntryBlock->addLiveIn(Reg);
283 
284     // Insert the spill to the stack frame.
285     bool IsKill = !IsRAAndRetAddrIsTaken;
286     const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
287     TII.storeRegToStackSlot(*EntryBlock, MI, Reg, IsKill,
288                             CSI[i].getFrameIdx(), RC, TRI);
289   }
290 
291   return true;
292 }
293