1 //===--  MipsExpandPseudo.cpp - Expand pseudo instructions ---------------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This pass expands pseudo instructions into target instructions after register
11 // allocation but before post-RA scheduling.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #define DEBUG_TYPE "mips-expand-pseudo"
16 
17 #include "Mips.h"
18 #include "MipsTargetMachine.h"
19 #include "llvm/CodeGen/MachineFunctionPass.h"
20 #include "llvm/CodeGen/MachineInstrBuilder.h"
21 #include "llvm/Target/TargetInstrInfo.h"
22 #include "llvm/ADT/Statistic.h"
23 
24 using namespace llvm;
25 
26 namespace {
27   struct MipsExpandPseudo : public MachineFunctionPass {
28 
29     TargetMachine &TM;
30     const TargetInstrInfo *TII;
31 
32     static char ID;
33     MipsExpandPseudo(TargetMachine &tm)
34       : MachineFunctionPass(ID), TM(tm), TII(tm.getInstrInfo()) { }
35 
36     virtual const char *getPassName() const {
37       return "Mips PseudoInstrs Expansion";
38     }
39 
40     bool runOnMachineFunction(MachineFunction &F);
41     bool runOnMachineBasicBlock(MachineBasicBlock &MBB);
42 
43   private:
44     void ExpandBuildPairF64(MachineBasicBlock&, MachineBasicBlock::iterator);
45     void ExpandExtractElementF64(MachineBasicBlock&, MachineBasicBlock::iterator);
46   };
47   char MipsExpandPseudo::ID = 0;
48 } // end of anonymous namespace
49 
50 bool MipsExpandPseudo::runOnMachineFunction(MachineFunction& F) {
51   bool Changed = false;
52 
53   for (MachineFunction::iterator I = F.begin(); I != F.end(); ++I)
54     Changed |= runOnMachineBasicBlock(*I);
55 
56   return Changed;
57 }
58 
59 bool MipsExpandPseudo::runOnMachineBasicBlock(MachineBasicBlock& MBB) {
60 
61   bool Changed = false;
62   for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end();) {
63     const TargetInstrDesc& Tid = I->getDesc();
64 
65     switch(Tid.getOpcode()) {
66     default:
67       ++I;
68       continue;
69     case Mips::BuildPairF64:
70       ExpandBuildPairF64(MBB, I);
71       break;
72     case Mips::ExtractElementF64:
73       ExpandExtractElementF64(MBB, I);
74       break;
75     }
76 
77     // delete original instr
78     MBB.erase(I++);
79     Changed = true;
80   }
81 
82   return Changed;
83 }
84 
85 void MipsExpandPseudo::ExpandBuildPairF64(MachineBasicBlock& MBB,
86                                             MachineBasicBlock::iterator I) {
87   unsigned DstReg = I->getOperand(0).getReg();
88   unsigned LoReg = I->getOperand(1).getReg(), HiReg = I->getOperand(2).getReg();
89   const TargetInstrDesc& Mtc1Tdd = TII->get(Mips::MTC1);
90   DebugLoc dl = I->getDebugLoc();
91   const unsigned* SubReg =
92     TM.getRegisterInfo()->getSubRegisters(DstReg);
93 
94   // mtc1 Lo, $fp
95   // mtc1 Hi, $fp + 1
96   BuildMI(MBB, I, dl, Mtc1Tdd, *SubReg).addReg(LoReg);
97   BuildMI(MBB, I, dl, Mtc1Tdd, *(SubReg + 1)).addReg(HiReg);
98 }
99 
100 void MipsExpandPseudo::ExpandExtractElementF64(MachineBasicBlock& MBB,
101                                                  MachineBasicBlock::iterator I) {
102   unsigned DstReg = I->getOperand(0).getReg();
103   unsigned SrcReg = I->getOperand(1).getReg();
104   unsigned N = I->getOperand(2).getImm();
105   const TargetInstrDesc& Mfc1Tdd = TII->get(Mips::MFC1);
106   DebugLoc dl = I->getDebugLoc();
107   const unsigned* SubReg = TM.getRegisterInfo()->getSubRegisters(SrcReg);
108 
109   BuildMI(MBB, I, dl, Mfc1Tdd, DstReg).addReg(*(SubReg + N));
110 }
111 
112 /// createMipsMipsExpandPseudoPass - Returns a pass that expands pseudo
113 /// instrs into real instrs
114 FunctionPass *llvm::createMipsExpandPseudoPass(MipsTargetMachine &tm) {
115   return new MipsExpandPseudo(tm);
116 }
117