1 //===- MipsConstantIslandPass.cpp - Emit Pc Relative loads ----------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This pass is used to make Pc relative loads of constants. 10 // For now, only Mips16 will use this. 11 // 12 // Loading constants inline is expensive on Mips16 and it's in general better 13 // to place the constant nearby in code space and then it can be loaded with a 14 // simple 16 bit load instruction. 15 // 16 // The constants can be not just numbers but addresses of functions and labels. 17 // This can be particularly helpful in static relocation mode for embedded 18 // non-linux targets. 19 // 20 //===----------------------------------------------------------------------===// 21 22 #include "Mips.h" 23 #include "Mips16InstrInfo.h" 24 #include "MipsMachineFunction.h" 25 #include "MipsSubtarget.h" 26 #include "llvm/ADT/STLExtras.h" 27 #include "llvm/ADT/SmallSet.h" 28 #include "llvm/ADT/SmallVector.h" 29 #include "llvm/ADT/Statistic.h" 30 #include "llvm/ADT/StringRef.h" 31 #include "llvm/CodeGen/MachineBasicBlock.h" 32 #include "llvm/CodeGen/MachineConstantPool.h" 33 #include "llvm/CodeGen/MachineFunction.h" 34 #include "llvm/CodeGen/MachineFunctionPass.h" 35 #include "llvm/CodeGen/MachineInstr.h" 36 #include "llvm/CodeGen/MachineInstrBuilder.h" 37 #include "llvm/CodeGen/MachineOperand.h" 38 #include "llvm/CodeGen/MachineRegisterInfo.h" 39 #include "llvm/Config/llvm-config.h" 40 #include "llvm/IR/Constants.h" 41 #include "llvm/IR/DataLayout.h" 42 #include "llvm/IR/DebugLoc.h" 43 #include "llvm/IR/Function.h" 44 #include "llvm/IR/Type.h" 45 #include "llvm/Support/CommandLine.h" 46 #include "llvm/Support/Compiler.h" 47 #include "llvm/Support/Debug.h" 48 #include "llvm/Support/ErrorHandling.h" 49 #include "llvm/Support/Format.h" 50 #include "llvm/Support/MathExtras.h" 51 #include "llvm/Support/raw_ostream.h" 52 #include <algorithm> 53 #include <cassert> 54 #include <cstdint> 55 #include <iterator> 56 #include <vector> 57 58 using namespace llvm; 59 60 #define DEBUG_TYPE "mips-constant-islands" 61 62 STATISTIC(NumCPEs, "Number of constpool entries"); 63 STATISTIC(NumSplit, "Number of uncond branches inserted"); 64 STATISTIC(NumCBrFixed, "Number of cond branches fixed"); 65 STATISTIC(NumUBrFixed, "Number of uncond branches fixed"); 66 67 // FIXME: This option should be removed once it has received sufficient testing. 68 static cl::opt<bool> 69 AlignConstantIslands("mips-align-constant-islands", cl::Hidden, cl::init(true), 70 cl::desc("Align constant islands in code")); 71 72 // Rather than do make check tests with huge amounts of code, we force 73 // the test to use this amount. 74 static cl::opt<int> ConstantIslandsSmallOffset( 75 "mips-constant-islands-small-offset", 76 cl::init(0), 77 cl::desc("Make small offsets be this amount for testing purposes"), 78 cl::Hidden); 79 80 // For testing purposes we tell it to not use relaxed load forms so that it 81 // will split blocks. 82 static cl::opt<bool> NoLoadRelaxation( 83 "mips-constant-islands-no-load-relaxation", 84 cl::init(false), 85 cl::desc("Don't relax loads to long loads - for testing purposes"), 86 cl::Hidden); 87 88 static unsigned int branchTargetOperand(MachineInstr *MI) { 89 switch (MI->getOpcode()) { 90 case Mips::Bimm16: 91 case Mips::BimmX16: 92 case Mips::Bteqz16: 93 case Mips::BteqzX16: 94 case Mips::Btnez16: 95 case Mips::BtnezX16: 96 case Mips::JalB16: 97 return 0; 98 case Mips::BeqzRxImm16: 99 case Mips::BeqzRxImmX16: 100 case Mips::BnezRxImm16: 101 case Mips::BnezRxImmX16: 102 return 1; 103 } 104 llvm_unreachable("Unknown branch type"); 105 } 106 107 static unsigned int longformBranchOpcode(unsigned int Opcode) { 108 switch (Opcode) { 109 case Mips::Bimm16: 110 case Mips::BimmX16: 111 return Mips::BimmX16; 112 case Mips::Bteqz16: 113 case Mips::BteqzX16: 114 return Mips::BteqzX16; 115 case Mips::Btnez16: 116 case Mips::BtnezX16: 117 return Mips::BtnezX16; 118 case Mips::JalB16: 119 return Mips::JalB16; 120 case Mips::BeqzRxImm16: 121 case Mips::BeqzRxImmX16: 122 return Mips::BeqzRxImmX16; 123 case Mips::BnezRxImm16: 124 case Mips::BnezRxImmX16: 125 return Mips::BnezRxImmX16; 126 } 127 llvm_unreachable("Unknown branch type"); 128 } 129 130 // FIXME: need to go through this whole constant islands port and check the math 131 // for branch ranges and clean this up and make some functions to calculate things 132 // that are done many times identically. 133 // Need to refactor some of the code to call this routine. 134 static unsigned int branchMaxOffsets(unsigned int Opcode) { 135 unsigned Bits, Scale; 136 switch (Opcode) { 137 case Mips::Bimm16: 138 Bits = 11; 139 Scale = 2; 140 break; 141 case Mips::BimmX16: 142 Bits = 16; 143 Scale = 2; 144 break; 145 case Mips::BeqzRxImm16: 146 Bits = 8; 147 Scale = 2; 148 break; 149 case Mips::BeqzRxImmX16: 150 Bits = 16; 151 Scale = 2; 152 break; 153 case Mips::BnezRxImm16: 154 Bits = 8; 155 Scale = 2; 156 break; 157 case Mips::BnezRxImmX16: 158 Bits = 16; 159 Scale = 2; 160 break; 161 case Mips::Bteqz16: 162 Bits = 8; 163 Scale = 2; 164 break; 165 case Mips::BteqzX16: 166 Bits = 16; 167 Scale = 2; 168 break; 169 case Mips::Btnez16: 170 Bits = 8; 171 Scale = 2; 172 break; 173 case Mips::BtnezX16: 174 Bits = 16; 175 Scale = 2; 176 break; 177 default: 178 llvm_unreachable("Unknown branch type"); 179 } 180 unsigned MaxOffs = ((1 << (Bits-1))-1) * Scale; 181 return MaxOffs; 182 } 183 184 namespace { 185 186 using Iter = MachineBasicBlock::iterator; 187 using ReverseIter = MachineBasicBlock::reverse_iterator; 188 189 /// MipsConstantIslands - Due to limited PC-relative displacements, Mips 190 /// requires constant pool entries to be scattered among the instructions 191 /// inside a function. To do this, it completely ignores the normal LLVM 192 /// constant pool; instead, it places constants wherever it feels like with 193 /// special instructions. 194 /// 195 /// The terminology used in this pass includes: 196 /// Islands - Clumps of constants placed in the function. 197 /// Water - Potential places where an island could be formed. 198 /// CPE - A constant pool entry that has been placed somewhere, which 199 /// tracks a list of users. 200 201 class MipsConstantIslands : public MachineFunctionPass { 202 /// BasicBlockInfo - Information about the offset and size of a single 203 /// basic block. 204 struct BasicBlockInfo { 205 /// Offset - Distance from the beginning of the function to the beginning 206 /// of this basic block. 207 /// 208 /// Offsets are computed assuming worst case padding before an aligned 209 /// block. This means that subtracting basic block offsets always gives a 210 /// conservative estimate of the real distance which may be smaller. 211 /// 212 /// Because worst case padding is used, the computed offset of an aligned 213 /// block may not actually be aligned. 214 unsigned Offset = 0; 215 216 /// Size - Size of the basic block in bytes. If the block contains 217 /// inline assembly, this is a worst case estimate. 218 /// 219 /// The size does not include any alignment padding whether from the 220 /// beginning of the block, or from an aligned jump table at the end. 221 unsigned Size = 0; 222 223 BasicBlockInfo() = default; 224 225 // FIXME: ignore LogAlign for this patch 226 // 227 unsigned postOffset(unsigned LogAlign = 0) const { 228 unsigned PO = Offset + Size; 229 return PO; 230 } 231 }; 232 233 std::vector<BasicBlockInfo> BBInfo; 234 235 /// WaterList - A sorted list of basic blocks where islands could be placed 236 /// (i.e. blocks that don't fall through to the following block, due 237 /// to a return, unreachable, or unconditional branch). 238 std::vector<MachineBasicBlock*> WaterList; 239 240 /// NewWaterList - The subset of WaterList that was created since the 241 /// previous iteration by inserting unconditional branches. 242 SmallSet<MachineBasicBlock*, 4> NewWaterList; 243 244 using water_iterator = std::vector<MachineBasicBlock *>::iterator; 245 246 /// CPUser - One user of a constant pool, keeping the machine instruction 247 /// pointer, the constant pool being referenced, and the max displacement 248 /// allowed from the instruction to the CP. The HighWaterMark records the 249 /// highest basic block where a new CPEntry can be placed. To ensure this 250 /// pass terminates, the CP entries are initially placed at the end of the 251 /// function and then move monotonically to lower addresses. The 252 /// exception to this rule is when the current CP entry for a particular 253 /// CPUser is out of range, but there is another CP entry for the same 254 /// constant value in range. We want to use the existing in-range CP 255 /// entry, but if it later moves out of range, the search for new water 256 /// should resume where it left off. The HighWaterMark is used to record 257 /// that point. 258 struct CPUser { 259 MachineInstr *MI; 260 MachineInstr *CPEMI; 261 MachineBasicBlock *HighWaterMark; 262 263 private: 264 unsigned MaxDisp; 265 unsigned LongFormMaxDisp; // mips16 has 16/32 bit instructions 266 // with different displacements 267 unsigned LongFormOpcode; 268 269 public: 270 bool NegOk; 271 272 CPUser(MachineInstr *mi, MachineInstr *cpemi, unsigned maxdisp, 273 bool neg, 274 unsigned longformmaxdisp, unsigned longformopcode) 275 : MI(mi), CPEMI(cpemi), MaxDisp(maxdisp), 276 LongFormMaxDisp(longformmaxdisp), LongFormOpcode(longformopcode), 277 NegOk(neg){ 278 HighWaterMark = CPEMI->getParent(); 279 } 280 281 /// getMaxDisp - Returns the maximum displacement supported by MI. 282 unsigned getMaxDisp() const { 283 unsigned xMaxDisp = ConstantIslandsSmallOffset? 284 ConstantIslandsSmallOffset: MaxDisp; 285 return xMaxDisp; 286 } 287 288 void setMaxDisp(unsigned val) { 289 MaxDisp = val; 290 } 291 292 unsigned getLongFormMaxDisp() const { 293 return LongFormMaxDisp; 294 } 295 296 unsigned getLongFormOpcode() const { 297 return LongFormOpcode; 298 } 299 }; 300 301 /// CPUsers - Keep track of all of the machine instructions that use various 302 /// constant pools and their max displacement. 303 std::vector<CPUser> CPUsers; 304 305 /// CPEntry - One per constant pool entry, keeping the machine instruction 306 /// pointer, the constpool index, and the number of CPUser's which 307 /// reference this entry. 308 struct CPEntry { 309 MachineInstr *CPEMI; 310 unsigned CPI; 311 unsigned RefCount; 312 313 CPEntry(MachineInstr *cpemi, unsigned cpi, unsigned rc = 0) 314 : CPEMI(cpemi), CPI(cpi), RefCount(rc) {} 315 }; 316 317 /// CPEntries - Keep track of all of the constant pool entry machine 318 /// instructions. For each original constpool index (i.e. those that 319 /// existed upon entry to this pass), it keeps a vector of entries. 320 /// Original elements are cloned as we go along; the clones are 321 /// put in the vector of the original element, but have distinct CPIs. 322 std::vector<std::vector<CPEntry>> CPEntries; 323 324 /// ImmBranch - One per immediate branch, keeping the machine instruction 325 /// pointer, conditional or unconditional, the max displacement, 326 /// and (if isCond is true) the corresponding unconditional branch 327 /// opcode. 328 struct ImmBranch { 329 MachineInstr *MI; 330 unsigned MaxDisp : 31; 331 bool isCond : 1; 332 int UncondBr; 333 334 ImmBranch(MachineInstr *mi, unsigned maxdisp, bool cond, int ubr) 335 : MI(mi), MaxDisp(maxdisp), isCond(cond), UncondBr(ubr) {} 336 }; 337 338 /// ImmBranches - Keep track of all the immediate branch instructions. 339 /// 340 std::vector<ImmBranch> ImmBranches; 341 342 /// HasFarJump - True if any far jump instruction has been emitted during 343 /// the branch fix up pass. 344 bool HasFarJump; 345 346 const MipsSubtarget *STI = nullptr; 347 const Mips16InstrInfo *TII; 348 MipsFunctionInfo *MFI; 349 MachineFunction *MF = nullptr; 350 MachineConstantPool *MCP = nullptr; 351 352 unsigned PICLabelUId; 353 bool PrescannedForConstants = false; 354 355 void initPICLabelUId(unsigned UId) { 356 PICLabelUId = UId; 357 } 358 359 unsigned createPICLabelUId() { 360 return PICLabelUId++; 361 } 362 363 public: 364 static char ID; 365 366 MipsConstantIslands() : MachineFunctionPass(ID) {} 367 368 StringRef getPassName() const override { return "Mips Constant Islands"; } 369 370 bool runOnMachineFunction(MachineFunction &F) override; 371 372 MachineFunctionProperties getRequiredProperties() const override { 373 return MachineFunctionProperties().set( 374 MachineFunctionProperties::Property::NoVRegs); 375 } 376 377 void doInitialPlacement(std::vector<MachineInstr*> &CPEMIs); 378 CPEntry *findConstPoolEntry(unsigned CPI, const MachineInstr *CPEMI); 379 unsigned getCPELogAlign(const MachineInstr &CPEMI); 380 void initializeFunctionInfo(const std::vector<MachineInstr*> &CPEMIs); 381 unsigned getOffsetOf(MachineInstr *MI) const; 382 unsigned getUserOffset(CPUser&) const; 383 void dumpBBs(); 384 385 bool isOffsetInRange(unsigned UserOffset, unsigned TrialOffset, 386 unsigned Disp, bool NegativeOK); 387 bool isOffsetInRange(unsigned UserOffset, unsigned TrialOffset, 388 const CPUser &U); 389 390 void computeBlockSize(MachineBasicBlock *MBB); 391 MachineBasicBlock *splitBlockBeforeInstr(MachineInstr &MI); 392 void updateForInsertedWaterBlock(MachineBasicBlock *NewBB); 393 void adjustBBOffsetsAfter(MachineBasicBlock *BB); 394 bool decrementCPEReferenceCount(unsigned CPI, MachineInstr* CPEMI); 395 int findInRangeCPEntry(CPUser& U, unsigned UserOffset); 396 int findLongFormInRangeCPEntry(CPUser& U, unsigned UserOffset); 397 bool findAvailableWater(CPUser&U, unsigned UserOffset, 398 water_iterator &WaterIter); 399 void createNewWater(unsigned CPUserIndex, unsigned UserOffset, 400 MachineBasicBlock *&NewMBB); 401 bool handleConstantPoolUser(unsigned CPUserIndex); 402 void removeDeadCPEMI(MachineInstr *CPEMI); 403 bool removeUnusedCPEntries(); 404 bool isCPEntryInRange(MachineInstr *MI, unsigned UserOffset, 405 MachineInstr *CPEMI, unsigned Disp, bool NegOk, 406 bool DoDump = false); 407 bool isWaterInRange(unsigned UserOffset, MachineBasicBlock *Water, 408 CPUser &U, unsigned &Growth); 409 bool isBBInRange(MachineInstr *MI, MachineBasicBlock *BB, unsigned Disp); 410 bool fixupImmediateBr(ImmBranch &Br); 411 bool fixupConditionalBr(ImmBranch &Br); 412 bool fixupUnconditionalBr(ImmBranch &Br); 413 414 void prescanForConstants(); 415 }; 416 417 } // end anonymous namespace 418 419 char MipsConstantIslands::ID = 0; 420 421 bool MipsConstantIslands::isOffsetInRange 422 (unsigned UserOffset, unsigned TrialOffset, 423 const CPUser &U) { 424 return isOffsetInRange(UserOffset, TrialOffset, 425 U.getMaxDisp(), U.NegOk); 426 } 427 428 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 429 /// print block size and offset information - debugging 430 LLVM_DUMP_METHOD void MipsConstantIslands::dumpBBs() { 431 for (unsigned J = 0, E = BBInfo.size(); J !=E; ++J) { 432 const BasicBlockInfo &BBI = BBInfo[J]; 433 dbgs() << format("%08x %bb.%u\t", BBI.Offset, J) 434 << format(" size=%#x\n", BBInfo[J].Size); 435 } 436 } 437 #endif 438 439 bool MipsConstantIslands::runOnMachineFunction(MachineFunction &mf) { 440 // The intention is for this to be a mips16 only pass for now 441 // FIXME: 442 MF = &mf; 443 MCP = mf.getConstantPool(); 444 STI = &static_cast<const MipsSubtarget &>(mf.getSubtarget()); 445 LLVM_DEBUG(dbgs() << "constant island machine function " 446 << "\n"); 447 if (!STI->inMips16Mode() || !MipsSubtarget::useConstantIslands()) { 448 return false; 449 } 450 TII = (const Mips16InstrInfo *)STI->getInstrInfo(); 451 MFI = MF->getInfo<MipsFunctionInfo>(); 452 LLVM_DEBUG(dbgs() << "constant island processing " 453 << "\n"); 454 // 455 // will need to make predermination if there is any constants we need to 456 // put in constant islands. TBD. 457 // 458 if (!PrescannedForConstants) prescanForConstants(); 459 460 HasFarJump = false; 461 // This pass invalidates liveness information when it splits basic blocks. 462 MF->getRegInfo().invalidateLiveness(); 463 464 // Renumber all of the machine basic blocks in the function, guaranteeing that 465 // the numbers agree with the position of the block in the function. 466 MF->RenumberBlocks(); 467 468 bool MadeChange = false; 469 470 // Perform the initial placement of the constant pool entries. To start with, 471 // we put them all at the end of the function. 472 std::vector<MachineInstr*> CPEMIs; 473 if (!MCP->isEmpty()) 474 doInitialPlacement(CPEMIs); 475 476 /// The next UID to take is the first unused one. 477 initPICLabelUId(CPEMIs.size()); 478 479 // Do the initial scan of the function, building up information about the 480 // sizes of each block, the location of all the water, and finding all of the 481 // constant pool users. 482 initializeFunctionInfo(CPEMIs); 483 CPEMIs.clear(); 484 LLVM_DEBUG(dumpBBs()); 485 486 /// Remove dead constant pool entries. 487 MadeChange |= removeUnusedCPEntries(); 488 489 // Iteratively place constant pool entries and fix up branches until there 490 // is no change. 491 unsigned NoCPIters = 0, NoBRIters = 0; 492 (void)NoBRIters; 493 while (true) { 494 LLVM_DEBUG(dbgs() << "Beginning CP iteration #" << NoCPIters << '\n'); 495 bool CPChange = false; 496 for (unsigned i = 0, e = CPUsers.size(); i != e; ++i) 497 CPChange |= handleConstantPoolUser(i); 498 if (CPChange && ++NoCPIters > 30) 499 report_fatal_error("Constant Island pass failed to converge!"); 500 LLVM_DEBUG(dumpBBs()); 501 502 // Clear NewWaterList now. If we split a block for branches, it should 503 // appear as "new water" for the next iteration of constant pool placement. 504 NewWaterList.clear(); 505 506 LLVM_DEBUG(dbgs() << "Beginning BR iteration #" << NoBRIters << '\n'); 507 bool BRChange = false; 508 for (unsigned i = 0, e = ImmBranches.size(); i != e; ++i) 509 BRChange |= fixupImmediateBr(ImmBranches[i]); 510 if (BRChange && ++NoBRIters > 30) 511 report_fatal_error("Branch Fix Up pass failed to converge!"); 512 LLVM_DEBUG(dumpBBs()); 513 if (!CPChange && !BRChange) 514 break; 515 MadeChange = true; 516 } 517 518 LLVM_DEBUG(dbgs() << '\n'; dumpBBs()); 519 520 BBInfo.clear(); 521 WaterList.clear(); 522 CPUsers.clear(); 523 CPEntries.clear(); 524 ImmBranches.clear(); 525 return MadeChange; 526 } 527 528 /// doInitialPlacement - Perform the initial placement of the constant pool 529 /// entries. To start with, we put them all at the end of the function. 530 void 531 MipsConstantIslands::doInitialPlacement(std::vector<MachineInstr*> &CPEMIs) { 532 // Create the basic block to hold the CPE's. 533 MachineBasicBlock *BB = MF->CreateMachineBasicBlock(); 534 MF->push_back(BB); 535 536 // MachineConstantPool measures alignment in bytes. We measure in log2(bytes). 537 unsigned MaxAlign = Log2_32(MCP->getConstantPoolAlignment()); 538 539 // Mark the basic block as required by the const-pool. 540 // If AlignConstantIslands isn't set, use 4-byte alignment for everything. 541 BB->setAlignment(AlignConstantIslands ? MaxAlign : 2); 542 543 // The function needs to be as aligned as the basic blocks. The linker may 544 // move functions around based on their alignment. 545 MF->ensureAlignment(BB->getAlignment()); 546 547 // Order the entries in BB by descending alignment. That ensures correct 548 // alignment of all entries as long as BB is sufficiently aligned. Keep 549 // track of the insertion point for each alignment. We are going to bucket 550 // sort the entries as they are created. 551 SmallVector<MachineBasicBlock::iterator, 8> InsPoint(MaxAlign + 1, BB->end()); 552 553 // Add all of the constants from the constant pool to the end block, use an 554 // identity mapping of CPI's to CPE's. 555 const std::vector<MachineConstantPoolEntry> &CPs = MCP->getConstants(); 556 557 const DataLayout &TD = MF->getDataLayout(); 558 for (unsigned i = 0, e = CPs.size(); i != e; ++i) { 559 unsigned Size = TD.getTypeAllocSize(CPs[i].getType()); 560 assert(Size >= 4 && "Too small constant pool entry"); 561 unsigned Align = CPs[i].getAlignment(); 562 assert(isPowerOf2_32(Align) && "Invalid alignment"); 563 // Verify that all constant pool entries are a multiple of their alignment. 564 // If not, we would have to pad them out so that instructions stay aligned. 565 assert((Size % Align) == 0 && "CP Entry not multiple of 4 bytes!"); 566 567 // Insert CONSTPOOL_ENTRY before entries with a smaller alignment. 568 unsigned LogAlign = Log2_32(Align); 569 MachineBasicBlock::iterator InsAt = InsPoint[LogAlign]; 570 571 MachineInstr *CPEMI = 572 BuildMI(*BB, InsAt, DebugLoc(), TII->get(Mips::CONSTPOOL_ENTRY)) 573 .addImm(i).addConstantPoolIndex(i).addImm(Size); 574 575 CPEMIs.push_back(CPEMI); 576 577 // Ensure that future entries with higher alignment get inserted before 578 // CPEMI. This is bucket sort with iterators. 579 for (unsigned a = LogAlign + 1; a <= MaxAlign; ++a) 580 if (InsPoint[a] == InsAt) 581 InsPoint[a] = CPEMI; 582 // Add a new CPEntry, but no corresponding CPUser yet. 583 CPEntries.emplace_back(1, CPEntry(CPEMI, i)); 584 ++NumCPEs; 585 LLVM_DEBUG(dbgs() << "Moved CPI#" << i << " to end of function, size = " 586 << Size << ", align = " << Align << '\n'); 587 } 588 LLVM_DEBUG(BB->dump()); 589 } 590 591 /// BBHasFallthrough - Return true if the specified basic block can fallthrough 592 /// into the block immediately after it. 593 static bool BBHasFallthrough(MachineBasicBlock *MBB) { 594 // Get the next machine basic block in the function. 595 MachineFunction::iterator MBBI = MBB->getIterator(); 596 // Can't fall off end of function. 597 if (std::next(MBBI) == MBB->getParent()->end()) 598 return false; 599 600 MachineBasicBlock *NextBB = &*std::next(MBBI); 601 for (MachineBasicBlock::succ_iterator I = MBB->succ_begin(), 602 E = MBB->succ_end(); I != E; ++I) 603 if (*I == NextBB) 604 return true; 605 606 return false; 607 } 608 609 /// findConstPoolEntry - Given the constpool index and CONSTPOOL_ENTRY MI, 610 /// look up the corresponding CPEntry. 611 MipsConstantIslands::CPEntry 612 *MipsConstantIslands::findConstPoolEntry(unsigned CPI, 613 const MachineInstr *CPEMI) { 614 std::vector<CPEntry> &CPEs = CPEntries[CPI]; 615 // Number of entries per constpool index should be small, just do a 616 // linear search. 617 for (unsigned i = 0, e = CPEs.size(); i != e; ++i) { 618 if (CPEs[i].CPEMI == CPEMI) 619 return &CPEs[i]; 620 } 621 return nullptr; 622 } 623 624 /// getCPELogAlign - Returns the required alignment of the constant pool entry 625 /// represented by CPEMI. Alignment is measured in log2(bytes) units. 626 unsigned MipsConstantIslands::getCPELogAlign(const MachineInstr &CPEMI) { 627 assert(CPEMI.getOpcode() == Mips::CONSTPOOL_ENTRY); 628 629 // Everything is 4-byte aligned unless AlignConstantIslands is set. 630 if (!AlignConstantIslands) 631 return 2; 632 633 unsigned CPI = CPEMI.getOperand(1).getIndex(); 634 assert(CPI < MCP->getConstants().size() && "Invalid constant pool index."); 635 unsigned Align = MCP->getConstants()[CPI].getAlignment(); 636 assert(isPowerOf2_32(Align) && "Invalid CPE alignment"); 637 return Log2_32(Align); 638 } 639 640 /// initializeFunctionInfo - Do the initial scan of the function, building up 641 /// information about the sizes of each block, the location of all the water, 642 /// and finding all of the constant pool users. 643 void MipsConstantIslands:: 644 initializeFunctionInfo(const std::vector<MachineInstr*> &CPEMIs) { 645 BBInfo.clear(); 646 BBInfo.resize(MF->getNumBlockIDs()); 647 648 // First thing, compute the size of all basic blocks, and see if the function 649 // has any inline assembly in it. If so, we have to be conservative about 650 // alignment assumptions, as we don't know for sure the size of any 651 // instructions in the inline assembly. 652 for (MachineFunction::iterator I = MF->begin(), E = MF->end(); I != E; ++I) 653 computeBlockSize(&*I); 654 655 // Compute block offsets. 656 adjustBBOffsetsAfter(&MF->front()); 657 658 // Now go back through the instructions and build up our data structures. 659 for (MachineBasicBlock &MBB : *MF) { 660 // If this block doesn't fall through into the next MBB, then this is 661 // 'water' that a constant pool island could be placed. 662 if (!BBHasFallthrough(&MBB)) 663 WaterList.push_back(&MBB); 664 for (MachineInstr &MI : MBB) { 665 if (MI.isDebugInstr()) 666 continue; 667 668 int Opc = MI.getOpcode(); 669 if (MI.isBranch()) { 670 bool isCond = false; 671 unsigned Bits = 0; 672 unsigned Scale = 1; 673 int UOpc = Opc; 674 switch (Opc) { 675 default: 676 continue; // Ignore other branches for now 677 case Mips::Bimm16: 678 Bits = 11; 679 Scale = 2; 680 isCond = false; 681 break; 682 case Mips::BimmX16: 683 Bits = 16; 684 Scale = 2; 685 isCond = false; 686 break; 687 case Mips::BeqzRxImm16: 688 UOpc=Mips::Bimm16; 689 Bits = 8; 690 Scale = 2; 691 isCond = true; 692 break; 693 case Mips::BeqzRxImmX16: 694 UOpc=Mips::Bimm16; 695 Bits = 16; 696 Scale = 2; 697 isCond = true; 698 break; 699 case Mips::BnezRxImm16: 700 UOpc=Mips::Bimm16; 701 Bits = 8; 702 Scale = 2; 703 isCond = true; 704 break; 705 case Mips::BnezRxImmX16: 706 UOpc=Mips::Bimm16; 707 Bits = 16; 708 Scale = 2; 709 isCond = true; 710 break; 711 case Mips::Bteqz16: 712 UOpc=Mips::Bimm16; 713 Bits = 8; 714 Scale = 2; 715 isCond = true; 716 break; 717 case Mips::BteqzX16: 718 UOpc=Mips::Bimm16; 719 Bits = 16; 720 Scale = 2; 721 isCond = true; 722 break; 723 case Mips::Btnez16: 724 UOpc=Mips::Bimm16; 725 Bits = 8; 726 Scale = 2; 727 isCond = true; 728 break; 729 case Mips::BtnezX16: 730 UOpc=Mips::Bimm16; 731 Bits = 16; 732 Scale = 2; 733 isCond = true; 734 break; 735 } 736 // Record this immediate branch. 737 unsigned MaxOffs = ((1 << (Bits-1))-1) * Scale; 738 ImmBranches.push_back(ImmBranch(&MI, MaxOffs, isCond, UOpc)); 739 } 740 741 if (Opc == Mips::CONSTPOOL_ENTRY) 742 continue; 743 744 // Scan the instructions for constant pool operands. 745 for (unsigned op = 0, e = MI.getNumOperands(); op != e; ++op) 746 if (MI.getOperand(op).isCPI()) { 747 // We found one. The addressing mode tells us the max displacement 748 // from the PC that this instruction permits. 749 750 // Basic size info comes from the TSFlags field. 751 unsigned Bits = 0; 752 unsigned Scale = 1; 753 bool NegOk = false; 754 unsigned LongFormBits = 0; 755 unsigned LongFormScale = 0; 756 unsigned LongFormOpcode = 0; 757 switch (Opc) { 758 default: 759 llvm_unreachable("Unknown addressing mode for CP reference!"); 760 case Mips::LwRxPcTcp16: 761 Bits = 8; 762 Scale = 4; 763 LongFormOpcode = Mips::LwRxPcTcpX16; 764 LongFormBits = 14; 765 LongFormScale = 1; 766 break; 767 case Mips::LwRxPcTcpX16: 768 Bits = 14; 769 Scale = 1; 770 NegOk = true; 771 break; 772 } 773 // Remember that this is a user of a CP entry. 774 unsigned CPI = MI.getOperand(op).getIndex(); 775 MachineInstr *CPEMI = CPEMIs[CPI]; 776 unsigned MaxOffs = ((1 << Bits)-1) * Scale; 777 unsigned LongFormMaxOffs = ((1 << LongFormBits)-1) * LongFormScale; 778 CPUsers.push_back(CPUser(&MI, CPEMI, MaxOffs, NegOk, LongFormMaxOffs, 779 LongFormOpcode)); 780 781 // Increment corresponding CPEntry reference count. 782 CPEntry *CPE = findConstPoolEntry(CPI, CPEMI); 783 assert(CPE && "Cannot find a corresponding CPEntry!"); 784 CPE->RefCount++; 785 786 // Instructions can only use one CP entry, don't bother scanning the 787 // rest of the operands. 788 break; 789 } 790 } 791 } 792 } 793 794 /// computeBlockSize - Compute the size and some alignment information for MBB. 795 /// This function updates BBInfo directly. 796 void MipsConstantIslands::computeBlockSize(MachineBasicBlock *MBB) { 797 BasicBlockInfo &BBI = BBInfo[MBB->getNumber()]; 798 BBI.Size = 0; 799 800 for (const MachineInstr &MI : *MBB) 801 BBI.Size += TII->getInstSizeInBytes(MI); 802 } 803 804 /// getOffsetOf - Return the current offset of the specified machine instruction 805 /// from the start of the function. This offset changes as stuff is moved 806 /// around inside the function. 807 unsigned MipsConstantIslands::getOffsetOf(MachineInstr *MI) const { 808 MachineBasicBlock *MBB = MI->getParent(); 809 810 // The offset is composed of two things: the sum of the sizes of all MBB's 811 // before this instruction's block, and the offset from the start of the block 812 // it is in. 813 unsigned Offset = BBInfo[MBB->getNumber()].Offset; 814 815 // Sum instructions before MI in MBB. 816 for (MachineBasicBlock::iterator I = MBB->begin(); &*I != MI; ++I) { 817 assert(I != MBB->end() && "Didn't find MI in its own basic block?"); 818 Offset += TII->getInstSizeInBytes(*I); 819 } 820 return Offset; 821 } 822 823 /// CompareMBBNumbers - Little predicate function to sort the WaterList by MBB 824 /// ID. 825 static bool CompareMBBNumbers(const MachineBasicBlock *LHS, 826 const MachineBasicBlock *RHS) { 827 return LHS->getNumber() < RHS->getNumber(); 828 } 829 830 /// updateForInsertedWaterBlock - When a block is newly inserted into the 831 /// machine function, it upsets all of the block numbers. Renumber the blocks 832 /// and update the arrays that parallel this numbering. 833 void MipsConstantIslands::updateForInsertedWaterBlock 834 (MachineBasicBlock *NewBB) { 835 // Renumber the MBB's to keep them consecutive. 836 NewBB->getParent()->RenumberBlocks(NewBB); 837 838 // Insert an entry into BBInfo to align it properly with the (newly 839 // renumbered) block numbers. 840 BBInfo.insert(BBInfo.begin() + NewBB->getNumber(), BasicBlockInfo()); 841 842 // Next, update WaterList. Specifically, we need to add NewMBB as having 843 // available water after it. 844 water_iterator IP = 845 std::lower_bound(WaterList.begin(), WaterList.end(), NewBB, 846 CompareMBBNumbers); 847 WaterList.insert(IP, NewBB); 848 } 849 850 unsigned MipsConstantIslands::getUserOffset(CPUser &U) const { 851 return getOffsetOf(U.MI); 852 } 853 854 /// Split the basic block containing MI into two blocks, which are joined by 855 /// an unconditional branch. Update data structures and renumber blocks to 856 /// account for this change and returns the newly created block. 857 MachineBasicBlock * 858 MipsConstantIslands::splitBlockBeforeInstr(MachineInstr &MI) { 859 MachineBasicBlock *OrigBB = MI.getParent(); 860 861 // Create a new MBB for the code after the OrigBB. 862 MachineBasicBlock *NewBB = 863 MF->CreateMachineBasicBlock(OrigBB->getBasicBlock()); 864 MachineFunction::iterator MBBI = ++OrigBB->getIterator(); 865 MF->insert(MBBI, NewBB); 866 867 // Splice the instructions starting with MI over to NewBB. 868 NewBB->splice(NewBB->end(), OrigBB, MI, OrigBB->end()); 869 870 // Add an unconditional branch from OrigBB to NewBB. 871 // Note the new unconditional branch is not being recorded. 872 // There doesn't seem to be meaningful DebugInfo available; this doesn't 873 // correspond to anything in the source. 874 BuildMI(OrigBB, DebugLoc(), TII->get(Mips::Bimm16)).addMBB(NewBB); 875 ++NumSplit; 876 877 // Update the CFG. All succs of OrigBB are now succs of NewBB. 878 NewBB->transferSuccessors(OrigBB); 879 880 // OrigBB branches to NewBB. 881 OrigBB->addSuccessor(NewBB); 882 883 // Update internal data structures to account for the newly inserted MBB. 884 // This is almost the same as updateForInsertedWaterBlock, except that 885 // the Water goes after OrigBB, not NewBB. 886 MF->RenumberBlocks(NewBB); 887 888 // Insert an entry into BBInfo to align it properly with the (newly 889 // renumbered) block numbers. 890 BBInfo.insert(BBInfo.begin() + NewBB->getNumber(), BasicBlockInfo()); 891 892 // Next, update WaterList. Specifically, we need to add OrigMBB as having 893 // available water after it (but not if it's already there, which happens 894 // when splitting before a conditional branch that is followed by an 895 // unconditional branch - in that case we want to insert NewBB). 896 water_iterator IP = 897 std::lower_bound(WaterList.begin(), WaterList.end(), OrigBB, 898 CompareMBBNumbers); 899 MachineBasicBlock* WaterBB = *IP; 900 if (WaterBB == OrigBB) 901 WaterList.insert(std::next(IP), NewBB); 902 else 903 WaterList.insert(IP, OrigBB); 904 NewWaterList.insert(OrigBB); 905 906 // Figure out how large the OrigBB is. As the first half of the original 907 // block, it cannot contain a tablejump. The size includes 908 // the new jump we added. (It should be possible to do this without 909 // recounting everything, but it's very confusing, and this is rarely 910 // executed.) 911 computeBlockSize(OrigBB); 912 913 // Figure out how large the NewMBB is. As the second half of the original 914 // block, it may contain a tablejump. 915 computeBlockSize(NewBB); 916 917 // All BBOffsets following these blocks must be modified. 918 adjustBBOffsetsAfter(OrigBB); 919 920 return NewBB; 921 } 922 923 /// isOffsetInRange - Checks whether UserOffset (the location of a constant pool 924 /// reference) is within MaxDisp of TrialOffset (a proposed location of a 925 /// constant pool entry). 926 bool MipsConstantIslands::isOffsetInRange(unsigned UserOffset, 927 unsigned TrialOffset, unsigned MaxDisp, 928 bool NegativeOK) { 929 if (UserOffset <= TrialOffset) { 930 // User before the Trial. 931 if (TrialOffset - UserOffset <= MaxDisp) 932 return true; 933 } else if (NegativeOK) { 934 if (UserOffset - TrialOffset <= MaxDisp) 935 return true; 936 } 937 return false; 938 } 939 940 /// isWaterInRange - Returns true if a CPE placed after the specified 941 /// Water (a basic block) will be in range for the specific MI. 942 /// 943 /// Compute how much the function will grow by inserting a CPE after Water. 944 bool MipsConstantIslands::isWaterInRange(unsigned UserOffset, 945 MachineBasicBlock* Water, CPUser &U, 946 unsigned &Growth) { 947 unsigned CPELogAlign = getCPELogAlign(*U.CPEMI); 948 unsigned CPEOffset = BBInfo[Water->getNumber()].postOffset(CPELogAlign); 949 unsigned NextBlockOffset, NextBlockAlignment; 950 MachineFunction::const_iterator NextBlock = ++Water->getIterator(); 951 if (NextBlock == MF->end()) { 952 NextBlockOffset = BBInfo[Water->getNumber()].postOffset(); 953 NextBlockAlignment = 0; 954 } else { 955 NextBlockOffset = BBInfo[NextBlock->getNumber()].Offset; 956 NextBlockAlignment = NextBlock->getAlignment(); 957 } 958 unsigned Size = U.CPEMI->getOperand(2).getImm(); 959 unsigned CPEEnd = CPEOffset + Size; 960 961 // The CPE may be able to hide in the alignment padding before the next 962 // block. It may also cause more padding to be required if it is more aligned 963 // that the next block. 964 if (CPEEnd > NextBlockOffset) { 965 Growth = CPEEnd - NextBlockOffset; 966 // Compute the padding that would go at the end of the CPE to align the next 967 // block. 968 Growth += OffsetToAlignment(CPEEnd, 1ULL << NextBlockAlignment); 969 970 // If the CPE is to be inserted before the instruction, that will raise 971 // the offset of the instruction. Also account for unknown alignment padding 972 // in blocks between CPE and the user. 973 if (CPEOffset < UserOffset) 974 UserOffset += Growth; 975 } else 976 // CPE fits in existing padding. 977 Growth = 0; 978 979 return isOffsetInRange(UserOffset, CPEOffset, U); 980 } 981 982 /// isCPEntryInRange - Returns true if the distance between specific MI and 983 /// specific ConstPool entry instruction can fit in MI's displacement field. 984 bool MipsConstantIslands::isCPEntryInRange 985 (MachineInstr *MI, unsigned UserOffset, 986 MachineInstr *CPEMI, unsigned MaxDisp, 987 bool NegOk, bool DoDump) { 988 unsigned CPEOffset = getOffsetOf(CPEMI); 989 990 if (DoDump) { 991 LLVM_DEBUG({ 992 unsigned Block = MI->getParent()->getNumber(); 993 const BasicBlockInfo &BBI = BBInfo[Block]; 994 dbgs() << "User of CPE#" << CPEMI->getOperand(0).getImm() 995 << " max delta=" << MaxDisp 996 << format(" insn address=%#x", UserOffset) << " in " 997 << printMBBReference(*MI->getParent()) << ": " 998 << format("%#x-%x\t", BBI.Offset, BBI.postOffset()) << *MI 999 << format("CPE address=%#x offset=%+d: ", CPEOffset, 1000 int(CPEOffset - UserOffset)); 1001 }); 1002 } 1003 1004 return isOffsetInRange(UserOffset, CPEOffset, MaxDisp, NegOk); 1005 } 1006 1007 #ifndef NDEBUG 1008 /// BBIsJumpedOver - Return true of the specified basic block's only predecessor 1009 /// unconditionally branches to its only successor. 1010 static bool BBIsJumpedOver(MachineBasicBlock *MBB) { 1011 if (MBB->pred_size() != 1 || MBB->succ_size() != 1) 1012 return false; 1013 MachineBasicBlock *Succ = *MBB->succ_begin(); 1014 MachineBasicBlock *Pred = *MBB->pred_begin(); 1015 MachineInstr *PredMI = &Pred->back(); 1016 if (PredMI->getOpcode() == Mips::Bimm16) 1017 return PredMI->getOperand(0).getMBB() == Succ; 1018 return false; 1019 } 1020 #endif 1021 1022 void MipsConstantIslands::adjustBBOffsetsAfter(MachineBasicBlock *BB) { 1023 unsigned BBNum = BB->getNumber(); 1024 for(unsigned i = BBNum + 1, e = MF->getNumBlockIDs(); i < e; ++i) { 1025 // Get the offset and known bits at the end of the layout predecessor. 1026 // Include the alignment of the current block. 1027 unsigned Offset = BBInfo[i - 1].Offset + BBInfo[i - 1].Size; 1028 BBInfo[i].Offset = Offset; 1029 } 1030 } 1031 1032 /// decrementCPEReferenceCount - find the constant pool entry with index CPI 1033 /// and instruction CPEMI, and decrement its refcount. If the refcount 1034 /// becomes 0 remove the entry and instruction. Returns true if we removed 1035 /// the entry, false if we didn't. 1036 bool MipsConstantIslands::decrementCPEReferenceCount(unsigned CPI, 1037 MachineInstr *CPEMI) { 1038 // Find the old entry. Eliminate it if it is no longer used. 1039 CPEntry *CPE = findConstPoolEntry(CPI, CPEMI); 1040 assert(CPE && "Unexpected!"); 1041 if (--CPE->RefCount == 0) { 1042 removeDeadCPEMI(CPEMI); 1043 CPE->CPEMI = nullptr; 1044 --NumCPEs; 1045 return true; 1046 } 1047 return false; 1048 } 1049 1050 /// LookForCPEntryInRange - see if the currently referenced CPE is in range; 1051 /// if not, see if an in-range clone of the CPE is in range, and if so, 1052 /// change the data structures so the user references the clone. Returns: 1053 /// 0 = no existing entry found 1054 /// 1 = entry found, and there were no code insertions or deletions 1055 /// 2 = entry found, and there were code insertions or deletions 1056 int MipsConstantIslands::findInRangeCPEntry(CPUser& U, unsigned UserOffset) 1057 { 1058 MachineInstr *UserMI = U.MI; 1059 MachineInstr *CPEMI = U.CPEMI; 1060 1061 // Check to see if the CPE is already in-range. 1062 if (isCPEntryInRange(UserMI, UserOffset, CPEMI, U.getMaxDisp(), U.NegOk, 1063 true)) { 1064 LLVM_DEBUG(dbgs() << "In range\n"); 1065 return 1; 1066 } 1067 1068 // No. Look for previously created clones of the CPE that are in range. 1069 unsigned CPI = CPEMI->getOperand(1).getIndex(); 1070 std::vector<CPEntry> &CPEs = CPEntries[CPI]; 1071 for (unsigned i = 0, e = CPEs.size(); i != e; ++i) { 1072 // We already tried this one 1073 if (CPEs[i].CPEMI == CPEMI) 1074 continue; 1075 // Removing CPEs can leave empty entries, skip 1076 if (CPEs[i].CPEMI == nullptr) 1077 continue; 1078 if (isCPEntryInRange(UserMI, UserOffset, CPEs[i].CPEMI, U.getMaxDisp(), 1079 U.NegOk)) { 1080 LLVM_DEBUG(dbgs() << "Replacing CPE#" << CPI << " with CPE#" 1081 << CPEs[i].CPI << "\n"); 1082 // Point the CPUser node to the replacement 1083 U.CPEMI = CPEs[i].CPEMI; 1084 // Change the CPI in the instruction operand to refer to the clone. 1085 for (unsigned j = 0, e = UserMI->getNumOperands(); j != e; ++j) 1086 if (UserMI->getOperand(j).isCPI()) { 1087 UserMI->getOperand(j).setIndex(CPEs[i].CPI); 1088 break; 1089 } 1090 // Adjust the refcount of the clone... 1091 CPEs[i].RefCount++; 1092 // ...and the original. If we didn't remove the old entry, none of the 1093 // addresses changed, so we don't need another pass. 1094 return decrementCPEReferenceCount(CPI, CPEMI) ? 2 : 1; 1095 } 1096 } 1097 return 0; 1098 } 1099 1100 /// LookForCPEntryInRange - see if the currently referenced CPE is in range; 1101 /// This version checks if the longer form of the instruction can be used to 1102 /// to satisfy things. 1103 /// if not, see if an in-range clone of the CPE is in range, and if so, 1104 /// change the data structures so the user references the clone. Returns: 1105 /// 0 = no existing entry found 1106 /// 1 = entry found, and there were no code insertions or deletions 1107 /// 2 = entry found, and there were code insertions or deletions 1108 int MipsConstantIslands::findLongFormInRangeCPEntry 1109 (CPUser& U, unsigned UserOffset) 1110 { 1111 MachineInstr *UserMI = U.MI; 1112 MachineInstr *CPEMI = U.CPEMI; 1113 1114 // Check to see if the CPE is already in-range. 1115 if (isCPEntryInRange(UserMI, UserOffset, CPEMI, 1116 U.getLongFormMaxDisp(), U.NegOk, 1117 true)) { 1118 LLVM_DEBUG(dbgs() << "In range\n"); 1119 UserMI->setDesc(TII->get(U.getLongFormOpcode())); 1120 U.setMaxDisp(U.getLongFormMaxDisp()); 1121 return 2; // instruction is longer length now 1122 } 1123 1124 // No. Look for previously created clones of the CPE that are in range. 1125 unsigned CPI = CPEMI->getOperand(1).getIndex(); 1126 std::vector<CPEntry> &CPEs = CPEntries[CPI]; 1127 for (unsigned i = 0, e = CPEs.size(); i != e; ++i) { 1128 // We already tried this one 1129 if (CPEs[i].CPEMI == CPEMI) 1130 continue; 1131 // Removing CPEs can leave empty entries, skip 1132 if (CPEs[i].CPEMI == nullptr) 1133 continue; 1134 if (isCPEntryInRange(UserMI, UserOffset, CPEs[i].CPEMI, 1135 U.getLongFormMaxDisp(), U.NegOk)) { 1136 LLVM_DEBUG(dbgs() << "Replacing CPE#" << CPI << " with CPE#" 1137 << CPEs[i].CPI << "\n"); 1138 // Point the CPUser node to the replacement 1139 U.CPEMI = CPEs[i].CPEMI; 1140 // Change the CPI in the instruction operand to refer to the clone. 1141 for (unsigned j = 0, e = UserMI->getNumOperands(); j != e; ++j) 1142 if (UserMI->getOperand(j).isCPI()) { 1143 UserMI->getOperand(j).setIndex(CPEs[i].CPI); 1144 break; 1145 } 1146 // Adjust the refcount of the clone... 1147 CPEs[i].RefCount++; 1148 // ...and the original. If we didn't remove the old entry, none of the 1149 // addresses changed, so we don't need another pass. 1150 return decrementCPEReferenceCount(CPI, CPEMI) ? 2 : 1; 1151 } 1152 } 1153 return 0; 1154 } 1155 1156 /// getUnconditionalBrDisp - Returns the maximum displacement that can fit in 1157 /// the specific unconditional branch instruction. 1158 static inline unsigned getUnconditionalBrDisp(int Opc) { 1159 switch (Opc) { 1160 case Mips::Bimm16: 1161 return ((1<<10)-1)*2; 1162 case Mips::BimmX16: 1163 return ((1<<16)-1)*2; 1164 default: 1165 break; 1166 } 1167 return ((1<<16)-1)*2; 1168 } 1169 1170 /// findAvailableWater - Look for an existing entry in the WaterList in which 1171 /// we can place the CPE referenced from U so it's within range of U's MI. 1172 /// Returns true if found, false if not. If it returns true, WaterIter 1173 /// is set to the WaterList entry. 1174 /// To ensure that this pass 1175 /// terminates, the CPE location for a particular CPUser is only allowed to 1176 /// move to a lower address, so search backward from the end of the list and 1177 /// prefer the first water that is in range. 1178 bool MipsConstantIslands::findAvailableWater(CPUser &U, unsigned UserOffset, 1179 water_iterator &WaterIter) { 1180 if (WaterList.empty()) 1181 return false; 1182 1183 unsigned BestGrowth = ~0u; 1184 for (water_iterator IP = std::prev(WaterList.end()), B = WaterList.begin();; 1185 --IP) { 1186 MachineBasicBlock* WaterBB = *IP; 1187 // Check if water is in range and is either at a lower address than the 1188 // current "high water mark" or a new water block that was created since 1189 // the previous iteration by inserting an unconditional branch. In the 1190 // latter case, we want to allow resetting the high water mark back to 1191 // this new water since we haven't seen it before. Inserting branches 1192 // should be relatively uncommon and when it does happen, we want to be 1193 // sure to take advantage of it for all the CPEs near that block, so that 1194 // we don't insert more branches than necessary. 1195 unsigned Growth; 1196 if (isWaterInRange(UserOffset, WaterBB, U, Growth) && 1197 (WaterBB->getNumber() < U.HighWaterMark->getNumber() || 1198 NewWaterList.count(WaterBB)) && Growth < BestGrowth) { 1199 // This is the least amount of required padding seen so far. 1200 BestGrowth = Growth; 1201 WaterIter = IP; 1202 LLVM_DEBUG(dbgs() << "Found water after " << printMBBReference(*WaterBB) 1203 << " Growth=" << Growth << '\n'); 1204 1205 // Keep looking unless it is perfect. 1206 if (BestGrowth == 0) 1207 return true; 1208 } 1209 if (IP == B) 1210 break; 1211 } 1212 return BestGrowth != ~0u; 1213 } 1214 1215 /// createNewWater - No existing WaterList entry will work for 1216 /// CPUsers[CPUserIndex], so create a place to put the CPE. The end of the 1217 /// block is used if in range, and the conditional branch munged so control 1218 /// flow is correct. Otherwise the block is split to create a hole with an 1219 /// unconditional branch around it. In either case NewMBB is set to a 1220 /// block following which the new island can be inserted (the WaterList 1221 /// is not adjusted). 1222 void MipsConstantIslands::createNewWater(unsigned CPUserIndex, 1223 unsigned UserOffset, 1224 MachineBasicBlock *&NewMBB) { 1225 CPUser &U = CPUsers[CPUserIndex]; 1226 MachineInstr *UserMI = U.MI; 1227 MachineInstr *CPEMI = U.CPEMI; 1228 unsigned CPELogAlign = getCPELogAlign(*CPEMI); 1229 MachineBasicBlock *UserMBB = UserMI->getParent(); 1230 const BasicBlockInfo &UserBBI = BBInfo[UserMBB->getNumber()]; 1231 1232 // If the block does not end in an unconditional branch already, and if the 1233 // end of the block is within range, make new water there. 1234 if (BBHasFallthrough(UserMBB)) { 1235 // Size of branch to insert. 1236 unsigned Delta = 2; 1237 // Compute the offset where the CPE will begin. 1238 unsigned CPEOffset = UserBBI.postOffset(CPELogAlign) + Delta; 1239 1240 if (isOffsetInRange(UserOffset, CPEOffset, U)) { 1241 LLVM_DEBUG(dbgs() << "Split at end of " << printMBBReference(*UserMBB) 1242 << format(", expected CPE offset %#x\n", CPEOffset)); 1243 NewMBB = &*++UserMBB->getIterator(); 1244 // Add an unconditional branch from UserMBB to fallthrough block. Record 1245 // it for branch lengthening; this new branch will not get out of range, 1246 // but if the preceding conditional branch is out of range, the targets 1247 // will be exchanged, and the altered branch may be out of range, so the 1248 // machinery has to know about it. 1249 int UncondBr = Mips::Bimm16; 1250 BuildMI(UserMBB, DebugLoc(), TII->get(UncondBr)).addMBB(NewMBB); 1251 unsigned MaxDisp = getUnconditionalBrDisp(UncondBr); 1252 ImmBranches.push_back(ImmBranch(&UserMBB->back(), 1253 MaxDisp, false, UncondBr)); 1254 BBInfo[UserMBB->getNumber()].Size += Delta; 1255 adjustBBOffsetsAfter(UserMBB); 1256 return; 1257 } 1258 } 1259 1260 // What a big block. Find a place within the block to split it. 1261 1262 // Try to split the block so it's fully aligned. Compute the latest split 1263 // point where we can add a 4-byte branch instruction, and then align to 1264 // LogAlign which is the largest possible alignment in the function. 1265 unsigned LogAlign = MF->getAlignment(); 1266 assert(LogAlign >= CPELogAlign && "Over-aligned constant pool entry"); 1267 unsigned BaseInsertOffset = UserOffset + U.getMaxDisp(); 1268 LLVM_DEBUG(dbgs() << format("Split in middle of big block before %#x", 1269 BaseInsertOffset)); 1270 1271 // The 4 in the following is for the unconditional branch we'll be inserting 1272 // Alignment of the island is handled 1273 // inside isOffsetInRange. 1274 BaseInsertOffset -= 4; 1275 1276 LLVM_DEBUG(dbgs() << format(", adjusted to %#x", BaseInsertOffset) 1277 << " la=" << LogAlign << '\n'); 1278 1279 // This could point off the end of the block if we've already got constant 1280 // pool entries following this block; only the last one is in the water list. 1281 // Back past any possible branches (allow for a conditional and a maximally 1282 // long unconditional). 1283 if (BaseInsertOffset + 8 >= UserBBI.postOffset()) { 1284 BaseInsertOffset = UserBBI.postOffset() - 8; 1285 LLVM_DEBUG(dbgs() << format("Move inside block: %#x\n", BaseInsertOffset)); 1286 } 1287 unsigned EndInsertOffset = BaseInsertOffset + 4 + 1288 CPEMI->getOperand(2).getImm(); 1289 MachineBasicBlock::iterator MI = UserMI; 1290 ++MI; 1291 unsigned CPUIndex = CPUserIndex+1; 1292 unsigned NumCPUsers = CPUsers.size(); 1293 //MachineInstr *LastIT = 0; 1294 for (unsigned Offset = UserOffset + TII->getInstSizeInBytes(*UserMI); 1295 Offset < BaseInsertOffset; 1296 Offset += TII->getInstSizeInBytes(*MI), MI = std::next(MI)) { 1297 assert(MI != UserMBB->end() && "Fell off end of block"); 1298 if (CPUIndex < NumCPUsers && CPUsers[CPUIndex].MI == MI) { 1299 CPUser &U = CPUsers[CPUIndex]; 1300 if (!isOffsetInRange(Offset, EndInsertOffset, U)) { 1301 // Shift intertion point by one unit of alignment so it is within reach. 1302 BaseInsertOffset -= 1u << LogAlign; 1303 EndInsertOffset -= 1u << LogAlign; 1304 } 1305 // This is overly conservative, as we don't account for CPEMIs being 1306 // reused within the block, but it doesn't matter much. Also assume CPEs 1307 // are added in order with alignment padding. We may eventually be able 1308 // to pack the aligned CPEs better. 1309 EndInsertOffset += U.CPEMI->getOperand(2).getImm(); 1310 CPUIndex++; 1311 } 1312 } 1313 1314 NewMBB = splitBlockBeforeInstr(*--MI); 1315 } 1316 1317 /// handleConstantPoolUser - Analyze the specified user, checking to see if it 1318 /// is out-of-range. If so, pick up the constant pool value and move it some 1319 /// place in-range. Return true if we changed any addresses (thus must run 1320 /// another pass of branch lengthening), false otherwise. 1321 bool MipsConstantIslands::handleConstantPoolUser(unsigned CPUserIndex) { 1322 CPUser &U = CPUsers[CPUserIndex]; 1323 MachineInstr *UserMI = U.MI; 1324 MachineInstr *CPEMI = U.CPEMI; 1325 unsigned CPI = CPEMI->getOperand(1).getIndex(); 1326 unsigned Size = CPEMI->getOperand(2).getImm(); 1327 // Compute this only once, it's expensive. 1328 unsigned UserOffset = getUserOffset(U); 1329 1330 // See if the current entry is within range, or there is a clone of it 1331 // in range. 1332 int result = findInRangeCPEntry(U, UserOffset); 1333 if (result==1) return false; 1334 else if (result==2) return true; 1335 1336 // Look for water where we can place this CPE. 1337 MachineBasicBlock *NewIsland = MF->CreateMachineBasicBlock(); 1338 MachineBasicBlock *NewMBB; 1339 water_iterator IP; 1340 if (findAvailableWater(U, UserOffset, IP)) { 1341 LLVM_DEBUG(dbgs() << "Found water in range\n"); 1342 MachineBasicBlock *WaterBB = *IP; 1343 1344 // If the original WaterList entry was "new water" on this iteration, 1345 // propagate that to the new island. This is just keeping NewWaterList 1346 // updated to match the WaterList, which will be updated below. 1347 if (NewWaterList.erase(WaterBB)) 1348 NewWaterList.insert(NewIsland); 1349 1350 // The new CPE goes before the following block (NewMBB). 1351 NewMBB = &*++WaterBB->getIterator(); 1352 } else { 1353 // No water found. 1354 // we first see if a longer form of the instrucion could have reached 1355 // the constant. in that case we won't bother to split 1356 if (!NoLoadRelaxation) { 1357 result = findLongFormInRangeCPEntry(U, UserOffset); 1358 if (result != 0) return true; 1359 } 1360 LLVM_DEBUG(dbgs() << "No water found\n"); 1361 createNewWater(CPUserIndex, UserOffset, NewMBB); 1362 1363 // splitBlockBeforeInstr adds to WaterList, which is important when it is 1364 // called while handling branches so that the water will be seen on the 1365 // next iteration for constant pools, but in this context, we don't want 1366 // it. Check for this so it will be removed from the WaterList. 1367 // Also remove any entry from NewWaterList. 1368 MachineBasicBlock *WaterBB = &*--NewMBB->getIterator(); 1369 IP = llvm::find(WaterList, WaterBB); 1370 if (IP != WaterList.end()) 1371 NewWaterList.erase(WaterBB); 1372 1373 // We are adding new water. Update NewWaterList. 1374 NewWaterList.insert(NewIsland); 1375 } 1376 1377 // Remove the original WaterList entry; we want subsequent insertions in 1378 // this vicinity to go after the one we're about to insert. This 1379 // considerably reduces the number of times we have to move the same CPE 1380 // more than once and is also important to ensure the algorithm terminates. 1381 if (IP != WaterList.end()) 1382 WaterList.erase(IP); 1383 1384 // Okay, we know we can put an island before NewMBB now, do it! 1385 MF->insert(NewMBB->getIterator(), NewIsland); 1386 1387 // Update internal data structures to account for the newly inserted MBB. 1388 updateForInsertedWaterBlock(NewIsland); 1389 1390 // Decrement the old entry, and remove it if refcount becomes 0. 1391 decrementCPEReferenceCount(CPI, CPEMI); 1392 1393 // No existing clone of this CPE is within range. 1394 // We will be generating a new clone. Get a UID for it. 1395 unsigned ID = createPICLabelUId(); 1396 1397 // Now that we have an island to add the CPE to, clone the original CPE and 1398 // add it to the island. 1399 U.HighWaterMark = NewIsland; 1400 U.CPEMI = BuildMI(NewIsland, DebugLoc(), TII->get(Mips::CONSTPOOL_ENTRY)) 1401 .addImm(ID).addConstantPoolIndex(CPI).addImm(Size); 1402 CPEntries[CPI].push_back(CPEntry(U.CPEMI, ID, 1)); 1403 ++NumCPEs; 1404 1405 // Mark the basic block as aligned as required by the const-pool entry. 1406 NewIsland->setAlignment(getCPELogAlign(*U.CPEMI)); 1407 1408 // Increase the size of the island block to account for the new entry. 1409 BBInfo[NewIsland->getNumber()].Size += Size; 1410 adjustBBOffsetsAfter(&*--NewIsland->getIterator()); 1411 1412 // Finally, change the CPI in the instruction operand to be ID. 1413 for (unsigned i = 0, e = UserMI->getNumOperands(); i != e; ++i) 1414 if (UserMI->getOperand(i).isCPI()) { 1415 UserMI->getOperand(i).setIndex(ID); 1416 break; 1417 } 1418 1419 LLVM_DEBUG( 1420 dbgs() << " Moved CPE to #" << ID << " CPI=" << CPI 1421 << format(" offset=%#x\n", BBInfo[NewIsland->getNumber()].Offset)); 1422 1423 return true; 1424 } 1425 1426 /// removeDeadCPEMI - Remove a dead constant pool entry instruction. Update 1427 /// sizes and offsets of impacted basic blocks. 1428 void MipsConstantIslands::removeDeadCPEMI(MachineInstr *CPEMI) { 1429 MachineBasicBlock *CPEBB = CPEMI->getParent(); 1430 unsigned Size = CPEMI->getOperand(2).getImm(); 1431 CPEMI->eraseFromParent(); 1432 BBInfo[CPEBB->getNumber()].Size -= Size; 1433 // All succeeding offsets have the current size value added in, fix this. 1434 if (CPEBB->empty()) { 1435 BBInfo[CPEBB->getNumber()].Size = 0; 1436 1437 // This block no longer needs to be aligned. 1438 CPEBB->setAlignment(0); 1439 } else 1440 // Entries are sorted by descending alignment, so realign from the front. 1441 CPEBB->setAlignment(getCPELogAlign(*CPEBB->begin())); 1442 1443 adjustBBOffsetsAfter(CPEBB); 1444 // An island has only one predecessor BB and one successor BB. Check if 1445 // this BB's predecessor jumps directly to this BB's successor. This 1446 // shouldn't happen currently. 1447 assert(!BBIsJumpedOver(CPEBB) && "How did this happen?"); 1448 // FIXME: remove the empty blocks after all the work is done? 1449 } 1450 1451 /// removeUnusedCPEntries - Remove constant pool entries whose refcounts 1452 /// are zero. 1453 bool MipsConstantIslands::removeUnusedCPEntries() { 1454 unsigned MadeChange = false; 1455 for (unsigned i = 0, e = CPEntries.size(); i != e; ++i) { 1456 std::vector<CPEntry> &CPEs = CPEntries[i]; 1457 for (unsigned j = 0, ee = CPEs.size(); j != ee; ++j) { 1458 if (CPEs[j].RefCount == 0 && CPEs[j].CPEMI) { 1459 removeDeadCPEMI(CPEs[j].CPEMI); 1460 CPEs[j].CPEMI = nullptr; 1461 MadeChange = true; 1462 } 1463 } 1464 } 1465 return MadeChange; 1466 } 1467 1468 /// isBBInRange - Returns true if the distance between specific MI and 1469 /// specific BB can fit in MI's displacement field. 1470 bool MipsConstantIslands::isBBInRange 1471 (MachineInstr *MI,MachineBasicBlock *DestBB, unsigned MaxDisp) { 1472 unsigned PCAdj = 4; 1473 unsigned BrOffset = getOffsetOf(MI) + PCAdj; 1474 unsigned DestOffset = BBInfo[DestBB->getNumber()].Offset; 1475 1476 LLVM_DEBUG(dbgs() << "Branch of destination " << printMBBReference(*DestBB) 1477 << " from " << printMBBReference(*MI->getParent()) 1478 << " max delta=" << MaxDisp << " from " << getOffsetOf(MI) 1479 << " to " << DestOffset << " offset " 1480 << int(DestOffset - BrOffset) << "\t" << *MI); 1481 1482 if (BrOffset <= DestOffset) { 1483 // Branch before the Dest. 1484 if (DestOffset-BrOffset <= MaxDisp) 1485 return true; 1486 } else { 1487 if (BrOffset-DestOffset <= MaxDisp) 1488 return true; 1489 } 1490 return false; 1491 } 1492 1493 /// fixupImmediateBr - Fix up an immediate branch whose destination is too far 1494 /// away to fit in its displacement field. 1495 bool MipsConstantIslands::fixupImmediateBr(ImmBranch &Br) { 1496 MachineInstr *MI = Br.MI; 1497 unsigned TargetOperand = branchTargetOperand(MI); 1498 MachineBasicBlock *DestBB = MI->getOperand(TargetOperand).getMBB(); 1499 1500 // Check to see if the DestBB is already in-range. 1501 if (isBBInRange(MI, DestBB, Br.MaxDisp)) 1502 return false; 1503 1504 if (!Br.isCond) 1505 return fixupUnconditionalBr(Br); 1506 return fixupConditionalBr(Br); 1507 } 1508 1509 /// fixupUnconditionalBr - Fix up an unconditional branch whose destination is 1510 /// too far away to fit in its displacement field. If the LR register has been 1511 /// spilled in the epilogue, then we can use BL to implement a far jump. 1512 /// Otherwise, add an intermediate branch instruction to a branch. 1513 bool 1514 MipsConstantIslands::fixupUnconditionalBr(ImmBranch &Br) { 1515 MachineInstr *MI = Br.MI; 1516 MachineBasicBlock *MBB = MI->getParent(); 1517 MachineBasicBlock *DestBB = MI->getOperand(0).getMBB(); 1518 // Use BL to implement far jump. 1519 unsigned BimmX16MaxDisp = ((1 << 16)-1) * 2; 1520 if (isBBInRange(MI, DestBB, BimmX16MaxDisp)) { 1521 Br.MaxDisp = BimmX16MaxDisp; 1522 MI->setDesc(TII->get(Mips::BimmX16)); 1523 } 1524 else { 1525 // need to give the math a more careful look here 1526 // this is really a segment address and not 1527 // a PC relative address. FIXME. But I think that 1528 // just reducing the bits by 1 as I've done is correct. 1529 // The basic block we are branching too much be longword aligned. 1530 // we know that RA is saved because we always save it right now. 1531 // this requirement will be relaxed later but we also have an alternate 1532 // way to implement this that I will implement that does not need jal. 1533 // We should have a way to back out this alignment restriction if we "can" later. 1534 // but it is not harmful. 1535 // 1536 DestBB->setAlignment(2); 1537 Br.MaxDisp = ((1<<24)-1) * 2; 1538 MI->setDesc(TII->get(Mips::JalB16)); 1539 } 1540 BBInfo[MBB->getNumber()].Size += 2; 1541 adjustBBOffsetsAfter(MBB); 1542 HasFarJump = true; 1543 ++NumUBrFixed; 1544 1545 LLVM_DEBUG(dbgs() << " Changed B to long jump " << *MI); 1546 1547 return true; 1548 } 1549 1550 /// fixupConditionalBr - Fix up a conditional branch whose destination is too 1551 /// far away to fit in its displacement field. It is converted to an inverse 1552 /// conditional branch + an unconditional branch to the destination. 1553 bool 1554 MipsConstantIslands::fixupConditionalBr(ImmBranch &Br) { 1555 MachineInstr *MI = Br.MI; 1556 unsigned TargetOperand = branchTargetOperand(MI); 1557 MachineBasicBlock *DestBB = MI->getOperand(TargetOperand).getMBB(); 1558 unsigned Opcode = MI->getOpcode(); 1559 unsigned LongFormOpcode = longformBranchOpcode(Opcode); 1560 unsigned LongFormMaxOff = branchMaxOffsets(LongFormOpcode); 1561 1562 // Check to see if the DestBB is already in-range. 1563 if (isBBInRange(MI, DestBB, LongFormMaxOff)) { 1564 Br.MaxDisp = LongFormMaxOff; 1565 MI->setDesc(TII->get(LongFormOpcode)); 1566 return true; 1567 } 1568 1569 // Add an unconditional branch to the destination and invert the branch 1570 // condition to jump over it: 1571 // bteqz L1 1572 // => 1573 // bnez L2 1574 // b L1 1575 // L2: 1576 1577 // If the branch is at the end of its MBB and that has a fall-through block, 1578 // direct the updated conditional branch to the fall-through block. Otherwise, 1579 // split the MBB before the next instruction. 1580 MachineBasicBlock *MBB = MI->getParent(); 1581 MachineInstr *BMI = &MBB->back(); 1582 bool NeedSplit = (BMI != MI) || !BBHasFallthrough(MBB); 1583 unsigned OppositeBranchOpcode = TII->getOppositeBranchOpc(Opcode); 1584 1585 ++NumCBrFixed; 1586 if (BMI != MI) { 1587 if (std::next(MachineBasicBlock::iterator(MI)) == std::prev(MBB->end()) && 1588 BMI->isUnconditionalBranch()) { 1589 // Last MI in the BB is an unconditional branch. Can we simply invert the 1590 // condition and swap destinations: 1591 // beqz L1 1592 // b L2 1593 // => 1594 // bnez L2 1595 // b L1 1596 unsigned BMITargetOperand = branchTargetOperand(BMI); 1597 MachineBasicBlock *NewDest = 1598 BMI->getOperand(BMITargetOperand).getMBB(); 1599 if (isBBInRange(MI, NewDest, Br.MaxDisp)) { 1600 LLVM_DEBUG( 1601 dbgs() << " Invert Bcc condition and swap its destination with " 1602 << *BMI); 1603 MI->setDesc(TII->get(OppositeBranchOpcode)); 1604 BMI->getOperand(BMITargetOperand).setMBB(DestBB); 1605 MI->getOperand(TargetOperand).setMBB(NewDest); 1606 return true; 1607 } 1608 } 1609 } 1610 1611 if (NeedSplit) { 1612 splitBlockBeforeInstr(*MI); 1613 // No need for the branch to the next block. We're adding an unconditional 1614 // branch to the destination. 1615 int delta = TII->getInstSizeInBytes(MBB->back()); 1616 BBInfo[MBB->getNumber()].Size -= delta; 1617 MBB->back().eraseFromParent(); 1618 // BBInfo[SplitBB].Offset is wrong temporarily, fixed below 1619 } 1620 MachineBasicBlock *NextBB = &*++MBB->getIterator(); 1621 1622 LLVM_DEBUG(dbgs() << " Insert B to " << printMBBReference(*DestBB) 1623 << " also invert condition and change dest. to " 1624 << printMBBReference(*NextBB) << "\n"); 1625 1626 // Insert a new conditional branch and a new unconditional branch. 1627 // Also update the ImmBranch as well as adding a new entry for the new branch. 1628 if (MI->getNumExplicitOperands() == 2) { 1629 BuildMI(MBB, DebugLoc(), TII->get(OppositeBranchOpcode)) 1630 .addReg(MI->getOperand(0).getReg()) 1631 .addMBB(NextBB); 1632 } else { 1633 BuildMI(MBB, DebugLoc(), TII->get(OppositeBranchOpcode)) 1634 .addMBB(NextBB); 1635 } 1636 Br.MI = &MBB->back(); 1637 BBInfo[MBB->getNumber()].Size += TII->getInstSizeInBytes(MBB->back()); 1638 BuildMI(MBB, DebugLoc(), TII->get(Br.UncondBr)).addMBB(DestBB); 1639 BBInfo[MBB->getNumber()].Size += TII->getInstSizeInBytes(MBB->back()); 1640 unsigned MaxDisp = getUnconditionalBrDisp(Br.UncondBr); 1641 ImmBranches.push_back(ImmBranch(&MBB->back(), MaxDisp, false, Br.UncondBr)); 1642 1643 // Remove the old conditional branch. It may or may not still be in MBB. 1644 BBInfo[MI->getParent()->getNumber()].Size -= TII->getInstSizeInBytes(*MI); 1645 MI->eraseFromParent(); 1646 adjustBBOffsetsAfter(MBB); 1647 return true; 1648 } 1649 1650 void MipsConstantIslands::prescanForConstants() { 1651 unsigned J = 0; 1652 (void)J; 1653 for (MachineFunction::iterator B = 1654 MF->begin(), E = MF->end(); B != E; ++B) { 1655 for (MachineBasicBlock::instr_iterator I = 1656 B->instr_begin(), EB = B->instr_end(); I != EB; ++I) { 1657 switch(I->getDesc().getOpcode()) { 1658 case Mips::LwConstant32: { 1659 PrescannedForConstants = true; 1660 LLVM_DEBUG(dbgs() << "constant island constant " << *I << "\n"); 1661 J = I->getNumOperands(); 1662 LLVM_DEBUG(dbgs() << "num operands " << J << "\n"); 1663 MachineOperand& Literal = I->getOperand(1); 1664 if (Literal.isImm()) { 1665 int64_t V = Literal.getImm(); 1666 LLVM_DEBUG(dbgs() << "literal " << V << "\n"); 1667 Type *Int32Ty = 1668 Type::getInt32Ty(MF->getFunction().getContext()); 1669 const Constant *C = ConstantInt::get(Int32Ty, V); 1670 unsigned index = MCP->getConstantPoolIndex(C, 4); 1671 I->getOperand(2).ChangeToImmediate(index); 1672 LLVM_DEBUG(dbgs() << "constant island constant " << *I << "\n"); 1673 I->setDesc(TII->get(Mips::LwRxPcTcp16)); 1674 I->RemoveOperand(1); 1675 I->RemoveOperand(1); 1676 I->addOperand(MachineOperand::CreateCPI(index, 0)); 1677 I->addOperand(MachineOperand::CreateImm(4)); 1678 } 1679 break; 1680 } 1681 default: 1682 break; 1683 } 1684 } 1685 } 1686 } 1687 1688 /// Returns a pass that converts branches to long branches. 1689 FunctionPass *llvm::createMipsConstantIslandPass() { 1690 return new MipsConstantIslands(); 1691 } 1692