1 //===-- Mips16RegisterInfo.cpp - MIPS16 Register Information --------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the MIPS16 implementation of the TargetRegisterInfo class.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "Mips16RegisterInfo.h"
15 #include "Mips.h"
16 #include "Mips16InstrInfo.h"
17 #include "MipsAnalyzeImmediate.h"
18 #include "MipsInstrInfo.h"
19 #include "MipsMachineFunction.h"
20 #include "MipsSubtarget.h"
21 #include "llvm/ADT/BitVector.h"
22 #include "llvm/ADT/STLExtras.h"
23 #include "llvm/CodeGen/MachineFrameInfo.h"
24 #include "llvm/CodeGen/MachineFunction.h"
25 #include "llvm/CodeGen/MachineInstrBuilder.h"
26 #include "llvm/CodeGen/MachineRegisterInfo.h"
27 #include "llvm/IR/Constants.h"
28 #include "llvm/IR/DebugInfo.h"
29 #include "llvm/IR/Function.h"
30 #include "llvm/IR/Type.h"
31 #include "llvm/Support/CommandLine.h"
32 #include "llvm/Support/Debug.h"
33 #include "llvm/Support/ErrorHandling.h"
34 #include "llvm/Support/raw_ostream.h"
35 #include "llvm/Target/TargetFrameLowering.h"
36 #include "llvm/Target/TargetInstrInfo.h"
37 #include "llvm/Target/TargetMachine.h"
38 #include "llvm/Target/TargetOptions.h"
39 
40 using namespace llvm;
41 
42 Mips16RegisterInfo::Mips16RegisterInfo(const MipsSubtarget &ST)
43   : MipsRegisterInfo(ST) {}
44 
45 bool Mips16RegisterInfo::requiresRegisterScavenging
46   (const MachineFunction &MF) const {
47   return false;
48 }
49 bool Mips16RegisterInfo::requiresFrameIndexScavenging
50   (const MachineFunction &MF) const {
51   return false;
52 }
53 
54 bool Mips16RegisterInfo::useFPForScavengingIndex
55   (const MachineFunction &MF) const {
56   return false;
57 }
58 
59 bool Mips16RegisterInfo::saveScavengerRegister
60   (MachineBasicBlock &MBB,
61    MachineBasicBlock::iterator I,
62    MachineBasicBlock::iterator &UseMI,
63    const TargetRegisterClass *RC,
64    unsigned Reg) const {
65   DebugLoc DL;
66   const TargetInstrInfo &TII = *MBB.getParent()->getTarget().getInstrInfo();
67   TII.copyPhysReg(MBB, I, DL, Mips::T0, Reg, true);
68   TII.copyPhysReg(MBB, UseMI, DL, Reg, Mips::T0, true);
69   return true;
70 }
71 
72 const TargetRegisterClass *
73 Mips16RegisterInfo::intRegClass(unsigned Size) const {
74   assert(Size == 4);
75   return &Mips::CPU16RegsRegClass;
76 }
77 
78 void Mips16RegisterInfo::eliminateFI(MachineBasicBlock::iterator II,
79                                      unsigned OpNo, int FrameIndex,
80                                      uint64_t StackSize,
81                                      int64_t SPOffset) const {
82   MachineInstr &MI = *II;
83   MachineFunction &MF = *MI.getParent()->getParent();
84   MachineFrameInfo *MFI = MF.getFrameInfo();
85 
86   const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
87   int MinCSFI = 0;
88   int MaxCSFI = -1;
89 
90   if (CSI.size()) {
91     MinCSFI = CSI[0].getFrameIdx();
92     MaxCSFI = CSI[CSI.size() - 1].getFrameIdx();
93   }
94 
95   // The following stack frame objects are always
96   // referenced relative to $sp:
97   //  1. Outgoing arguments.
98   //  2. Pointer to dynamically allocated stack space.
99   //  3. Locations for callee-saved registers.
100   // Everything else is referenced relative to whatever register
101   // getFrameRegister() returns.
102   unsigned FrameReg;
103 
104   if (FrameIndex >= MinCSFI && FrameIndex <= MaxCSFI)
105     FrameReg = Mips::SP;
106   else {
107     const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
108     if (TFI->hasFP(MF)) {
109       FrameReg = Mips::S0;
110     }
111     else {
112       if ((MI.getNumOperands()> OpNo+2) && MI.getOperand(OpNo+2).isReg())
113         FrameReg = MI.getOperand(OpNo+2).getReg();
114       else
115         FrameReg = Mips::SP;
116     }
117   }
118   // Calculate final offset.
119   // - There is no need to change the offset if the frame object
120   //   is one of the
121   //   following: an outgoing argument, pointer to a dynamically allocated
122   //   stack space or a $gp restore location,
123   // - If the frame object is any of the following,
124   //   its offset must be adjusted
125   //   by adding the size of the stack:
126   //   incoming argument, callee-saved register location or local variable.
127   int64_t Offset;
128   bool IsKill = false;
129   Offset = SPOffset + (int64_t)StackSize;
130   Offset += MI.getOperand(OpNo + 1).getImm();
131 
132 
133   DEBUG(errs() << "Offset     : " << Offset << "\n" << "<--------->\n");
134 
135   if (!MI.isDebugValue() &&
136       !Mips16InstrInfo::validImmediate(MI.getOpcode(), FrameReg, Offset)) {
137     MachineBasicBlock &MBB = *MI.getParent();
138     DebugLoc DL = II->getDebugLoc();
139     unsigned NewImm;
140     const Mips16InstrInfo &TII =
141       *static_cast<const Mips16InstrInfo*>(
142         MBB.getParent()->getTarget().getInstrInfo());
143     FrameReg = TII.loadImmediate(FrameReg, Offset, MBB, II, DL, NewImm);
144     Offset = SignExtend64<16>(NewImm);
145     IsKill = true;
146   }
147   MI.getOperand(OpNo).ChangeToRegister(FrameReg, false, false, IsKill);
148   MI.getOperand(OpNo + 1).ChangeToImmediate(Offset);
149 
150 
151 }
152