1 //===-- Mips16RegisterInfo.cpp - MIPS16 Register Information --------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the MIPS16 implementation of the TargetRegisterInfo class.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "Mips16RegisterInfo.h"
15 #include "Mips.h"
16 #include "Mips16InstrInfo.h"
17 #include "MipsAnalyzeImmediate.h"
18 #include "MipsInstrInfo.h"
19 #include "MipsMachineFunction.h"
20 #include "MipsSubtarget.h"
21 #include "llvm/ADT/BitVector.h"
22 #include "llvm/ADT/STLExtras.h"
23 #include "llvm/CodeGen/MachineFrameInfo.h"
24 #include "llvm/CodeGen/MachineFunction.h"
25 #include "llvm/CodeGen/MachineInstrBuilder.h"
26 #include "llvm/CodeGen/MachineRegisterInfo.h"
27 #include "llvm/CodeGen/ValueTypes.h"
28 #include "llvm/DebugInfo.h"
29 #include "llvm/IR/Constants.h"
30 #include "llvm/IR/Function.h"
31 #include "llvm/IR/Type.h"
32 #include "llvm/Support/CommandLine.h"
33 #include "llvm/Support/Debug.h"
34 #include "llvm/Support/ErrorHandling.h"
35 #include "llvm/Support/raw_ostream.h"
36 #include "llvm/Target/TargetFrameLowering.h"
37 #include "llvm/Target/TargetInstrInfo.h"
38 #include "llvm/Target/TargetMachine.h"
39 #include "llvm/Target/TargetOptions.h"
40 
41 using namespace llvm;
42 
43 Mips16RegisterInfo::Mips16RegisterInfo(const MipsSubtarget &ST)
44   : MipsRegisterInfo(ST) {}
45 
46 bool Mips16RegisterInfo::requiresRegisterScavenging
47   (const MachineFunction &MF) const {
48   return false;
49 }
50 bool Mips16RegisterInfo::requiresFrameIndexScavenging
51   (const MachineFunction &MF) const {
52   return false;
53 }
54 
55 bool Mips16RegisterInfo::useFPForScavengingIndex
56   (const MachineFunction &MF) const {
57   return false;
58 }
59 
60 bool Mips16RegisterInfo::saveScavengerRegister
61   (MachineBasicBlock &MBB,
62    MachineBasicBlock::iterator I,
63    MachineBasicBlock::iterator &UseMI,
64    const TargetRegisterClass *RC,
65    unsigned Reg) const {
66   DebugLoc DL;
67   const TargetInstrInfo &TII = *MBB.getParent()->getTarget().getInstrInfo();
68   TII.copyPhysReg(MBB, I, DL, Mips::T0, Reg, true);
69   TII.copyPhysReg(MBB, UseMI, DL, Reg, Mips::T0, true);
70   return true;
71 }
72 
73 const TargetRegisterClass *
74 Mips16RegisterInfo::intRegClass(unsigned Size) const {
75   assert(Size == 4);
76   return &Mips::CPU16RegsRegClass;
77 }
78 
79 void Mips16RegisterInfo::eliminateFI(MachineBasicBlock::iterator II,
80                                      unsigned OpNo, int FrameIndex,
81                                      uint64_t StackSize,
82                                      int64_t SPOffset) const {
83   MachineInstr &MI = *II;
84   MachineFunction &MF = *MI.getParent()->getParent();
85   MachineFrameInfo *MFI = MF.getFrameInfo();
86 
87   const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
88   int MinCSFI = 0;
89   int MaxCSFI = -1;
90 
91   if (CSI.size()) {
92     MinCSFI = CSI[0].getFrameIdx();
93     MaxCSFI = CSI[CSI.size() - 1].getFrameIdx();
94   }
95 
96   // The following stack frame objects are always
97   // referenced relative to $sp:
98   //  1. Outgoing arguments.
99   //  2. Pointer to dynamically allocated stack space.
100   //  3. Locations for callee-saved registers.
101   // Everything else is referenced relative to whatever register
102   // getFrameRegister() returns.
103   unsigned FrameReg;
104 
105   if (FrameIndex >= MinCSFI && FrameIndex <= MaxCSFI)
106     FrameReg = Mips::SP;
107   else {
108     const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
109     if (TFI->hasFP(MF)) {
110       FrameReg = Mips::S0;
111     }
112     else {
113       if ((MI.getNumOperands()> OpNo+2) && MI.getOperand(OpNo+2).isReg())
114         FrameReg = MI.getOperand(OpNo+2).getReg();
115       else
116         FrameReg = Mips::SP;
117     }
118   }
119   // Calculate final offset.
120   // - There is no need to change the offset if the frame object
121   //   is one of the
122   //   following: an outgoing argument, pointer to a dynamically allocated
123   //   stack space or a $gp restore location,
124   // - If the frame object is any of the following,
125   //   its offset must be adjusted
126   //   by adding the size of the stack:
127   //   incoming argument, callee-saved register location or local variable.
128   int64_t Offset;
129   bool IsKill = false;
130   Offset = SPOffset + (int64_t)StackSize;
131   Offset += MI.getOperand(OpNo + 1).getImm();
132 
133 
134   DEBUG(errs() << "Offset     : " << Offset << "\n" << "<--------->\n");
135 
136   if (!MI.isDebugValue() &&
137       !Mips16InstrInfo::validImmediate(MI.getOpcode(), FrameReg, Offset)) {
138     MachineBasicBlock &MBB = *MI.getParent();
139     DebugLoc DL = II->getDebugLoc();
140     unsigned NewImm;
141     const Mips16InstrInfo &TII =
142       *static_cast<const Mips16InstrInfo*>(
143         MBB.getParent()->getTarget().getInstrInfo());
144     FrameReg = TII.loadImmediate(FrameReg, Offset, MBB, II, DL, NewImm);
145     Offset = SignExtend64<16>(NewImm);
146     IsKill = true;
147   }
148   MI.getOperand(OpNo).ChangeToRegister(FrameReg, false, false, IsKill);
149   MI.getOperand(OpNo + 1).ChangeToImmediate(Offset);
150 
151 
152 }
153