1 //===- Mips16FrameLowering.cpp - Mips16 Frame Information -----------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the Mips16 implementation of TargetFrameLowering class.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "Mips16FrameLowering.h"
15 #include "MCTargetDesc/MipsBaseInfo.h"
16 #include "Mips16InstrInfo.h"
17 #include "MipsInstrInfo.h"
18 #include "MipsRegisterInfo.h"
19 #include "MipsSubtarget.h"
20 #include "llvm/ADT/BitVector.h"
21 #include "llvm/CodeGen/MachineBasicBlock.h"
22 #include "llvm/CodeGen/MachineFrameInfo.h"
23 #include "llvm/CodeGen/MachineFunction.h"
24 #include "llvm/CodeGen/MachineInstr.h"
25 #include "llvm/CodeGen/MachineInstrBuilder.h"
26 #include "llvm/CodeGen/MachineModuleInfo.h"
27 #include "llvm/IR/DebugLoc.h"
28 #include "llvm/MC/MCContext.h"
29 #include "llvm/MC/MCDwarf.h"
30 #include "llvm/MC/MCRegisterInfo.h"
31 #include "llvm/MC/MachineLocation.h"
32 #include "llvm/Support/MathExtras.h"
33 #include "llvm/CodeGen/TargetFrameLowering.h"
34 #include <cassert>
35 #include <cstdint>
36 #include <vector>
37 
38 using namespace llvm;
39 
40 Mips16FrameLowering::Mips16FrameLowering(const MipsSubtarget &STI)
41     : MipsFrameLowering(STI, STI.getStackAlignment()) {}
42 
43 void Mips16FrameLowering::emitPrologue(MachineFunction &MF,
44                                        MachineBasicBlock &MBB) const {
45   assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported");
46   MachineFrameInfo &MFI = MF.getFrameInfo();
47   const Mips16InstrInfo &TII =
48       *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo());
49   MachineBasicBlock::iterator MBBI = MBB.begin();
50 
51   // Debug location must be unknown since the first debug location is used
52   // to determine the end of the prologue.
53   DebugLoc dl;
54 
55   uint64_t StackSize = MFI.getStackSize();
56 
57   // No need to allocate space on the stack.
58   if (StackSize == 0 && !MFI.adjustsStack()) return;
59 
60   MachineModuleInfo &MMI = MF.getMMI();
61   const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
62 
63   // Adjust stack.
64   TII.makeFrame(Mips::SP, StackSize, MBB, MBBI);
65 
66   // emit ".cfi_def_cfa_offset StackSize"
67   unsigned CFIIndex = MF.addFrameInst(
68       MCCFIInstruction::createDefCfaOffset(nullptr, -StackSize));
69   BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
70       .addCFIIndex(CFIIndex);
71 
72   const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
73 
74   if (!CSI.empty()) {
75     const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
76 
77     for (std::vector<CalleeSavedInfo>::const_iterator I = CSI.begin(),
78          E = CSI.end(); I != E; ++I) {
79       int64_t Offset = MFI.getObjectOffset(I->getFrameIdx());
80       unsigned Reg = I->getReg();
81       unsigned DReg = MRI->getDwarfRegNum(Reg, true);
82       unsigned CFIIndex = MF.addFrameInst(
83           MCCFIInstruction::createOffset(nullptr, DReg, Offset));
84       BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
85           .addCFIIndex(CFIIndex);
86     }
87   }
88   if (hasFP(MF))
89     BuildMI(MBB, MBBI, dl, TII.get(Mips::MoveR3216), Mips::S0)
90       .addReg(Mips::SP).setMIFlag(MachineInstr::FrameSetup);
91 }
92 
93 void Mips16FrameLowering::emitEpilogue(MachineFunction &MF,
94                                  MachineBasicBlock &MBB) const {
95   MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
96   MachineFrameInfo &MFI = MF.getFrameInfo();
97   const Mips16InstrInfo &TII =
98       *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo());
99   DebugLoc dl = MBBI->getDebugLoc();
100   uint64_t StackSize = MFI.getStackSize();
101 
102   if (!StackSize)
103     return;
104 
105   if (hasFP(MF))
106     BuildMI(MBB, MBBI, dl, TII.get(Mips::Move32R16), Mips::SP)
107       .addReg(Mips::S0);
108 
109   // Adjust stack.
110   // assumes stacksize multiple of 8
111   TII.restoreFrame(Mips::SP, StackSize, MBB, MBBI);
112 }
113 
114 bool Mips16FrameLowering::
115 spillCalleeSavedRegisters(MachineBasicBlock &MBB,
116                           MachineBasicBlock::iterator MI,
117                           const std::vector<CalleeSavedInfo> &CSI,
118                           const TargetRegisterInfo *TRI) const {
119   MachineFunction *MF = MBB.getParent();
120   MachineBasicBlock *EntryBlock = &MF->front();
121 
122   //
123   // Registers RA, S0,S1 are the callee saved registers and they
124   // will be saved with the "save" instruction
125   // during emitPrologue
126   //
127   for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
128     // Add the callee-saved register as live-in. Do not add if the register is
129     // RA and return address is taken, because it has already been added in
130     // method MipsTargetLowering::lowerRETURNADDR.
131     // It's killed at the spill, unless the register is RA and return address
132     // is taken.
133     unsigned Reg = CSI[i].getReg();
134     bool IsRAAndRetAddrIsTaken = (Reg == Mips::RA)
135       && MF->getFrameInfo().isReturnAddressTaken();
136     if (!IsRAAndRetAddrIsTaken)
137       EntryBlock->addLiveIn(Reg);
138   }
139 
140   return true;
141 }
142 
143 bool Mips16FrameLowering::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
144                                           MachineBasicBlock::iterator MI,
145                                        std::vector<CalleeSavedInfo> &CSI,
146                                        const TargetRegisterInfo *TRI) const {
147   //
148   // Registers RA,S0,S1 are the callee saved registers and they will be restored
149   // with the restore instruction during emitEpilogue.
150   // We need to override this virtual function, otherwise llvm will try and
151   // restore the registers on it's on from the stack.
152   //
153 
154   return true;
155 }
156 
157 bool
158 Mips16FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
159   const MachineFrameInfo &MFI = MF.getFrameInfo();
160   // Reserve call frame if the size of the maximum call frame fits into 15-bit
161   // immediate field and there are no variable sized objects on the stack.
162   return isInt<15>(MFI.getMaxCallFrameSize()) && !MFI.hasVarSizedObjects();
163 }
164 
165 void Mips16FrameLowering::determineCalleeSaves(MachineFunction &MF,
166                                                BitVector &SavedRegs,
167                                                RegScavenger *RS) const {
168   TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
169   const Mips16InstrInfo &TII =
170       *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo());
171   const MipsRegisterInfo &RI = TII.getRegisterInfo();
172   const BitVector Reserved = RI.getReservedRegs(MF);
173   bool SaveS2 = Reserved[Mips::S2];
174   if (SaveS2)
175     SavedRegs.set(Mips::S2);
176   if (hasFP(MF))
177     SavedRegs.set(Mips::S0);
178 }
179 
180 const MipsFrameLowering *
181 llvm::createMips16FrameLowering(const MipsSubtarget &ST) {
182   return new Mips16FrameLowering(ST);
183 }
184