1 //===- Mips16FrameLowering.cpp - Mips16 Frame Information -----------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains the Mips16 implementation of TargetFrameLowering class. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "Mips16FrameLowering.h" 15 #include "MCTargetDesc/MipsBaseInfo.h" 16 #include "Mips16InstrInfo.h" 17 #include "MipsInstrInfo.h" 18 #include "MipsRegisterInfo.h" 19 #include "MipsSubtarget.h" 20 #include "llvm/ADT/BitVector.h" 21 #include "llvm/CodeGen/MachineBasicBlock.h" 22 #include "llvm/CodeGen/MachineFrameInfo.h" 23 #include "llvm/CodeGen/MachineFunction.h" 24 #include "llvm/CodeGen/MachineInstr.h" 25 #include "llvm/CodeGen/MachineInstrBuilder.h" 26 #include "llvm/CodeGen/MachineModuleInfo.h" 27 #include "llvm/IR/DebugLoc.h" 28 #include "llvm/MC/MCContext.h" 29 #include "llvm/MC/MCDwarf.h" 30 #include "llvm/MC/MCRegisterInfo.h" 31 #include "llvm/MC/MachineLocation.h" 32 #include "llvm/Support/MathExtras.h" 33 #include "llvm/Target/TargetFrameLowering.h" 34 #include <cassert> 35 #include <cstdint> 36 #include <vector> 37 38 using namespace llvm; 39 40 Mips16FrameLowering::Mips16FrameLowering(const MipsSubtarget &STI) 41 : MipsFrameLowering(STI, STI.stackAlignment()) {} 42 43 void Mips16FrameLowering::emitPrologue(MachineFunction &MF, 44 MachineBasicBlock &MBB) const { 45 assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported"); 46 MachineFrameInfo &MFI = MF.getFrameInfo(); 47 const Mips16InstrInfo &TII = 48 *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo()); 49 MachineBasicBlock::iterator MBBI = MBB.begin(); 50 51 // Debug location must be unknown since the first debug location is used 52 // to determine the end of the prologue. 53 DebugLoc dl; 54 55 uint64_t StackSize = MFI.getStackSize(); 56 57 // No need to allocate space on the stack. 58 if (StackSize == 0 && !MFI.adjustsStack()) return; 59 60 MachineModuleInfo &MMI = MF.getMMI(); 61 const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo(); 62 MachineLocation DstML, SrcML; 63 64 // Adjust stack. 65 TII.makeFrame(Mips::SP, StackSize, MBB, MBBI); 66 67 // emit ".cfi_def_cfa_offset StackSize" 68 unsigned CFIIndex = MF.addFrameInst( 69 MCCFIInstruction::createDefCfaOffset(nullptr, -StackSize)); 70 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) 71 .addCFIIndex(CFIIndex); 72 73 const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo(); 74 75 if (!CSI.empty()) { 76 const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo(); 77 78 for (std::vector<CalleeSavedInfo>::const_iterator I = CSI.begin(), 79 E = CSI.end(); I != E; ++I) { 80 int64_t Offset = MFI.getObjectOffset(I->getFrameIdx()); 81 unsigned Reg = I->getReg(); 82 unsigned DReg = MRI->getDwarfRegNum(Reg, true); 83 unsigned CFIIndex = MF.addFrameInst( 84 MCCFIInstruction::createOffset(nullptr, DReg, Offset)); 85 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) 86 .addCFIIndex(CFIIndex); 87 } 88 } 89 if (hasFP(MF)) 90 BuildMI(MBB, MBBI, dl, TII.get(Mips::MoveR3216), Mips::S0) 91 .addReg(Mips::SP).setMIFlag(MachineInstr::FrameSetup); 92 } 93 94 void Mips16FrameLowering::emitEpilogue(MachineFunction &MF, 95 MachineBasicBlock &MBB) const { 96 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr(); 97 MachineFrameInfo &MFI = MF.getFrameInfo(); 98 const Mips16InstrInfo &TII = 99 *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo()); 100 DebugLoc dl = MBBI->getDebugLoc(); 101 uint64_t StackSize = MFI.getStackSize(); 102 103 if (!StackSize) 104 return; 105 106 if (hasFP(MF)) 107 BuildMI(MBB, MBBI, dl, TII.get(Mips::Move32R16), Mips::SP) 108 .addReg(Mips::S0); 109 110 // Adjust stack. 111 // assumes stacksize multiple of 8 112 TII.restoreFrame(Mips::SP, StackSize, MBB, MBBI); 113 } 114 115 bool Mips16FrameLowering:: 116 spillCalleeSavedRegisters(MachineBasicBlock &MBB, 117 MachineBasicBlock::iterator MI, 118 const std::vector<CalleeSavedInfo> &CSI, 119 const TargetRegisterInfo *TRI) const { 120 MachineFunction *MF = MBB.getParent(); 121 MachineBasicBlock *EntryBlock = &MF->front(); 122 123 // 124 // Registers RA, S0,S1 are the callee saved registers and they 125 // will be saved with the "save" instruction 126 // during emitPrologue 127 // 128 for (unsigned i = 0, e = CSI.size(); i != e; ++i) { 129 // Add the callee-saved register as live-in. Do not add if the register is 130 // RA and return address is taken, because it has already been added in 131 // method MipsTargetLowering::lowerRETURNADDR. 132 // It's killed at the spill, unless the register is RA and return address 133 // is taken. 134 unsigned Reg = CSI[i].getReg(); 135 bool IsRAAndRetAddrIsTaken = (Reg == Mips::RA) 136 && MF->getFrameInfo().isReturnAddressTaken(); 137 if (!IsRAAndRetAddrIsTaken) 138 EntryBlock->addLiveIn(Reg); 139 } 140 141 return true; 142 } 143 144 bool Mips16FrameLowering::restoreCalleeSavedRegisters(MachineBasicBlock &MBB, 145 MachineBasicBlock::iterator MI, 146 const std::vector<CalleeSavedInfo> &CSI, 147 const TargetRegisterInfo *TRI) const { 148 // 149 // Registers RA,S0,S1 are the callee saved registers and they will be restored 150 // with the restore instruction during emitEpilogue. 151 // We need to override this virtual function, otherwise llvm will try and 152 // restore the registers on it's on from the stack. 153 // 154 155 return true; 156 } 157 158 bool 159 Mips16FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const { 160 const MachineFrameInfo &MFI = MF.getFrameInfo(); 161 // Reserve call frame if the size of the maximum call frame fits into 15-bit 162 // immediate field and there are no variable sized objects on the stack. 163 return isInt<15>(MFI.getMaxCallFrameSize()) && !MFI.hasVarSizedObjects(); 164 } 165 166 void Mips16FrameLowering::determineCalleeSaves(MachineFunction &MF, 167 BitVector &SavedRegs, 168 RegScavenger *RS) const { 169 TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS); 170 const Mips16InstrInfo &TII = 171 *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo()); 172 const MipsRegisterInfo &RI = TII.getRegisterInfo(); 173 const BitVector Reserved = RI.getReservedRegs(MF); 174 bool SaveS2 = Reserved[Mips::S2]; 175 if (SaveS2) 176 SavedRegs.set(Mips::S2); 177 if (hasFP(MF)) 178 SavedRegs.set(Mips::S0); 179 } 180 181 const MipsFrameLowering * 182 llvm::createMips16FrameLowering(const MipsSubtarget &ST) { 183 return new Mips16FrameLowering(ST); 184 } 185