1 //===-- MipsASMBackend.cpp - ---------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements the MipsAsmBackend and MipsELFObjectWriter classes. 11 // 12 //===----------------------------------------------------------------------===// 13 // 14 15 #include "MipsFixupKinds.h" 16 #include "MCTargetDesc/MipsMCTargetDesc.h" 17 #include "llvm/ADT/Twine.h" 18 #include "llvm/MC/MCAsmBackend.h" 19 #include "llvm/MC/MCAssembler.h" 20 #include "llvm/MC/MCDirectives.h" 21 #include "llvm/MC/MCELFObjectWriter.h" 22 #include "llvm/MC/MCExpr.h" 23 #include "llvm/MC/MCMachObjectWriter.h" 24 #include "llvm/MC/MCObjectWriter.h" 25 #include "llvm/MC/MCSectionELF.h" 26 #include "llvm/MC/MCSectionMachO.h" 27 #include "llvm/MC/MCSubtargetInfo.h" 28 #include "llvm/Object/MachOFormat.h" 29 #include "llvm/Support/ELF.h" 30 #include "llvm/Support/ErrorHandling.h" 31 #include "llvm/Support/raw_ostream.h" 32 33 using namespace llvm; 34 35 // Prepare value for the target space for it 36 static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) { 37 38 // Add/subtract and shift 39 switch (Kind) { 40 default: 41 return 0; 42 case FK_GPRel_4: 43 case FK_Data_4: 44 case Mips::fixup_Mips_LO16: 45 break; 46 case Mips::fixup_Mips_PC16: 47 // So far we are only using this type for branches. 48 // For branches we start 1 instruction after the branch 49 // so the displacement will be one instruction size less. 50 Value -= 4; 51 // The displacement is then divided by 4 to give us an 18 bit 52 // address range. 53 Value >>= 2; 54 break; 55 case Mips::fixup_Mips_26: 56 // So far we are only using this type for jumps. 57 // The displacement is then divided by 4 to give us an 28 bit 58 // address range. 59 Value >>= 2; 60 break; 61 case Mips::fixup_Mips_HI16: 62 case Mips::fixup_Mips_GOT_Local: 63 // Get the higher 16-bits. Also add 1 if bit 15 is 1. 64 Value = (Value >> 16) + ((Value & 0x8000) != 0); 65 break; 66 } 67 68 return Value; 69 } 70 71 namespace { 72 class MipsAsmBackend : public MCAsmBackend { 73 public: 74 MipsAsmBackend(const Target &T) : MCAsmBackend() {} 75 76 /// ApplyFixup - Apply the \arg Value for given \arg Fixup into the provided 77 /// data fragment, at the offset specified by the fixup and following the 78 /// fixup kind as appropriate. 79 void ApplyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize, 80 uint64_t Value) const { 81 MCFixupKind Kind = Fixup.getKind(); 82 Value = adjustFixupValue((unsigned)Kind, Value); 83 84 if (!Value) 85 return; // Doesn't change encoding. 86 87 unsigned Offset = Fixup.getOffset(); 88 // FIXME: The below code will not work across endian models 89 // How many bytes/bits are we fixing up? 90 unsigned NumBytes = ((getFixupKindInfo(Kind).TargetSize-1)/8)+1; 91 uint64_t Mask = ((uint64_t)1 << getFixupKindInfo(Kind).TargetSize) - 1; 92 93 // Grab current value, if any, from bits. 94 uint64_t CurVal = 0; 95 for (unsigned i = 0; i != NumBytes; ++i) 96 CurVal |= ((uint8_t)Data[Offset + i]) << (i * 8); 97 98 CurVal = (CurVal & ~Mask) | ((CurVal + Value) & Mask); 99 100 // Write out the bytes back to the code/data bits. 101 // First the unaffected bits and then the fixup. 102 for (unsigned i = 0; i != NumBytes; ++i) { 103 Data[Offset + i] = uint8_t((CurVal >> (i * 8)) & 0xff); 104 } 105 } 106 107 unsigned getNumFixupKinds() const { return Mips::NumTargetFixupKinds; } 108 109 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const { 110 const static MCFixupKindInfo Infos[Mips::NumTargetFixupKinds] = { 111 // This table *must* be in same the order of fixup_* kinds in 112 // MipsFixupKinds.h. 113 // 114 // name offset bits flags 115 { "fixup_Mips_16", 0, 16, 0 }, 116 { "fixup_Mips_32", 0, 32, 0 }, 117 { "fixup_Mips_REL32", 0, 32, 0 }, 118 { "fixup_Mips_26", 0, 26, 0 }, 119 { "fixup_Mips_HI16", 0, 16, 0 }, 120 { "fixup_Mips_LO16", 0, 16, 0 }, 121 { "fixup_Mips_GPREL16", 0, 16, 0 }, 122 { "fixup_Mips_LITERAL", 0, 16, 0 }, 123 { "fixup_Mips_GOT_Global", 0, 16, 0 }, 124 { "fixup_Mips_GOT_Local", 0, 16, 0 }, 125 { "fixup_Mips_PC16", 0, 16, MCFixupKindInfo::FKF_IsPCRel }, 126 { "fixup_Mips_CALL16", 0, 16, 0 }, 127 { "fixup_Mips_GPREL32", 0, 32, 0 }, 128 { "fixup_Mips_SHIFT5", 6, 5, 0 }, 129 { "fixup_Mips_SHIFT6", 6, 5, 0 }, 130 { "fixup_Mips_64", 0, 64, 0 }, 131 { "fixup_Mips_TLSGD", 0, 16, 0 }, 132 { "fixup_Mips_GOTTPREL", 0, 16, 0 }, 133 { "fixup_Mips_TPREL_HI", 0, 16, 0 }, 134 { "fixup_Mips_TPREL_LO", 0, 16, 0 }, 135 { "fixup_Mips_TLSLDM", 0, 16, 0 }, 136 { "fixup_Mips_DTPREL_HI", 0, 16, 0 }, 137 { "fixup_Mips_DTPREL_LO", 0, 16, 0 }, 138 { "fixup_Mips_Branch_PCRel", 0, 16, MCFixupKindInfo::FKF_IsPCRel } 139 }; 140 141 if (Kind < FirstTargetFixupKind) 142 return MCAsmBackend::getFixupKindInfo(Kind); 143 144 assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() && 145 "Invalid kind!"); 146 return Infos[Kind - FirstTargetFixupKind]; 147 } 148 149 /// @name Target Relaxation Interfaces 150 /// @{ 151 152 /// MayNeedRelaxation - Check whether the given instruction may need 153 /// relaxation. 154 /// 155 /// \param Inst - The instruction to test. 156 bool MayNeedRelaxation(const MCInst &Inst) const { 157 return false; 158 } 159 160 /// fixupNeedsRelaxation - Target specific predicate for whether a given 161 /// fixup requires the associated instruction to be relaxed. 162 bool fixupNeedsRelaxation(const MCFixup &Fixup, 163 uint64_t Value, 164 const MCInstFragment *DF, 165 const MCAsmLayout &Layout) const { 166 // FIXME. 167 assert(0 && "RelaxInstruction() unimplemented"); 168 return false; 169 } 170 171 /// RelaxInstruction - Relax the instruction in the given fragment 172 /// to the next wider instruction. 173 /// 174 /// \param Inst - The instruction to relax, which may be the same 175 /// as the output. 176 /// \parm Res [output] - On return, the relaxed instruction. 177 void RelaxInstruction(const MCInst &Inst, MCInst &Res) const { 178 } 179 180 /// @} 181 182 /// WriteNopData - Write an (optimal) nop sequence of Count bytes 183 /// to the given output. If the target cannot generate such a sequence, 184 /// it should return an error. 185 /// 186 /// \return - True on success. 187 bool WriteNopData(uint64_t Count, MCObjectWriter *OW) const { 188 return true; 189 } 190 }; 191 192 class MipsEB_AsmBackend : public MipsAsmBackend { 193 public: 194 uint8_t OSABI; 195 196 MipsEB_AsmBackend(const Target &T, uint8_t _OSABI) 197 : MipsAsmBackend(T), OSABI(_OSABI) {} 198 199 MCObjectWriter *createObjectWriter(raw_ostream &OS) const { 200 return createMipsELFObjectWriter(OS, /*IsLittleEndian*/ false, OSABI); 201 } 202 }; 203 204 class MipsEL_AsmBackend : public MipsAsmBackend { 205 public: 206 uint8_t OSABI; 207 208 MipsEL_AsmBackend(const Target &T, uint8_t _OSABI) 209 : MipsAsmBackend(T), OSABI(_OSABI) {} 210 211 MCObjectWriter *createObjectWriter(raw_ostream &OS) const { 212 return createMipsELFObjectWriter(OS, /*IsLittleEndian*/ true, OSABI); 213 } 214 }; 215 } // namespace 216 217 MCAsmBackend *llvm::createMipsAsmBackend(const Target &T, StringRef TT) { 218 Triple TheTriple(TT); 219 220 // just return little endian for now 221 // 222 uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(Triple(TT).getOS()); 223 return new MipsEL_AsmBackend(T, OSABI); 224 } 225