1 //===-- LanaiTargetMachine.cpp - Define TargetMachine for Lanai ---------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // Implements the info about Lanai target spec.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "LanaiTargetMachine.h"
15 
16 #include "Lanai.h"
17 #include "LanaiTargetObjectFile.h"
18 #include "LanaiTargetTransformInfo.h"
19 #include "llvm/Analysis/TargetTransformInfo.h"
20 #include "llvm/CodeGen/Passes.h"
21 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
22 #include "llvm/CodeGen/TargetPassConfig.h"
23 #include "llvm/Support/FormattedStream.h"
24 #include "llvm/Support/TargetRegistry.h"
25 #include "llvm/Target/TargetOptions.h"
26 
27 using namespace llvm;
28 
29 namespace llvm {
30 void initializeLanaiMemAluCombinerPass(PassRegistry &);
31 } // namespace llvm
32 
33 extern "C" void LLVMInitializeLanaiTarget() {
34   // Register the target.
35   RegisterTargetMachine<LanaiTargetMachine> registered_target(
36       getTheLanaiTarget());
37 }
38 
39 static std::string computeDataLayout() {
40   // Data layout (keep in sync with clang/lib/Basic/Targets.cpp)
41   return "E"        // Big endian
42          "-m:e"     // ELF name manging
43          "-p:32:32" // 32-bit pointers, 32 bit aligned
44          "-i64:64"  // 64 bit integers, 64 bit aligned
45          "-a:0:32"  // 32 bit alignment of objects of aggregate type
46          "-n32"     // 32 bit native integer width
47          "-S64";    // 64 bit natural stack alignment
48 }
49 
50 static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) {
51   if (!RM.hasValue())
52     return Reloc::PIC_;
53   return *RM;
54 }
55 
56 static CodeModel::Model getEffectiveCodeModel(Optional<CodeModel::Model> CM) {
57   if (CM)
58     return *CM;
59   return CodeModel::Medium;
60 }
61 
62 LanaiTargetMachine::LanaiTargetMachine(const Target &T, const Triple &TT,
63                                        StringRef Cpu, StringRef FeatureString,
64                                        const TargetOptions &Options,
65                                        Optional<Reloc::Model> RM,
66                                        Optional<CodeModel::Model> CodeModel,
67                                        CodeGenOpt::Level OptLevel, bool JIT)
68     : LLVMTargetMachine(T, computeDataLayout(), TT, Cpu, FeatureString, Options,
69                         getEffectiveRelocModel(RM),
70                         getEffectiveCodeModel(CodeModel), OptLevel),
71       Subtarget(TT, Cpu, FeatureString, *this, Options, getCodeModel(),
72                 OptLevel),
73       TLOF(new LanaiTargetObjectFile()) {
74   initAsmInfo();
75 }
76 
77 TargetTransformInfo
78 LanaiTargetMachine::getTargetTransformInfo(const Function &F) {
79   return TargetTransformInfo(LanaiTTIImpl(this, F));
80 }
81 
82 namespace {
83 // Lanai Code Generator Pass Configuration Options.
84 class LanaiPassConfig : public TargetPassConfig {
85 public:
86   LanaiPassConfig(LanaiTargetMachine &TM, PassManagerBase *PassManager)
87       : TargetPassConfig(TM, *PassManager) {}
88 
89   LanaiTargetMachine &getLanaiTargetMachine() const {
90     return getTM<LanaiTargetMachine>();
91   }
92 
93   bool addInstSelector() override;
94   void addPreSched2() override;
95   void addPreEmitPass() override;
96 };
97 } // namespace
98 
99 TargetPassConfig *
100 LanaiTargetMachine::createPassConfig(PassManagerBase &PassManager) {
101   return new LanaiPassConfig(*this, &PassManager);
102 }
103 
104 // Install an instruction selector pass.
105 bool LanaiPassConfig::addInstSelector() {
106   addPass(createLanaiISelDag(getLanaiTargetMachine()));
107   return false;
108 }
109 
110 // Implemented by targets that want to run passes immediately before
111 // machine code is emitted.
112 void LanaiPassConfig::addPreEmitPass() {
113   addPass(createLanaiDelaySlotFillerPass(getLanaiTargetMachine()));
114 }
115 
116 // Run passes after prolog-epilog insertion and before the second instruction
117 // scheduling pass.
118 void LanaiPassConfig::addPreSched2() {
119   addPass(createLanaiMemAluCombinerPass());
120 }
121