1 //===-- LanaiTargetMachine.cpp - Define TargetMachine for Lanai ---------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // Implements the info about Lanai target spec.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "LanaiTargetMachine.h"
15 
16 #include "Lanai.h"
17 #include "LanaiTargetObjectFile.h"
18 #include "LanaiTargetTransformInfo.h"
19 #include "llvm/Analysis/TargetTransformInfo.h"
20 #include "llvm/CodeGen/Passes.h"
21 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
22 #include "llvm/CodeGen/TargetPassConfig.h"
23 #include "llvm/Support/FormattedStream.h"
24 #include "llvm/Support/TargetRegistry.h"
25 #include "llvm/Target/TargetOptions.h"
26 
27 using namespace llvm;
28 
29 namespace llvm {
30 void initializeLanaiMemAluCombinerPass(PassRegistry &);
31 void initializeLanaiSetflagAluCombinerPass(PassRegistry &);
32 } // namespace llvm
33 
34 extern "C" void LLVMInitializeLanaiTarget() {
35   // Register the target.
36   RegisterTargetMachine<LanaiTargetMachine> registered_target(TheLanaiTarget);
37 }
38 
39 static std::string computeDataLayout(const Triple &TT) {
40   // Data layout (keep in sync with clang/lib/Basic/Targets.cpp)
41   return "E"        // Big endian
42          "-m:e"     // ELF name manging
43          "-p:32:32" // 32-bit pointers, 32 bit aligned
44          "-i64:64"  // 64 bit integers, 64 bit aligned
45          "-a:0:32"  // 32 bit alignment of objects of aggregate type
46          "-n32"     // 32 bit native integer width
47          "-S64";    // 64 bit natural stack alignment
48 }
49 
50 static Reloc::Model getEffectiveRelocModel(const Triple &TT,
51                                            Optional<Reloc::Model> RM) {
52   if (!RM.hasValue())
53     return Reloc::PIC_;
54   return *RM;
55 }
56 
57 LanaiTargetMachine::LanaiTargetMachine(const Target &T, const Triple &TT,
58                                        StringRef Cpu, StringRef FeatureString,
59                                        const TargetOptions &Options,
60                                        Optional<Reloc::Model> RM,
61                                        CodeModel::Model CodeModel,
62                                        CodeGenOpt::Level OptLevel)
63     : LLVMTargetMachine(T, computeDataLayout(TargetTriple), TT, Cpu,
64                         FeatureString, Options, getEffectiveRelocModel(TT, RM),
65                         CodeModel, OptLevel),
66       Subtarget(TT, Cpu, FeatureString, *this, Options, CodeModel, OptLevel),
67       TLOF(new LanaiTargetObjectFile()) {
68   initAsmInfo();
69 }
70 
71 TargetIRAnalysis LanaiTargetMachine::getTargetIRAnalysis() {
72   return TargetIRAnalysis([this](const Function &F) {
73     return TargetTransformInfo(LanaiTTIImpl(this, F));
74   });
75 }
76 
77 namespace {
78 // Lanai Code Generator Pass Configuration Options.
79 class LanaiPassConfig : public TargetPassConfig {
80 public:
81   LanaiPassConfig(LanaiTargetMachine *TM, PassManagerBase *PassManager)
82       : TargetPassConfig(TM, *PassManager) {}
83 
84   LanaiTargetMachine &getLanaiTargetMachine() const {
85     return getTM<LanaiTargetMachine>();
86   }
87 
88   bool addInstSelector() override;
89   void addPreSched2() override;
90   void addPreEmitPass() override;
91 };
92 } // namespace
93 
94 TargetPassConfig *
95 LanaiTargetMachine::createPassConfig(PassManagerBase &PassManager) {
96   return new LanaiPassConfig(this, &PassManager);
97 }
98 
99 // Install an instruction selector pass.
100 bool LanaiPassConfig::addInstSelector() {
101   addPass(createLanaiISelDag(getLanaiTargetMachine()));
102   return false;
103 }
104 
105 // Implemented by targets that want to run passes immediately before
106 // machine code is emitted.
107 void LanaiPassConfig::addPreEmitPass() {
108   addPass(createLanaiDelaySlotFillerPass(getLanaiTargetMachine()));
109 }
110 
111 // Run passes after prolog-epilog insertion and before the second instruction
112 // scheduling pass.
113 void LanaiPassConfig::addPreSched2() {
114   addPass(createLanaiMemAluCombinerPass());
115   addPass(createLanaiSetflagAluCombinerPass());
116 }
117