1 //===- HexagonMCInstrInfo.cpp - Hexagon sub-class of MCInst ---------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This class extends MCInstrInfo to allow Hexagon specific MCInstr queries
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "HexagonMCInstrInfo.h"
15 
16 #include "Hexagon.h"
17 #include "HexagonBaseInfo.h"
18 #include "HexagonMCChecker.h"
19 
20 #include "llvm/MC/MCContext.h"
21 #include "llvm/MC/MCExpr.h"
22 #include "llvm/MC/MCInstrInfo.h"
23 #include "llvm/MC/MCSubtargetInfo.h"
24 
25 namespace llvm {
26 void HexagonMCInstrInfo::addConstant(MCInst &MI, uint64_t Value,
27                                      MCContext &Context) {
28   MI.addOperand(MCOperand::createExpr(MCConstantExpr::create(Value, Context)));
29 }
30 
31 void HexagonMCInstrInfo::addConstExtender(MCContext &Context,
32                                           MCInstrInfo const &MCII, MCInst &MCB,
33                                           MCInst const &MCI) {
34   assert(HexagonMCInstrInfo::isBundle(MCB));
35   MCOperand const &exOp =
36       MCI.getOperand(HexagonMCInstrInfo::getExtendableOp(MCII, MCI));
37 
38   // Create the extender.
39   MCInst *XMCI =
40       new (Context) MCInst(HexagonMCInstrInfo::deriveExtender(MCII, MCI, exOp));
41 
42   MCB.addOperand(MCOperand::createInst(XMCI));
43 }
44 
45 iterator_range<MCInst::const_iterator>
46 HexagonMCInstrInfo::bundleInstructions(MCInst const &MCI) {
47   assert(isBundle(MCI));
48   return make_range(MCI.begin() + bundleInstructionsOffset, MCI.end());
49 }
50 
51 size_t HexagonMCInstrInfo::bundleSize(MCInst const &MCI) {
52   if (HexagonMCInstrInfo::isBundle(MCI))
53     return (MCI.size() - bundleInstructionsOffset);
54   else
55     return (1);
56 }
57 
58 bool HexagonMCInstrInfo::canonicalizePacket(MCInstrInfo const &MCII,
59                                             MCSubtargetInfo const &STI,
60                                             MCContext &Context, MCInst &MCB,
61                                             HexagonMCChecker *Check) {
62   // Examine the packet and convert pairs of instructions to compound
63   // instructions when possible.
64   if (!HexagonDisableCompound)
65     HexagonMCInstrInfo::tryCompound(MCII, Context, MCB);
66   // Check the bundle for errors.
67   bool CheckOk = Check ? Check->check() : true;
68   if (!CheckOk)
69     return false;
70   HexagonMCShuffle(MCII, STI, MCB);
71   // Examine the packet and convert pairs of instructions to duplex
72   // instructions when possible.
73   MCInst InstBundlePreDuplex = MCInst(MCB);
74   if (!HexagonDisableDuplex) {
75     SmallVector<DuplexCandidate, 8> possibleDuplexes;
76     possibleDuplexes = HexagonMCInstrInfo::getDuplexPossibilties(MCII, MCB);
77     HexagonMCShuffle(MCII, STI, Context, MCB, possibleDuplexes);
78   }
79   // Examines packet and pad the packet, if needed, when an
80   // end-loop is in the bundle.
81   HexagonMCInstrInfo::padEndloop(Context, MCB);
82   // If compounding and duplexing didn't reduce the size below
83   // 4 or less we have a packet that is too big.
84   if (HexagonMCInstrInfo::bundleSize(MCB) > HEXAGON_PACKET_SIZE)
85     return false;
86   HexagonMCShuffle(MCII, STI, MCB);
87   return true;
88 }
89 
90 void HexagonMCInstrInfo::clampExtended(MCInstrInfo const &MCII,
91                                        MCContext &Context, MCInst &MCI) {
92   assert(HexagonMCInstrInfo::isExtendable(MCII, MCI) ||
93          HexagonMCInstrInfo::isExtended(MCII, MCI));
94   MCOperand &exOp =
95       MCI.getOperand(HexagonMCInstrInfo::getExtendableOp(MCII, MCI));
96   // If the extended value is a constant, then use it for the extended and
97   // for the extender instructions, masking off the lower 6 bits and
98   // including the assumed bits.
99   int64_t Value;
100   if (exOp.getExpr()->evaluateAsAbsolute(Value)) {
101     unsigned Shift = HexagonMCInstrInfo::getExtentAlignment(MCII, MCI);
102     exOp.setExpr(HexagonMCExpr::create(
103         MCConstantExpr::create((Value & 0x3f) << Shift, Context), Context));
104   }
105 }
106 
107 MCInst HexagonMCInstrInfo::createBundle() {
108   MCInst Result;
109   Result.setOpcode(Hexagon::BUNDLE);
110   Result.addOperand(MCOperand::createImm(0));
111   return Result;
112 }
113 
114 MCInst *HexagonMCInstrInfo::deriveDuplex(MCContext &Context, unsigned iClass,
115                                          MCInst const &inst0,
116                                          MCInst const &inst1) {
117   assert((iClass <= 0xf) && "iClass must have range of 0 to 0xf");
118   MCInst *duplexInst = new (Context) MCInst;
119   duplexInst->setOpcode(Hexagon::DuplexIClass0 + iClass);
120 
121   MCInst *SubInst0 = new (Context) MCInst(deriveSubInst(inst0));
122   MCInst *SubInst1 = new (Context) MCInst(deriveSubInst(inst1));
123   duplexInst->addOperand(MCOperand::createInst(SubInst0));
124   duplexInst->addOperand(MCOperand::createInst(SubInst1));
125   return duplexInst;
126 }
127 
128 MCInst HexagonMCInstrInfo::deriveExtender(MCInstrInfo const &MCII,
129                                           MCInst const &Inst,
130                                           MCOperand const &MO) {
131   assert(HexagonMCInstrInfo::isExtendable(MCII, Inst) ||
132          HexagonMCInstrInfo::isExtended(MCII, Inst));
133 
134   MCInstrDesc const &Desc = HexagonMCInstrInfo::getDesc(MCII, Inst);
135   MCInst XMI;
136   XMI.setOpcode((Desc.isBranch() || Desc.isCall() ||
137                  HexagonMCInstrInfo::getType(MCII, Inst) == HexagonII::TypeCR)
138                     ? Hexagon::A4_ext_b
139                     : Hexagon::A4_ext);
140   if (MO.isImm())
141     XMI.addOperand(MCOperand::createImm(MO.getImm() & (~0x3f)));
142   else if (MO.isExpr())
143     XMI.addOperand(MCOperand::createExpr(MO.getExpr()));
144   else
145     llvm_unreachable("invalid extendable operand");
146   return XMI;
147 }
148 
149 MCInst const *HexagonMCInstrInfo::extenderForIndex(MCInst const &MCB,
150                                                    size_t Index) {
151   assert(Index <= bundleSize(MCB));
152   if (Index == 0)
153     return nullptr;
154   MCInst const *Inst =
155       MCB.getOperand(Index + bundleInstructionsOffset - 1).getInst();
156   if (isImmext(*Inst))
157     return Inst;
158   return nullptr;
159 }
160 
161 void HexagonMCInstrInfo::extendIfNeeded(MCContext &Context,
162                                         MCInstrInfo const &MCII, MCInst &MCB,
163                                         MCInst const &MCI, bool MustExtend) {
164   if (isConstExtended(MCII, MCI) || MustExtend)
165     addConstExtender(Context, MCII, MCB, MCI);
166 }
167 
168 HexagonII::MemAccessSize
169 HexagonMCInstrInfo::getAccessSize(MCInstrInfo const &MCII, MCInst const &MCI) {
170   const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
171 
172   return (HexagonII::MemAccessSize((F >> HexagonII::MemAccessSizePos) &
173                                    HexagonII::MemAccesSizeMask));
174 }
175 
176 unsigned HexagonMCInstrInfo::getBitCount(MCInstrInfo const &MCII,
177                                          MCInst const &MCI) {
178   uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
179   return ((F >> HexagonII::ExtentBitsPos) & HexagonII::ExtentBitsMask);
180 }
181 
182 // Return constant extended operand number.
183 unsigned short HexagonMCInstrInfo::getCExtOpNum(MCInstrInfo const &MCII,
184                                                 MCInst const &MCI) {
185   const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
186   return ((F >> HexagonII::ExtendableOpPos) & HexagonII::ExtendableOpMask);
187 }
188 
189 MCInstrDesc const &HexagonMCInstrInfo::getDesc(MCInstrInfo const &MCII,
190                                                MCInst const &MCI) {
191   return (MCII.get(MCI.getOpcode()));
192 }
193 
194 MCExpr const &HexagonMCInstrInfo::getExpr(MCExpr const &Expr) {
195   const auto &HExpr = cast<HexagonMCExpr>(Expr);
196   assert(HExpr.getExpr());
197   return *HExpr.getExpr();
198 }
199 
200 unsigned short HexagonMCInstrInfo::getExtendableOp(MCInstrInfo const &MCII,
201                                                    MCInst const &MCI) {
202   const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
203   return ((F >> HexagonII::ExtendableOpPos) & HexagonII::ExtendableOpMask);
204 }
205 
206 MCOperand const &
207 HexagonMCInstrInfo::getExtendableOperand(MCInstrInfo const &MCII,
208                                          MCInst const &MCI) {
209   unsigned O = HexagonMCInstrInfo::getExtendableOp(MCII, MCI);
210   MCOperand const &MO = MCI.getOperand(O);
211 
212   assert((HexagonMCInstrInfo::isExtendable(MCII, MCI) ||
213           HexagonMCInstrInfo::isExtended(MCII, MCI)) &&
214          (MO.isImm() || MO.isExpr()));
215   return (MO);
216 }
217 
218 unsigned HexagonMCInstrInfo::getExtentAlignment(MCInstrInfo const &MCII,
219                                                 MCInst const &MCI) {
220   const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
221   return ((F >> HexagonII::ExtentAlignPos) & HexagonII::ExtentAlignMask);
222 }
223 
224 unsigned HexagonMCInstrInfo::getExtentBits(MCInstrInfo const &MCII,
225                                            MCInst const &MCI) {
226   const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
227   return ((F >> HexagonII::ExtentBitsPos) & HexagonII::ExtentBitsMask);
228 }
229 
230 // Return the max value that a constant extendable operand can have
231 // without being extended.
232 int HexagonMCInstrInfo::getMaxValue(MCInstrInfo const &MCII,
233                                     MCInst const &MCI) {
234   uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
235   unsigned isSigned =
236       (F >> HexagonII::ExtentSignedPos) & HexagonII::ExtentSignedMask;
237   unsigned bits = (F >> HexagonII::ExtentBitsPos) & HexagonII::ExtentBitsMask;
238 
239   if (isSigned) // if value is signed
240     return ~(-1U << (bits - 1));
241   else
242     return ~(-1U << bits);
243 }
244 
245 // Return the min value that a constant extendable operand can have
246 // without being extended.
247 int HexagonMCInstrInfo::getMinValue(MCInstrInfo const &MCII,
248                                     MCInst const &MCI) {
249   uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
250   unsigned isSigned =
251       (F >> HexagonII::ExtentSignedPos) & HexagonII::ExtentSignedMask;
252   unsigned bits = (F >> HexagonII::ExtentBitsPos) & HexagonII::ExtentBitsMask;
253 
254   if (isSigned) // if value is signed
255     return -1U << (bits - 1);
256   else
257     return 0;
258 }
259 
260 char const *HexagonMCInstrInfo::getName(MCInstrInfo const &MCII,
261                                         MCInst const &MCI) {
262   return MCII.getName(MCI.getOpcode());
263 }
264 
265 unsigned short HexagonMCInstrInfo::getNewValueOp(MCInstrInfo const &MCII,
266                                                  MCInst const &MCI) {
267   const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
268   return ((F >> HexagonII::NewValueOpPos) & HexagonII::NewValueOpMask);
269 }
270 
271 MCOperand const &HexagonMCInstrInfo::getNewValueOperand(MCInstrInfo const &MCII,
272                                                         MCInst const &MCI) {
273   uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
274   unsigned const O =
275       (F >> HexagonII::NewValueOpPos) & HexagonII::NewValueOpMask;
276   MCOperand const &MCO = MCI.getOperand(O);
277 
278   assert((HexagonMCInstrInfo::isNewValue(MCII, MCI) ||
279           HexagonMCInstrInfo::hasNewValue(MCII, MCI)) &&
280          MCO.isReg());
281   return (MCO);
282 }
283 
284 /// Return the new value or the newly produced value.
285 unsigned short HexagonMCInstrInfo::getNewValueOp2(MCInstrInfo const &MCII,
286                                                   MCInst const &MCI) {
287   const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
288   return ((F >> HexagonII::NewValueOpPos2) & HexagonII::NewValueOpMask2);
289 }
290 
291 MCOperand const &
292 HexagonMCInstrInfo::getNewValueOperand2(MCInstrInfo const &MCII,
293                                         MCInst const &MCI) {
294   unsigned O = HexagonMCInstrInfo::getNewValueOp2(MCII, MCI);
295   MCOperand const &MCO = MCI.getOperand(O);
296 
297   assert((HexagonMCInstrInfo::isNewValue(MCII, MCI) ||
298           HexagonMCInstrInfo::hasNewValue2(MCII, MCI)) &&
299          MCO.isReg());
300   return (MCO);
301 }
302 
303 int HexagonMCInstrInfo::getSubTarget(MCInstrInfo const &MCII,
304                                      MCInst const &MCI) {
305   const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
306 
307   HexagonII::SubTarget Target = static_cast<HexagonII::SubTarget>(
308       (F >> HexagonII::validSubTargetPos) & HexagonII::validSubTargetMask);
309 
310   switch (Target) {
311   default:
312     return Hexagon::ArchV4;
313   case HexagonII::HasV5SubT:
314     return Hexagon::ArchV5;
315   }
316 }
317 
318 // Return the Hexagon ISA class for the insn.
319 unsigned HexagonMCInstrInfo::getType(MCInstrInfo const &MCII,
320                                      MCInst const &MCI) {
321   const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
322 
323   return ((F >> HexagonII::TypePos) & HexagonII::TypeMask);
324 }
325 
326 unsigned HexagonMCInstrInfo::getUnits(MCInstrInfo const &MCII,
327                                       MCSubtargetInfo const &STI,
328                                       MCInst const &MCI) {
329 
330   const InstrItinerary *II = STI.getSchedModel().InstrItineraries;
331   int SchedClass = HexagonMCInstrInfo::getDesc(MCII, MCI).getSchedClass();
332   return ((II[SchedClass].FirstStage + HexagonStages)->getUnits());
333 }
334 
335 bool HexagonMCInstrInfo::hasImmExt(MCInst const &MCI) {
336   if (!HexagonMCInstrInfo::isBundle(MCI))
337     return false;
338 
339   for (const auto &I : HexagonMCInstrInfo::bundleInstructions(MCI)) {
340     auto MI = I.getInst();
341     if (isImmext(*MI))
342       return true;
343   }
344 
345   return false;
346 }
347 
348 bool HexagonMCInstrInfo::hasExtenderForIndex(MCInst const &MCB, size_t Index) {
349   return extenderForIndex(MCB, Index) != nullptr;
350 }
351 
352 // Return whether the instruction is a legal new-value producer.
353 bool HexagonMCInstrInfo::hasNewValue(MCInstrInfo const &MCII,
354                                      MCInst const &MCI) {
355   const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
356   return ((F >> HexagonII::hasNewValuePos) & HexagonII::hasNewValueMask);
357 }
358 
359 /// Return whether the insn produces a second value.
360 bool HexagonMCInstrInfo::hasNewValue2(MCInstrInfo const &MCII,
361                                       MCInst const &MCI) {
362   const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
363   return ((F >> HexagonII::hasNewValuePos2) & HexagonII::hasNewValueMask2);
364 }
365 
366 MCInst const &HexagonMCInstrInfo::instruction(MCInst const &MCB, size_t Index) {
367   assert(isBundle(MCB));
368   assert(Index < HEXAGON_PACKET_SIZE);
369   return *MCB.getOperand(bundleInstructionsOffset + Index).getInst();
370 }
371 
372 bool HexagonMCInstrInfo::isBundle(MCInst const &MCI) {
373   auto Result = Hexagon::BUNDLE == MCI.getOpcode();
374   assert(!Result || (MCI.size() > 0 && MCI.getOperand(0).isImm()));
375   return Result;
376 }
377 
378 // Return whether the insn is an actual insn.
379 bool HexagonMCInstrInfo::isCanon(MCInstrInfo const &MCII, MCInst const &MCI) {
380   return (!HexagonMCInstrInfo::getDesc(MCII, MCI).isPseudo() &&
381           !HexagonMCInstrInfo::isPrefix(MCII, MCI) &&
382           HexagonMCInstrInfo::getType(MCII, MCI) != HexagonII::TypeENDLOOP);
383 }
384 
385 bool HexagonMCInstrInfo::isCompound(MCInstrInfo const &MCII,
386                                     MCInst const &MCI) {
387   return (getType(MCII, MCI) == HexagonII::TypeCOMPOUND);
388 }
389 
390 bool HexagonMCInstrInfo::isDblRegForSubInst(unsigned Reg) {
391   return ((Reg >= Hexagon::D0 && Reg <= Hexagon::D3) ||
392           (Reg >= Hexagon::D8 && Reg <= Hexagon::D11));
393 }
394 
395 bool HexagonMCInstrInfo::isDuplex(MCInstrInfo const &MCII, MCInst const &MCI) {
396   return HexagonII::TypeDUPLEX == HexagonMCInstrInfo::getType(MCII, MCI);
397 }
398 
399 // Return whether the instruction needs to be constant extended.
400 // 1) Always return true if the instruction has 'isExtended' flag set.
401 //
402 // isExtendable:
403 // 2) For immediate extended operands, return true only if the value is
404 //    out-of-range.
405 // 3) For global address, always return true.
406 
407 bool HexagonMCInstrInfo::isConstExtended(MCInstrInfo const &MCII,
408                                          MCInst const &MCI) {
409   if (HexagonMCInstrInfo::isExtended(MCII, MCI))
410     return true;
411   // Branch insns are handled as necessary by relaxation.
412   if ((HexagonMCInstrInfo::getType(MCII, MCI) == HexagonII::TypeJ) ||
413       (HexagonMCInstrInfo::getType(MCII, MCI) == HexagonII::TypeCOMPOUND &&
414        HexagonMCInstrInfo::getDesc(MCII, MCI).isBranch()) ||
415       (HexagonMCInstrInfo::getType(MCII, MCI) == HexagonII::TypeNV &&
416        HexagonMCInstrInfo::getDesc(MCII, MCI).isBranch()))
417     return false;
418   // Otherwise loop instructions and other CR insts are handled by relaxation
419   else if ((HexagonMCInstrInfo::getType(MCII, MCI) == HexagonII::TypeCR) &&
420            (MCI.getOpcode() != Hexagon::C4_addipc))
421     return false;
422   else if (!HexagonMCInstrInfo::isExtendable(MCII, MCI))
423     return false;
424 
425   MCOperand const &MO = HexagonMCInstrInfo::getExtendableOperand(MCII, MCI);
426 
427   // We could be using an instruction with an extendable immediate and shoehorn
428   // a global address into it. If it is a global address it will be constant
429   // extended. We do this for COMBINE.
430   // We currently only handle isGlobal() because it is the only kind of
431   // object we are going to end up with here for now.
432   // In the future we probably should add isSymbol(), etc.
433   assert(!MO.isImm());
434   if (isa<HexagonMCExpr>(MO.getExpr()) &&
435       HexagonMCInstrInfo::mustNotExtend(*MO.getExpr()))
436     return false;
437   int64_t Value;
438   if (!MO.getExpr()->evaluateAsAbsolute(Value))
439     return true;
440   int MinValue = HexagonMCInstrInfo::getMinValue(MCII, MCI);
441   int MaxValue = HexagonMCInstrInfo::getMaxValue(MCII, MCI);
442   return (MinValue > Value || Value > MaxValue);
443 }
444 
445 bool HexagonMCInstrInfo::isExtendable(MCInstrInfo const &MCII,
446                                       MCInst const &MCI) {
447   uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
448   return (F >> HexagonII::ExtendablePos) & HexagonII::ExtendableMask;
449 }
450 
451 bool HexagonMCInstrInfo::isExtended(MCInstrInfo const &MCII,
452                                     MCInst const &MCI) {
453   uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
454   return (F >> HexagonII::ExtendedPos) & HexagonII::ExtendedMask;
455 }
456 
457 bool HexagonMCInstrInfo::isFloat(MCInstrInfo const &MCII, MCInst const &MCI) {
458   const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
459   return ((F >> HexagonII::FPPos) & HexagonII::FPMask);
460 }
461 
462 bool HexagonMCInstrInfo::isImmext(MCInst const &MCI) {
463   auto Op = MCI.getOpcode();
464   return (Op == Hexagon::A4_ext_b || Op == Hexagon::A4_ext_c ||
465           Op == Hexagon::A4_ext_g || Op == Hexagon::A4_ext);
466 }
467 
468 bool HexagonMCInstrInfo::isInnerLoop(MCInst const &MCI) {
469   assert(isBundle(MCI));
470   int64_t Flags = MCI.getOperand(0).getImm();
471   return (Flags & innerLoopMask) != 0;
472 }
473 
474 bool HexagonMCInstrInfo::isIntReg(unsigned Reg) {
475   return (Reg >= Hexagon::R0 && Reg <= Hexagon::R31);
476 }
477 
478 bool HexagonMCInstrInfo::isIntRegForSubInst(unsigned Reg) {
479   return ((Reg >= Hexagon::R0 && Reg <= Hexagon::R7) ||
480           (Reg >= Hexagon::R16 && Reg <= Hexagon::R23));
481 }
482 
483 // Return whether the insn is a new-value consumer.
484 bool HexagonMCInstrInfo::isNewValue(MCInstrInfo const &MCII,
485                                     MCInst const &MCI) {
486   const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
487   return ((F >> HexagonII::NewValuePos) & HexagonII::NewValueMask);
488 }
489 
490 // Return whether the operand can be constant extended.
491 bool HexagonMCInstrInfo::isOperandExtended(MCInstrInfo const &MCII,
492                                            MCInst const &MCI,
493                                            unsigned short OperandNum) {
494   uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
495   return ((F >> HexagonII::ExtendableOpPos) & HexagonII::ExtendableOpMask) ==
496          OperandNum;
497 }
498 
499 bool HexagonMCInstrInfo::isOuterLoop(MCInst const &MCI) {
500   assert(isBundle(MCI));
501   int64_t Flags = MCI.getOperand(0).getImm();
502   return (Flags & outerLoopMask) != 0;
503 }
504 
505 bool HexagonMCInstrInfo::isPredicated(MCInstrInfo const &MCII,
506                                       MCInst const &MCI) {
507   const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
508   return ((F >> HexagonII::PredicatedPos) & HexagonII::PredicatedMask);
509 }
510 
511 bool HexagonMCInstrInfo::isPredicateLate(MCInstrInfo const &MCII,
512                                          MCInst const &MCI) {
513   const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
514   return (F >> HexagonII::PredicateLatePos & HexagonII::PredicateLateMask);
515 }
516 
517 /// Return whether the insn is newly predicated.
518 bool HexagonMCInstrInfo::isPredicatedNew(MCInstrInfo const &MCII,
519                                          MCInst const &MCI) {
520   const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
521   return ((F >> HexagonII::PredicatedNewPos) & HexagonII::PredicatedNewMask);
522 }
523 
524 bool HexagonMCInstrInfo::isPredicatedTrue(MCInstrInfo const &MCII,
525                                           MCInst const &MCI) {
526   const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
527   return (
528       !((F >> HexagonII::PredicatedFalsePos) & HexagonII::PredicatedFalseMask));
529 }
530 
531 bool HexagonMCInstrInfo::isPredReg(unsigned Reg) {
532   return (Reg >= Hexagon::P0 && Reg <= Hexagon::P3_0);
533 }
534 
535 bool HexagonMCInstrInfo::isPrefix(MCInstrInfo const &MCII, MCInst const &MCI) {
536   return (HexagonMCInstrInfo::getType(MCII, MCI) == HexagonII::TypePREFIX);
537 }
538 
539 bool HexagonMCInstrInfo::isSolo(MCInstrInfo const &MCII, MCInst const &MCI) {
540   const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
541   return ((F >> HexagonII::SoloPos) & HexagonII::SoloMask);
542 }
543 
544 bool HexagonMCInstrInfo::isMemReorderDisabled(MCInst const &MCI) {
545   assert(isBundle(MCI));
546   auto Flags = MCI.getOperand(0).getImm();
547   return (Flags & memReorderDisabledMask) != 0;
548 }
549 
550 bool HexagonMCInstrInfo::isMemStoreReorderEnabled(MCInst const &MCI) {
551   assert(isBundle(MCI));
552   auto Flags = MCI.getOperand(0).getImm();
553   return (Flags & memStoreReorderEnabledMask) != 0;
554 }
555 
556 bool HexagonMCInstrInfo::isSoloAX(MCInstrInfo const &MCII, MCInst const &MCI) {
557   const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
558   return ((F >> HexagonII::SoloAXPos) & HexagonII::SoloAXMask);
559 }
560 
561 bool HexagonMCInstrInfo::isSoloAin1(MCInstrInfo const &MCII,
562                                     MCInst const &MCI) {
563   const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
564   return ((F >> HexagonII::SoloAin1Pos) & HexagonII::SoloAin1Mask);
565 }
566 
567 bool HexagonMCInstrInfo::isVector(MCInstrInfo const &MCII, MCInst const &MCI) {
568   if ((getType(MCII, MCI) <= HexagonII::TypeCVI_LAST) &&
569       (getType(MCII, MCI) >= HexagonII::TypeCVI_FIRST))
570     return true;
571   return false;
572 }
573 
574 int64_t HexagonMCInstrInfo::minConstant(MCInst const &MCI, size_t Index) {
575   auto Sentinal = static_cast<int64_t>(std::numeric_limits<uint32_t>::max())
576                   << 8;
577   if (MCI.size() <= Index)
578     return Sentinal;
579   MCOperand const &MCO = MCI.getOperand(Index);
580   if (!MCO.isExpr())
581     return Sentinal;
582   int64_t Value;
583   if (!MCO.getExpr()->evaluateAsAbsolute(Value))
584     return Sentinal;
585   return Value;
586 }
587 
588 void HexagonMCInstrInfo::setMustExtend(MCExpr &Expr, bool Val) {
589   HexagonMCExpr &HExpr = cast<HexagonMCExpr>(Expr);
590   HExpr.setMustExtend(Val);
591 }
592 
593 bool HexagonMCInstrInfo::mustExtend(MCExpr const &Expr) {
594   HexagonMCExpr const &HExpr = cast<HexagonMCExpr>(Expr);
595   return HExpr.mustExtend();
596 }
597 void HexagonMCInstrInfo::setMustNotExtend(MCExpr const &Expr, bool Val) {
598   HexagonMCExpr &HExpr =
599       const_cast<HexagonMCExpr &>(cast<HexagonMCExpr>(Expr));
600   HExpr.setMustNotExtend(Val);
601 }
602 bool HexagonMCInstrInfo::mustNotExtend(MCExpr const &Expr) {
603   HexagonMCExpr const &HExpr = cast<HexagonMCExpr>(Expr);
604   return HExpr.mustNotExtend();
605 }
606 
607 void HexagonMCInstrInfo::padEndloop(MCContext &Context, MCInst &MCB) {
608   MCInst Nop;
609   Nop.setOpcode(Hexagon::A2_nop);
610   assert(isBundle(MCB));
611   while ((HexagonMCInstrInfo::isInnerLoop(MCB) &&
612           (HexagonMCInstrInfo::bundleSize(MCB) < HEXAGON_PACKET_INNER_SIZE)) ||
613          ((HexagonMCInstrInfo::isOuterLoop(MCB) &&
614            (HexagonMCInstrInfo::bundleSize(MCB) < HEXAGON_PACKET_OUTER_SIZE))))
615     MCB.addOperand(MCOperand::createInst(new (Context) MCInst(Nop)));
616 }
617 
618 bool HexagonMCInstrInfo::prefersSlot3(MCInstrInfo const &MCII,
619                                       MCInst const &MCI) {
620   if (HexagonMCInstrInfo::getType(MCII, MCI) == HexagonII::TypeCR)
621     return false;
622 
623   unsigned SchedClass = HexagonMCInstrInfo::getDesc(MCII, MCI).getSchedClass();
624   switch (SchedClass) {
625   case Hexagon::Sched::ALU32_3op_tc_2_SLOT0123:
626   case Hexagon::Sched::ALU64_tc_2_SLOT23:
627   case Hexagon::Sched::ALU64_tc_3x_SLOT23:
628   case Hexagon::Sched::M_tc_2_SLOT23:
629   case Hexagon::Sched::M_tc_3x_SLOT23:
630   case Hexagon::Sched::S_2op_tc_2_SLOT23:
631   case Hexagon::Sched::S_3op_tc_2_SLOT23:
632   case Hexagon::Sched::S_3op_tc_3x_SLOT23:
633     return true;
634   }
635   return false;
636 }
637 
638 void HexagonMCInstrInfo::replaceDuplex(MCContext &Context, MCInst &MCB,
639                                        DuplexCandidate Candidate) {
640   assert(Candidate.packetIndexI < MCB.size());
641   assert(Candidate.packetIndexJ < MCB.size());
642   assert(isBundle(MCB));
643   MCInst *Duplex =
644       deriveDuplex(Context, Candidate.iClass,
645                    *MCB.getOperand(Candidate.packetIndexJ).getInst(),
646                    *MCB.getOperand(Candidate.packetIndexI).getInst());
647   assert(Duplex != nullptr);
648   MCB.getOperand(Candidate.packetIndexI).setInst(Duplex);
649   MCB.erase(MCB.begin() + Candidate.packetIndexJ);
650 }
651 
652 void HexagonMCInstrInfo::setInnerLoop(MCInst &MCI) {
653   assert(isBundle(MCI));
654   MCOperand &Operand = MCI.getOperand(0);
655   Operand.setImm(Operand.getImm() | innerLoopMask);
656 }
657 
658 void HexagonMCInstrInfo::setMemReorderDisabled(MCInst &MCI) {
659   assert(isBundle(MCI));
660   MCOperand &Operand = MCI.getOperand(0);
661   Operand.setImm(Operand.getImm() | memReorderDisabledMask);
662   assert(isMemReorderDisabled(MCI));
663 }
664 
665 void HexagonMCInstrInfo::setMemStoreReorderEnabled(MCInst &MCI) {
666   assert(isBundle(MCI));
667   MCOperand &Operand = MCI.getOperand(0);
668   Operand.setImm(Operand.getImm() | memStoreReorderEnabledMask);
669   assert(isMemStoreReorderEnabled(MCI));
670 }
671 void HexagonMCInstrInfo::setS23_2_reloc(MCExpr const &Expr, bool Val) {
672   HexagonMCExpr &HExpr =
673       const_cast<HexagonMCExpr &>(*llvm::cast<HexagonMCExpr>(&Expr));
674   HExpr.setS23_2_reloc(Val);
675 }
676 bool HexagonMCInstrInfo::s23_2_reloc(MCExpr const &Expr) {
677   HexagonMCExpr const &HExpr = *llvm::cast<HexagonMCExpr>(&Expr);
678   return HExpr.s23_2_reloc();
679 }
680 
681 void HexagonMCInstrInfo::setOuterLoop(MCInst &MCI) {
682   assert(isBundle(MCI));
683   MCOperand &Operand = MCI.getOperand(0);
684   Operand.setImm(Operand.getImm() | outerLoopMask);
685 }
686 }
687