1 //===- HexagonTargetTransformInfo.cpp - Hexagon specific TTI pass ---------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 /// \file
8 /// This file implements a TargetTransformInfo analysis pass specific to the
9 /// Hexagon target machine. It uses the target's detailed information to provide
10 /// more precise answers to certain TTI queries, while letting the target
11 /// independent and default TTI implementations handle the rest.
12 ///
13 //===----------------------------------------------------------------------===//
14 
15 #include "HexagonTargetTransformInfo.h"
16 #include "HexagonSubtarget.h"
17 #include "llvm/Analysis/TargetTransformInfo.h"
18 #include "llvm/CodeGen/ValueTypes.h"
19 #include "llvm/IR/InstrTypes.h"
20 #include "llvm/IR/Instructions.h"
21 #include "llvm/IR/User.h"
22 #include "llvm/Support/Casting.h"
23 #include "llvm/Support/CommandLine.h"
24 #include "llvm/Transforms/Utils/UnrollLoop.h"
25 
26 using namespace llvm;
27 
28 #define DEBUG_TYPE "hexagontti"
29 
30 static cl::opt<bool> HexagonAutoHVX("hexagon-autohvx", cl::init(false),
31   cl::Hidden, cl::desc("Enable loop vectorizer for HVX"));
32 
33 static cl::opt<bool> EmitLookupTables("hexagon-emit-lookup-tables",
34   cl::init(true), cl::Hidden,
35   cl::desc("Control lookup table emission on Hexagon target"));
36 
37 // Constant "cost factor" to make floating point operations more expensive
38 // in terms of vectorization cost. This isn't the best way, but it should
39 // do. Ultimately, the cost should use cycles.
40 static const unsigned FloatFactor = 4;
41 
42 bool HexagonTTIImpl::useHVX() const {
43   return ST.useHVXOps() && HexagonAutoHVX;
44 }
45 
46 bool HexagonTTIImpl::isTypeForHVX(Type *VecTy) const {
47   assert(VecTy->isVectorTy());
48   if (isa<ScalableVectorType>(VecTy))
49     return false;
50   // Avoid types like <2 x i32*>.
51   if (!cast<VectorType>(VecTy)->getElementType()->isIntegerTy())
52     return false;
53   EVT VecVT = EVT::getEVT(VecTy);
54   if (!VecVT.isSimple() || VecVT.getSizeInBits() <= 64)
55     return false;
56   if (ST.isHVXVectorType(VecVT.getSimpleVT()))
57     return true;
58   auto Action = TLI.getPreferredVectorAction(VecVT.getSimpleVT());
59   return Action == TargetLoweringBase::TypeWidenVector;
60 }
61 
62 unsigned HexagonTTIImpl::getTypeNumElements(Type *Ty) const {
63   if (auto *VTy = dyn_cast<FixedVectorType>(Ty))
64     return VTy->getNumElements();
65   assert((Ty->isIntegerTy() || Ty->isFloatingPointTy()) &&
66          "Expecting scalar type");
67   return 1;
68 }
69 
70 TargetTransformInfo::PopcntSupportKind
71 HexagonTTIImpl::getPopcntSupport(unsigned IntTyWidthInBit) const {
72   // Return fast hardware support as every input < 64 bits will be promoted
73   // to 64 bits.
74   return TargetTransformInfo::PSK_FastHardware;
75 }
76 
77 // The Hexagon target can unroll loops with run-time trip counts.
78 void HexagonTTIImpl::getUnrollingPreferences(Loop *L, ScalarEvolution &SE,
79                                              TTI::UnrollingPreferences &UP) {
80   UP.Runtime = UP.Partial = true;
81   // Only try to peel innermost loops with small runtime trip counts.
82   if (L && L->empty() && canPeel(L) &&
83       SE.getSmallConstantTripCount(L) == 0 &&
84       SE.getSmallConstantMaxTripCount(L) > 0 &&
85       SE.getSmallConstantMaxTripCount(L) <= 5) {
86     UP.PeelCount = 2;
87   }
88 }
89 
90 bool HexagonTTIImpl::shouldFavorPostInc() const {
91   return true;
92 }
93 
94 /// --- Vector TTI begin ---
95 
96 unsigned HexagonTTIImpl::getNumberOfRegisters(bool Vector) const {
97   if (Vector)
98     return useHVX() ? 32 : 0;
99   return 32;
100 }
101 
102 unsigned HexagonTTIImpl::getMaxInterleaveFactor(unsigned VF) {
103   return useHVX() ? 2 : 0;
104 }
105 
106 unsigned HexagonTTIImpl::getRegisterBitWidth(bool Vector) const {
107   return Vector ? getMinVectorRegisterBitWidth() : 32;
108 }
109 
110 unsigned HexagonTTIImpl::getMinVectorRegisterBitWidth() const {
111   return useHVX() ? ST.getVectorLength()*8 : 0;
112 }
113 
114 unsigned HexagonTTIImpl::getMinimumVF(unsigned ElemWidth) const {
115   return (8 * ST.getVectorLength()) / ElemWidth;
116 }
117 
118 unsigned HexagonTTIImpl::getScalarizationOverhead(VectorType *Ty,
119                                                   const APInt &DemandedElts,
120                                                   bool Insert, bool Extract) {
121   return BaseT::getScalarizationOverhead(Ty, DemandedElts, Insert, Extract);
122 }
123 
124 unsigned HexagonTTIImpl::getOperandsScalarizationOverhead(
125       ArrayRef<const Value*> Args, unsigned VF) {
126   return BaseT::getOperandsScalarizationOverhead(Args, VF);
127 }
128 
129 unsigned HexagonTTIImpl::getCallInstrCost(Function *F, Type *RetTy,
130       ArrayRef<Type*> Tys, TTI::TargetCostKind CostKind) {
131   return BaseT::getCallInstrCost(F, RetTy, Tys, CostKind);
132 }
133 
134 unsigned
135 HexagonTTIImpl::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
136                                       TTI::TargetCostKind CostKind) {
137   if (ICA.getID() == Intrinsic::bswap) {
138     std::pair<int, MVT> LT = TLI.getTypeLegalizationCost(DL, ICA.getReturnType());
139     return LT.first + 2;
140   }
141   return BaseT::getIntrinsicInstrCost(ICA, CostKind);
142 }
143 
144 unsigned HexagonTTIImpl::getAddressComputationCost(Type *Tp,
145       ScalarEvolution *SE, const SCEV *S) {
146   return 0;
147 }
148 
149 unsigned HexagonTTIImpl::getMemoryOpCost(unsigned Opcode, Type *Src,
150                                          MaybeAlign Alignment,
151                                          unsigned AddressSpace,
152                                          TTI::TargetCostKind CostKind,
153                                          const Instruction *I) {
154   assert(Opcode == Instruction::Load || Opcode == Instruction::Store);
155   // TODO: Handle other cost kinds.
156   if (CostKind != TTI::TCK_RecipThroughput)
157     return 1;
158 
159   if (Opcode == Instruction::Store)
160     return BaseT::getMemoryOpCost(Opcode, Src, Alignment, AddressSpace,
161                                   CostKind, I);
162 
163   if (Src->isVectorTy()) {
164     VectorType *VecTy = cast<VectorType>(Src);
165     unsigned VecWidth = VecTy->getPrimitiveSizeInBits().getFixedSize();
166     if (useHVX() && isTypeForHVX(VecTy)) {
167       unsigned RegWidth = getRegisterBitWidth(true);
168       assert(RegWidth && "Non-zero vector register width expected");
169       // Cost of HVX loads.
170       if (VecWidth % RegWidth == 0)
171         return VecWidth / RegWidth;
172       // Cost of constructing HVX vector from scalar loads
173       const Align RegAlign(RegWidth / 8);
174       if (!Alignment || *Alignment > RegAlign)
175         Alignment = RegAlign;
176       assert(Alignment);
177       unsigned AlignWidth = 8 * Alignment->value();
178       unsigned NumLoads = alignTo(VecWidth, AlignWidth) / AlignWidth;
179       return 3 * NumLoads;
180     }
181 
182     // Non-HVX vectors.
183     // Add extra cost for floating point types.
184     unsigned Cost =
185         VecTy->getElementType()->isFloatingPointTy() ? FloatFactor : 1;
186 
187     // At this point unspecified alignment is considered as Align(1).
188     const Align BoundAlignment = std::min(Alignment.valueOrOne(), Align(8));
189     unsigned AlignWidth = 8 * BoundAlignment.value();
190     unsigned NumLoads = alignTo(VecWidth, AlignWidth) / AlignWidth;
191     if (Alignment == Align(4) || Alignment == Align(8))
192       return Cost * NumLoads;
193     // Loads of less than 32 bits will need extra inserts to compose a vector.
194     assert(BoundAlignment <= Align(8));
195     unsigned LogA = Log2(BoundAlignment);
196     return (3 - LogA) * Cost * NumLoads;
197   }
198 
199   return BaseT::getMemoryOpCost(Opcode, Src, Alignment, AddressSpace,
200                                 CostKind, I);
201 }
202 
203 unsigned HexagonTTIImpl::getMaskedMemoryOpCost(unsigned Opcode,
204       Type *Src, unsigned Alignment, unsigned AddressSpace,
205       TTI::TargetCostKind CostKind) {
206   return BaseT::getMaskedMemoryOpCost(Opcode, Src, Alignment, AddressSpace,
207                                       CostKind);
208 }
209 
210 unsigned HexagonTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, Type *Tp,
211       int Index, Type *SubTp) {
212   return 1;
213 }
214 
215 unsigned HexagonTTIImpl::getGatherScatterOpCost(
216     unsigned Opcode, Type *DataTy, Value *Ptr, bool VariableMask,
217     unsigned Alignment, TTI::TargetCostKind CostKind,
218     const Instruction *I) {
219   return BaseT::getGatherScatterOpCost(Opcode, DataTy, Ptr, VariableMask,
220                                        Alignment, CostKind, I);
221 }
222 
223 unsigned HexagonTTIImpl::getInterleavedMemoryOpCost(unsigned Opcode,
224       Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
225       unsigned Alignment, unsigned AddressSpace,
226       TTI::TargetCostKind CostKind, bool UseMaskForCond,
227       bool UseMaskForGaps) {
228   if (Indices.size() != Factor || UseMaskForCond || UseMaskForGaps)
229     return BaseT::getInterleavedMemoryOpCost(Opcode, VecTy, Factor, Indices,
230                                              Alignment, AddressSpace,
231                                              CostKind,
232                                              UseMaskForCond, UseMaskForGaps);
233   return getMemoryOpCost(Opcode, VecTy, MaybeAlign(Alignment), AddressSpace,
234                          CostKind);
235 }
236 
237 unsigned HexagonTTIImpl::getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
238       Type *CondTy, TTI::TargetCostKind CostKind, const Instruction *I) {
239   if (ValTy->isVectorTy() && CostKind == TTI::TCK_RecipThroughput) {
240     std::pair<int, MVT> LT = TLI.getTypeLegalizationCost(DL, ValTy);
241     if (Opcode == Instruction::FCmp)
242       return LT.first + FloatFactor * getTypeNumElements(ValTy);
243   }
244   return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, CostKind, I);
245 }
246 
247 unsigned HexagonTTIImpl::getArithmeticInstrCost(
248     unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
249     TTI::OperandValueKind Opd1Info,
250     TTI::OperandValueKind Opd2Info, TTI::OperandValueProperties Opd1PropInfo,
251     TTI::OperandValueProperties Opd2PropInfo, ArrayRef<const Value *> Args,
252     const Instruction *CxtI) {
253   // TODO: Handle more cost kinds.
254   if (CostKind != TTI::TCK_RecipThroughput)
255     return BaseT::getArithmeticInstrCost(Opcode, Ty, CostKind, Opd1Info,
256                                          Opd2Info, Opd1PropInfo,
257                                          Opd2PropInfo, Args, CxtI);
258 
259   if (Ty->isVectorTy()) {
260     std::pair<int, MVT> LT = TLI.getTypeLegalizationCost(DL, Ty);
261     if (LT.second.isFloatingPoint())
262       return LT.first + FloatFactor * getTypeNumElements(Ty);
263   }
264   return BaseT::getArithmeticInstrCost(Opcode, Ty, CostKind, Opd1Info, Opd2Info,
265                                        Opd1PropInfo, Opd2PropInfo, Args, CxtI);
266 }
267 
268 unsigned HexagonTTIImpl::getCastInstrCost(unsigned Opcode, Type *DstTy,
269       Type *SrcTy, TTI::TargetCostKind CostKind, const Instruction *I) {
270   if (SrcTy->isFPOrFPVectorTy() || DstTy->isFPOrFPVectorTy()) {
271     unsigned SrcN = SrcTy->isFPOrFPVectorTy() ? getTypeNumElements(SrcTy) : 0;
272     unsigned DstN = DstTy->isFPOrFPVectorTy() ? getTypeNumElements(DstTy) : 0;
273 
274     std::pair<int, MVT> SrcLT = TLI.getTypeLegalizationCost(DL, SrcTy);
275     std::pair<int, MVT> DstLT = TLI.getTypeLegalizationCost(DL, DstTy);
276     unsigned Cost = std::max(SrcLT.first, DstLT.first) + FloatFactor * (SrcN + DstN);
277     // TODO: Allow non-throughput costs that aren't binary.
278     if (CostKind != TTI::TCK_RecipThroughput)
279       return Cost == 0 ? 0 : 1;
280     return Cost;
281   }
282   return 1;
283 }
284 
285 unsigned HexagonTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val,
286       unsigned Index) {
287   Type *ElemTy = Val->isVectorTy() ? cast<VectorType>(Val)->getElementType()
288                                    : Val;
289   if (Opcode == Instruction::InsertElement) {
290     // Need two rotations for non-zero index.
291     unsigned Cost = (Index != 0) ? 2 : 0;
292     if (ElemTy->isIntegerTy(32))
293       return Cost;
294     // If it's not a 32-bit value, there will need to be an extract.
295     return Cost + getVectorInstrCost(Instruction::ExtractElement, Val, Index);
296   }
297 
298   if (Opcode == Instruction::ExtractElement)
299     return 2;
300 
301   return 1;
302 }
303 
304 /// --- Vector TTI end ---
305 
306 unsigned HexagonTTIImpl::getPrefetchDistance() const {
307   return ST.getL1PrefetchDistance();
308 }
309 
310 unsigned HexagonTTIImpl::getCacheLineSize() const {
311   return ST.getL1CacheLineSize();
312 }
313 
314 int
315 HexagonTTIImpl::getUserCost(const User *U,
316                             ArrayRef<const Value *> Operands,
317                             TTI::TargetCostKind CostKind) {
318   auto isCastFoldedIntoLoad = [this](const CastInst *CI) -> bool {
319     if (!CI->isIntegerCast())
320       return false;
321     // Only extensions from an integer type shorter than 32-bit to i32
322     // can be folded into the load.
323     const DataLayout &DL = getDataLayout();
324     unsigned SBW = DL.getTypeSizeInBits(CI->getSrcTy());
325     unsigned DBW = DL.getTypeSizeInBits(CI->getDestTy());
326     if (DBW != 32 || SBW >= DBW)
327       return false;
328 
329     const LoadInst *LI = dyn_cast<const LoadInst>(CI->getOperand(0));
330     // Technically, this code could allow multiple uses of the load, and
331     // check if all the uses are the same extension operation, but this
332     // should be sufficient for most cases.
333     return LI && LI->hasOneUse();
334   };
335 
336   if (const CastInst *CI = dyn_cast<const CastInst>(U))
337     if (isCastFoldedIntoLoad(CI))
338       return TargetTransformInfo::TCC_Free;
339   return BaseT::getUserCost(U, Operands, CostKind);
340 }
341 
342 bool HexagonTTIImpl::shouldBuildLookupTables() const {
343   return EmitLookupTables;
344 }
345