1 //===- HexagonTargetTransformInfo.cpp - Hexagon specific TTI pass ---------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 /// \file
8 /// This file implements a TargetTransformInfo analysis pass specific to the
9 /// Hexagon target machine. It uses the target's detailed information to provide
10 /// more precise answers to certain TTI queries, while letting the target
11 /// independent and default TTI implementations handle the rest.
12 ///
13 //===----------------------------------------------------------------------===//
14 
15 #include "HexagonTargetTransformInfo.h"
16 #include "HexagonSubtarget.h"
17 #include "llvm/Analysis/TargetTransformInfo.h"
18 #include "llvm/CodeGen/ValueTypes.h"
19 #include "llvm/IR/InstrTypes.h"
20 #include "llvm/IR/Instructions.h"
21 #include "llvm/IR/User.h"
22 #include "llvm/Support/Casting.h"
23 #include "llvm/Support/CommandLine.h"
24 #include "llvm/Transforms/Utils/LoopPeel.h"
25 #include "llvm/Transforms/Utils/UnrollLoop.h"
26 
27 using namespace llvm;
28 
29 #define DEBUG_TYPE "hexagontti"
30 
31 static cl::opt<bool> HexagonAutoHVX("hexagon-autohvx", cl::init(false),
32   cl::Hidden, cl::desc("Enable loop vectorizer for HVX"));
33 
34 static cl::opt<bool> EmitLookupTables("hexagon-emit-lookup-tables",
35   cl::init(true), cl::Hidden,
36   cl::desc("Control lookup table emission on Hexagon target"));
37 
38 // Constant "cost factor" to make floating point operations more expensive
39 // in terms of vectorization cost. This isn't the best way, but it should
40 // do. Ultimately, the cost should use cycles.
41 static const unsigned FloatFactor = 4;
42 
43 bool HexagonTTIImpl::useHVX() const {
44   return ST.useHVXOps() && HexagonAutoHVX;
45 }
46 
47 bool HexagonTTIImpl::isTypeForHVX(Type *VecTy) const {
48   assert(VecTy->isVectorTy());
49   if (isa<ScalableVectorType>(VecTy))
50     return false;
51   // Avoid types like <2 x i32*>.
52   if (!cast<VectorType>(VecTy)->getElementType()->isIntegerTy())
53     return false;
54   EVT VecVT = EVT::getEVT(VecTy);
55   if (!VecVT.isSimple() || VecVT.getSizeInBits() <= 64)
56     return false;
57   if (ST.isHVXVectorType(VecVT.getSimpleVT()))
58     return true;
59   auto Action = TLI.getPreferredVectorAction(VecVT.getSimpleVT());
60   return Action == TargetLoweringBase::TypeWidenVector;
61 }
62 
63 unsigned HexagonTTIImpl::getTypeNumElements(Type *Ty) const {
64   if (auto *VTy = dyn_cast<FixedVectorType>(Ty))
65     return VTy->getNumElements();
66   assert((Ty->isIntegerTy() || Ty->isFloatingPointTy()) &&
67          "Expecting scalar type");
68   return 1;
69 }
70 
71 TargetTransformInfo::PopcntSupportKind
72 HexagonTTIImpl::getPopcntSupport(unsigned IntTyWidthInBit) const {
73   // Return fast hardware support as every input < 64 bits will be promoted
74   // to 64 bits.
75   return TargetTransformInfo::PSK_FastHardware;
76 }
77 
78 // The Hexagon target can unroll loops with run-time trip counts.
79 void HexagonTTIImpl::getUnrollingPreferences(Loop *L, ScalarEvolution &SE,
80                                              TTI::UnrollingPreferences &UP) {
81   UP.Runtime = UP.Partial = true;
82 }
83 
84 void HexagonTTIImpl::getPeelingPreferences(Loop *L, ScalarEvolution &SE,
85                                            TTI::PeelingPreferences &PP) {
86   BaseT::getPeelingPreferences(L, SE, PP);
87   // Only try to peel innermost loops with small runtime trip counts.
88   if (L && L->empty() && canPeel(L) &&
89       SE.getSmallConstantTripCount(L) == 0 &&
90       SE.getSmallConstantMaxTripCount(L) > 0 &&
91       SE.getSmallConstantMaxTripCount(L) <= 5) {
92     PP.PeelCount = 2;
93   }
94 }
95 
96 bool HexagonTTIImpl::shouldFavorPostInc() const {
97   return true;
98 }
99 
100 /// --- Vector TTI begin ---
101 
102 unsigned HexagonTTIImpl::getNumberOfRegisters(bool Vector) const {
103   if (Vector)
104     return useHVX() ? 32 : 0;
105   return 32;
106 }
107 
108 unsigned HexagonTTIImpl::getMaxInterleaveFactor(unsigned VF) {
109   return useHVX() ? 2 : 0;
110 }
111 
112 unsigned HexagonTTIImpl::getRegisterBitWidth(bool Vector) const {
113   return Vector ? getMinVectorRegisterBitWidth() : 32;
114 }
115 
116 unsigned HexagonTTIImpl::getMinVectorRegisterBitWidth() const {
117   return useHVX() ? ST.getVectorLength()*8 : 0;
118 }
119 
120 unsigned HexagonTTIImpl::getMinimumVF(unsigned ElemWidth) const {
121   return (8 * ST.getVectorLength()) / ElemWidth;
122 }
123 
124 unsigned HexagonTTIImpl::getScalarizationOverhead(VectorType *Ty,
125                                                   const APInt &DemandedElts,
126                                                   bool Insert, bool Extract) {
127   return BaseT::getScalarizationOverhead(Ty, DemandedElts, Insert, Extract);
128 }
129 
130 unsigned HexagonTTIImpl::getOperandsScalarizationOverhead(
131       ArrayRef<const Value*> Args, unsigned VF) {
132   return BaseT::getOperandsScalarizationOverhead(Args, VF);
133 }
134 
135 unsigned HexagonTTIImpl::getCallInstrCost(Function *F, Type *RetTy,
136       ArrayRef<Type*> Tys, TTI::TargetCostKind CostKind) {
137   return BaseT::getCallInstrCost(F, RetTy, Tys, CostKind);
138 }
139 
140 unsigned
141 HexagonTTIImpl::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
142                                       TTI::TargetCostKind CostKind) {
143   if (ICA.getID() == Intrinsic::bswap) {
144     std::pair<int, MVT> LT = TLI.getTypeLegalizationCost(DL, ICA.getReturnType());
145     return LT.first + 2;
146   }
147   return BaseT::getIntrinsicInstrCost(ICA, CostKind);
148 }
149 
150 unsigned HexagonTTIImpl::getAddressComputationCost(Type *Tp,
151       ScalarEvolution *SE, const SCEV *S) {
152   return 0;
153 }
154 
155 unsigned HexagonTTIImpl::getMemoryOpCost(unsigned Opcode, Type *Src,
156                                          MaybeAlign Alignment,
157                                          unsigned AddressSpace,
158                                          TTI::TargetCostKind CostKind,
159                                          const Instruction *I) {
160   assert(Opcode == Instruction::Load || Opcode == Instruction::Store);
161   // TODO: Handle other cost kinds.
162   if (CostKind != TTI::TCK_RecipThroughput)
163     return 1;
164 
165   if (Opcode == Instruction::Store)
166     return BaseT::getMemoryOpCost(Opcode, Src, Alignment, AddressSpace,
167                                   CostKind, I);
168 
169   if (Src->isVectorTy()) {
170     VectorType *VecTy = cast<VectorType>(Src);
171     unsigned VecWidth = VecTy->getPrimitiveSizeInBits().getFixedSize();
172     if (useHVX() && isTypeForHVX(VecTy)) {
173       unsigned RegWidth = getRegisterBitWidth(true);
174       assert(RegWidth && "Non-zero vector register width expected");
175       // Cost of HVX loads.
176       if (VecWidth % RegWidth == 0)
177         return VecWidth / RegWidth;
178       // Cost of constructing HVX vector from scalar loads
179       const Align RegAlign(RegWidth / 8);
180       if (!Alignment || *Alignment > RegAlign)
181         Alignment = RegAlign;
182       assert(Alignment);
183       unsigned AlignWidth = 8 * Alignment->value();
184       unsigned NumLoads = alignTo(VecWidth, AlignWidth) / AlignWidth;
185       return 3 * NumLoads;
186     }
187 
188     // Non-HVX vectors.
189     // Add extra cost for floating point types.
190     unsigned Cost =
191         VecTy->getElementType()->isFloatingPointTy() ? FloatFactor : 1;
192 
193     // At this point unspecified alignment is considered as Align(1).
194     const Align BoundAlignment = std::min(Alignment.valueOrOne(), Align(8));
195     unsigned AlignWidth = 8 * BoundAlignment.value();
196     unsigned NumLoads = alignTo(VecWidth, AlignWidth) / AlignWidth;
197     if (Alignment == Align(4) || Alignment == Align(8))
198       return Cost * NumLoads;
199     // Loads of less than 32 bits will need extra inserts to compose a vector.
200     assert(BoundAlignment <= Align(8));
201     unsigned LogA = Log2(BoundAlignment);
202     return (3 - LogA) * Cost * NumLoads;
203   }
204 
205   return BaseT::getMemoryOpCost(Opcode, Src, Alignment, AddressSpace,
206                                 CostKind, I);
207 }
208 
209 unsigned HexagonTTIImpl::getMaskedMemoryOpCost(unsigned Opcode, Type *Src,
210                                                Align Alignment,
211                                                unsigned AddressSpace,
212                                                TTI::TargetCostKind CostKind) {
213   return BaseT::getMaskedMemoryOpCost(Opcode, Src, Alignment, AddressSpace,
214                                       CostKind);
215 }
216 
217 unsigned HexagonTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, Type *Tp,
218       int Index, Type *SubTp) {
219   return 1;
220 }
221 
222 unsigned HexagonTTIImpl::getGatherScatterOpCost(
223     unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask,
224     Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I) {
225   return BaseT::getGatherScatterOpCost(Opcode, DataTy, Ptr, VariableMask,
226                                        Alignment, CostKind, I);
227 }
228 
229 unsigned HexagonTTIImpl::getInterleavedMemoryOpCost(
230     unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
231     Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
232     bool UseMaskForCond, bool UseMaskForGaps) {
233   if (Indices.size() != Factor || UseMaskForCond || UseMaskForGaps)
234     return BaseT::getInterleavedMemoryOpCost(Opcode, VecTy, Factor, Indices,
235                                              Alignment, AddressSpace,
236                                              CostKind,
237                                              UseMaskForCond, UseMaskForGaps);
238   return getMemoryOpCost(Opcode, VecTy, MaybeAlign(Alignment), AddressSpace,
239                          CostKind);
240 }
241 
242 unsigned HexagonTTIImpl::getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
243       Type *CondTy, TTI::TargetCostKind CostKind, const Instruction *I) {
244   if (ValTy->isVectorTy() && CostKind == TTI::TCK_RecipThroughput) {
245     std::pair<int, MVT> LT = TLI.getTypeLegalizationCost(DL, ValTy);
246     if (Opcode == Instruction::FCmp)
247       return LT.first + FloatFactor * getTypeNumElements(ValTy);
248   }
249   return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, CostKind, I);
250 }
251 
252 unsigned HexagonTTIImpl::getArithmeticInstrCost(
253     unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
254     TTI::OperandValueKind Opd1Info,
255     TTI::OperandValueKind Opd2Info, TTI::OperandValueProperties Opd1PropInfo,
256     TTI::OperandValueProperties Opd2PropInfo, ArrayRef<const Value *> Args,
257     const Instruction *CxtI) {
258   // TODO: Handle more cost kinds.
259   if (CostKind != TTI::TCK_RecipThroughput)
260     return BaseT::getArithmeticInstrCost(Opcode, Ty, CostKind, Opd1Info,
261                                          Opd2Info, Opd1PropInfo,
262                                          Opd2PropInfo, Args, CxtI);
263 
264   if (Ty->isVectorTy()) {
265     std::pair<int, MVT> LT = TLI.getTypeLegalizationCost(DL, Ty);
266     if (LT.second.isFloatingPoint())
267       return LT.first + FloatFactor * getTypeNumElements(Ty);
268   }
269   return BaseT::getArithmeticInstrCost(Opcode, Ty, CostKind, Opd1Info, Opd2Info,
270                                        Opd1PropInfo, Opd2PropInfo, Args, CxtI);
271 }
272 
273 unsigned HexagonTTIImpl::getCastInstrCost(unsigned Opcode, Type *DstTy,
274                                           Type *SrcTy, TTI::CastContextHint CCH,
275                                           TTI::TargetCostKind CostKind,
276                                           const Instruction *I) {
277   if (SrcTy->isFPOrFPVectorTy() || DstTy->isFPOrFPVectorTy()) {
278     unsigned SrcN = SrcTy->isFPOrFPVectorTy() ? getTypeNumElements(SrcTy) : 0;
279     unsigned DstN = DstTy->isFPOrFPVectorTy() ? getTypeNumElements(DstTy) : 0;
280 
281     std::pair<int, MVT> SrcLT = TLI.getTypeLegalizationCost(DL, SrcTy);
282     std::pair<int, MVT> DstLT = TLI.getTypeLegalizationCost(DL, DstTy);
283     unsigned Cost = std::max(SrcLT.first, DstLT.first) + FloatFactor * (SrcN + DstN);
284     // TODO: Allow non-throughput costs that aren't binary.
285     if (CostKind != TTI::TCK_RecipThroughput)
286       return Cost == 0 ? 0 : 1;
287     return Cost;
288   }
289   return 1;
290 }
291 
292 unsigned HexagonTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val,
293       unsigned Index) {
294   Type *ElemTy = Val->isVectorTy() ? cast<VectorType>(Val)->getElementType()
295                                    : Val;
296   if (Opcode == Instruction::InsertElement) {
297     // Need two rotations for non-zero index.
298     unsigned Cost = (Index != 0) ? 2 : 0;
299     if (ElemTy->isIntegerTy(32))
300       return Cost;
301     // If it's not a 32-bit value, there will need to be an extract.
302     return Cost + getVectorInstrCost(Instruction::ExtractElement, Val, Index);
303   }
304 
305   if (Opcode == Instruction::ExtractElement)
306     return 2;
307 
308   return 1;
309 }
310 
311 /// --- Vector TTI end ---
312 
313 unsigned HexagonTTIImpl::getPrefetchDistance() const {
314   return ST.getL1PrefetchDistance();
315 }
316 
317 unsigned HexagonTTIImpl::getCacheLineSize() const {
318   return ST.getL1CacheLineSize();
319 }
320 
321 int
322 HexagonTTIImpl::getUserCost(const User *U,
323                             ArrayRef<const Value *> Operands,
324                             TTI::TargetCostKind CostKind) {
325   auto isCastFoldedIntoLoad = [this](const CastInst *CI) -> bool {
326     if (!CI->isIntegerCast())
327       return false;
328     // Only extensions from an integer type shorter than 32-bit to i32
329     // can be folded into the load.
330     const DataLayout &DL = getDataLayout();
331     unsigned SBW = DL.getTypeSizeInBits(CI->getSrcTy());
332     unsigned DBW = DL.getTypeSizeInBits(CI->getDestTy());
333     if (DBW != 32 || SBW >= DBW)
334       return false;
335 
336     const LoadInst *LI = dyn_cast<const LoadInst>(CI->getOperand(0));
337     // Technically, this code could allow multiple uses of the load, and
338     // check if all the uses are the same extension operation, but this
339     // should be sufficient for most cases.
340     return LI && LI->hasOneUse();
341   };
342 
343   if (const CastInst *CI = dyn_cast<const CastInst>(U))
344     if (isCastFoldedIntoLoad(CI))
345       return TargetTransformInfo::TCC_Free;
346   return BaseT::getUserCost(U, Operands, CostKind);
347 }
348 
349 bool HexagonTTIImpl::shouldBuildLookupTables() const {
350   return EmitLookupTables;
351 }
352