1 //=== HexagonSplitConst32AndConst64.cpp - split CONST32/Const64 into HI/LO ===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // When the compiler is invoked with no small data, for instance, with the -G0 11 // command line option, then all CONST32_* opcodes should be broken down into 12 // appropriate LO and HI instructions. This splitting is done by this pass. 13 // The only reason this is not done in the DAG lowering itself is that there 14 // is no simple way of getting the register allocator to allot the same hard 15 // register to the result of LO and HI instructions. This pass is always 16 // scheduled after register allocation. 17 // 18 //===----------------------------------------------------------------------===// 19 20 #include "HexagonMachineFunctionInfo.h" 21 #include "HexagonSubtarget.h" 22 #include "HexagonTargetMachine.h" 23 #include "HexagonTargetObjectFile.h" 24 #include "llvm/ADT/Statistic.h" 25 #include "llvm/CodeGen/LatencyPriorityQueue.h" 26 #include "llvm/CodeGen/MachineDominators.h" 27 #include "llvm/CodeGen/MachineFunctionPass.h" 28 #include "llvm/CodeGen/MachineInstrBuilder.h" 29 #include "llvm/CodeGen/MachineLoopInfo.h" 30 #include "llvm/CodeGen/MachineRegisterInfo.h" 31 #include "llvm/CodeGen/Passes.h" 32 #include "llvm/CodeGen/ScheduleDAGInstrs.h" 33 #include "llvm/CodeGen/ScheduleHazardRecognizer.h" 34 #include "llvm/CodeGen/SchedulerRegistry.h" 35 #include "llvm/Support/CommandLine.h" 36 #include "llvm/Support/Compiler.h" 37 #include "llvm/Support/Debug.h" 38 #include "llvm/Support/MathExtras.h" 39 #include "llvm/Target/TargetInstrInfo.h" 40 #include "llvm/Target/TargetMachine.h" 41 #include "llvm/Target/TargetRegisterInfo.h" 42 #include <map> 43 44 using namespace llvm; 45 46 #define DEBUG_TYPE "xfer" 47 48 namespace { 49 50 class HexagonSplitConst32AndConst64 : public MachineFunctionPass { 51 public: 52 static char ID; 53 HexagonSplitConst32AndConst64() : MachineFunctionPass(ID) {} 54 55 const char *getPassName() const override { 56 return "Hexagon Split Const32s and Const64s"; 57 } 58 bool runOnMachineFunction(MachineFunction &Fn) override; 59 }; 60 61 62 char HexagonSplitConst32AndConst64::ID = 0; 63 64 65 bool HexagonSplitConst32AndConst64::runOnMachineFunction(MachineFunction &Fn) { 66 67 const HexagonTargetObjectFile &TLOF = 68 *static_cast<const HexagonTargetObjectFile *>( 69 Fn.getTarget().getObjFileLowering()); 70 if (TLOF.IsSmallDataEnabled()) 71 return true; 72 73 const TargetInstrInfo *TII = Fn.getSubtarget().getInstrInfo(); 74 const TargetRegisterInfo *TRI = Fn.getSubtarget().getRegisterInfo(); 75 76 // Loop over all of the basic blocks 77 for (MachineFunction::iterator MBBb = Fn.begin(), MBBe = Fn.end(); 78 MBBb != MBBe; ++MBBb) { 79 MachineBasicBlock* MBB = MBBb; 80 // Traverse the basic block 81 MachineBasicBlock::iterator MII = MBB->begin(); 82 MachineBasicBlock::iterator MIE = MBB->end (); 83 while (MII != MIE) { 84 MachineInstr *MI = MII; 85 int Opc = MI->getOpcode(); 86 if (Opc == Hexagon::CONST32_Int_Real && 87 MI->getOperand(1).isBlockAddress()) { 88 int DestReg = MI->getOperand(0).getReg(); 89 MachineOperand &Symbol = MI->getOperand (1); 90 91 BuildMI (*MBB, MII, MI->getDebugLoc(), 92 TII->get(Hexagon::LO), DestReg).addOperand(Symbol); 93 BuildMI (*MBB, MII, MI->getDebugLoc(), 94 TII->get(Hexagon::HI), DestReg).addOperand(Symbol); 95 // MBB->erase returns the iterator to the next instruction, which is the 96 // one we want to process next 97 MII = MBB->erase (MI); 98 continue; 99 } 100 101 else if (Opc == Hexagon::CONST32_Int_Real || 102 Opc == Hexagon::CONST32_Float_Real) { 103 int DestReg = MI->getOperand(0).getReg(); 104 105 // We have to convert an FP immediate into its corresponding integer 106 // representation 107 int64_t ImmValue; 108 if (Opc == Hexagon::CONST32_Float_Real) { 109 APFloat Val = MI->getOperand(1).getFPImm()->getValueAPF(); 110 ImmValue = *Val.bitcastToAPInt().getRawData(); 111 } 112 else 113 ImmValue = MI->getOperand(1).getImm(); 114 115 BuildMI(*MBB, MII, MI->getDebugLoc(), 116 TII->get(Hexagon::A2_tfrsi), DestReg).addImm(ImmValue); 117 MII = MBB->erase (MI); 118 continue; 119 } 120 else if (Opc == Hexagon::CONST64_Int_Real || 121 Opc == Hexagon::CONST64_Float_Real) { 122 int DestReg = MI->getOperand(0).getReg(); 123 124 // We have to convert an FP immediate into its corresponding integer 125 // representation 126 int64_t ImmValue; 127 if (Opc == Hexagon::CONST64_Float_Real) { 128 APFloat Val = MI->getOperand(1).getFPImm()->getValueAPF(); 129 ImmValue = *Val.bitcastToAPInt().getRawData(); 130 } 131 else 132 ImmValue = MI->getOperand(1).getImm(); 133 134 unsigned DestLo = TRI->getSubReg(DestReg, Hexagon::subreg_loreg); 135 unsigned DestHi = TRI->getSubReg(DestReg, Hexagon::subreg_hireg); 136 137 int32_t LowWord = (ImmValue & 0xFFFFFFFF); 138 int32_t HighWord = (ImmValue >> 32) & 0xFFFFFFFF; 139 140 BuildMI(*MBB, MII, MI->getDebugLoc(), 141 TII->get(Hexagon::A2_tfrsi), DestLo).addImm(LowWord); 142 BuildMI (*MBB, MII, MI->getDebugLoc(), 143 TII->get(Hexagon::A2_tfrsi), DestHi).addImm(HighWord); 144 MII = MBB->erase (MI); 145 continue; 146 } 147 ++MII; 148 } 149 } 150 151 return true; 152 } 153 154 } 155 156 //===----------------------------------------------------------------------===// 157 // Public Constructor Functions 158 //===----------------------------------------------------------------------===// 159 160 FunctionPass * 161 llvm::createHexagonSplitConst32AndConst64() { 162 return new HexagonSplitConst32AndConst64(); 163 } 164