1 //===-- CSKYISelLowering.cpp - CSKY DAG Lowering Implementation ----------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file defines the interfaces that CSKY uses to lower LLVM code into a 10 // selection DAG. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "CSKYISelLowering.h" 15 #include "CSKYCallingConv.h" 16 #include "CSKYConstantPoolValue.h" 17 #include "CSKYMachineFunctionInfo.h" 18 #include "CSKYRegisterInfo.h" 19 #include "CSKYSubtarget.h" 20 #include "llvm/ADT/Statistic.h" 21 #include "llvm/CodeGen/CallingConvLower.h" 22 #include "llvm/CodeGen/MachineJumpTableInfo.h" 23 #include "llvm/Support/Debug.h" 24 25 using namespace llvm; 26 27 #define DEBUG_TYPE "csky-isel-lowering" 28 29 STATISTIC(NumTailCalls, "Number of tail calls"); 30 31 #include "CSKYGenCallingConv.inc" 32 33 static const MCPhysReg GPRArgRegs[] = {CSKY::R0, CSKY::R1, CSKY::R2, CSKY::R3}; 34 35 CSKYTargetLowering::CSKYTargetLowering(const TargetMachine &TM, 36 const CSKYSubtarget &STI) 37 : TargetLowering(TM), Subtarget(STI) { 38 // Register Class 39 addRegisterClass(MVT::i32, &CSKY::GPRRegClass); 40 41 setOperationAction(ISD::ADDCARRY, MVT::i32, Legal); 42 setOperationAction(ISD::SUBCARRY, MVT::i32, Legal); 43 setOperationAction(ISD::BITREVERSE, MVT::i32, Legal); 44 45 setOperationAction(ISD::SREM, MVT::i32, Expand); 46 setOperationAction(ISD::UREM, MVT::i32, Expand); 47 setOperationAction(ISD::UDIVREM, MVT::i32, Expand); 48 setOperationAction(ISD::SDIVREM, MVT::i32, Expand); 49 setOperationAction(ISD::CTTZ, MVT::i32, Expand); 50 setOperationAction(ISD::CTPOP, MVT::i32, Expand); 51 setOperationAction(ISD::ROTR, MVT::i32, Expand); 52 setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand); 53 setOperationAction(ISD::SRL_PARTS, MVT::i32, Expand); 54 setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand); 55 setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand); 56 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); 57 setOperationAction(ISD::SELECT_CC, MVT::i32, Expand); 58 setOperationAction(ISD::BR_CC, MVT::i32, Expand); 59 setOperationAction(ISD::BR_JT, MVT::Other, Expand); 60 setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Expand); 61 setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); 62 setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); 63 setOperationAction(ISD::MULHS, MVT::i32, Expand); 64 setOperationAction(ISD::MULHU, MVT::i32, Expand); 65 setOperationAction(ISD::VAARG, MVT::Other, Expand); 66 setOperationAction(ISD::VACOPY, MVT::Other, Expand); 67 setOperationAction(ISD::VAEND, MVT::Other, Expand); 68 69 setLoadExtAction(ISD::EXTLOAD, MVT::i32, MVT::i1, Promote); 70 setLoadExtAction(ISD::SEXTLOAD, MVT::i32, MVT::i1, Promote); 71 setLoadExtAction(ISD::ZEXTLOAD, MVT::i32, MVT::i1, Promote); 72 73 setOperationAction(ISD::GlobalAddress, MVT::i32, Custom); 74 setOperationAction(ISD::ExternalSymbol, MVT::i32, Custom); 75 setOperationAction(ISD::GlobalTLSAddress, MVT::i32, Custom); 76 setOperationAction(ISD::BlockAddress, MVT::i32, Custom); 77 setOperationAction(ISD::JumpTable, MVT::i32, Custom); 78 setOperationAction(ISD::VASTART, MVT::Other, Custom); 79 80 if (!Subtarget.hasE2()) { 81 setLoadExtAction(ISD::SEXTLOAD, MVT::i32, MVT::i8, Expand); 82 setLoadExtAction(ISD::SEXTLOAD, MVT::i32, MVT::i16, Expand); 83 setOperationAction(ISD::CTLZ, MVT::i32, Expand); 84 setOperationAction(ISD::BSWAP, MVT::i32, Expand); 85 } 86 87 if (!Subtarget.has2E3()) { 88 setOperationAction(ISD::ABS, MVT::i32, Expand); 89 setOperationAction(ISD::BITREVERSE, MVT::i32, Expand); 90 setOperationAction(ISD::SDIV, MVT::i32, Expand); 91 setOperationAction(ISD::UDIV, MVT::i32, Expand); 92 } 93 94 if (!Subtarget.has3r2E3r3()) { 95 setOperationAction(ISD::ATOMIC_FENCE, MVT::Other, Expand); 96 } 97 98 // Compute derived properties from the register classes. 99 computeRegisterProperties(STI.getRegisterInfo()); 100 101 setBooleanContents(UndefinedBooleanContent); 102 setBooleanVectorContents(ZeroOrNegativeOneBooleanContent); 103 104 // TODO: Add atomic support fully. 105 setMaxAtomicSizeInBitsSupported(0); 106 107 setStackPointerRegisterToSaveRestore(CSKY::R14); 108 const Align FunctionAlignment(2); 109 setMinFunctionAlignment(FunctionAlignment); 110 setSchedulingPreference(Sched::Source); 111 } 112 113 SDValue CSKYTargetLowering::LowerOperation(SDValue Op, 114 SelectionDAG &DAG) const { 115 switch (Op.getOpcode()) { 116 default: 117 llvm_unreachable("unimplemented op"); 118 case ISD::GlobalAddress: 119 return LowerGlobalAddress(Op, DAG); 120 case ISD::ExternalSymbol: 121 return LowerExternalSymbol(Op, DAG); 122 case ISD::JumpTable: 123 return LowerJumpTable(Op, DAG); 124 case ISD::BlockAddress: 125 return LowerBlockAddress(Op, DAG); 126 case ISD::VASTART: 127 return LowerVASTART(Op, DAG); 128 case ISD::FRAMEADDR: 129 return LowerFRAMEADDR(Op, DAG); 130 case ISD::RETURNADDR: 131 return LowerRETURNADDR(Op, DAG); 132 } 133 } 134 135 EVT CSKYTargetLowering::getSetCCResultType(const DataLayout &DL, 136 LLVMContext &Context, EVT VT) const { 137 if (!VT.isVector()) 138 return MVT::i32; 139 140 return VT.changeVectorElementTypeToInteger(); 141 } 142 143 static SDValue convertValVTToLocVT(SelectionDAG &DAG, SDValue Val, 144 const CCValAssign &VA, const SDLoc &DL) { 145 EVT LocVT = VA.getLocVT(); 146 147 switch (VA.getLocInfo()) { 148 default: 149 llvm_unreachable("Unexpected CCValAssign::LocInfo"); 150 case CCValAssign::Full: 151 break; 152 case CCValAssign::BCvt: 153 Val = DAG.getNode(ISD::BITCAST, DL, LocVT, Val); 154 break; 155 } 156 return Val; 157 } 158 159 static SDValue convertLocVTToValVT(SelectionDAG &DAG, SDValue Val, 160 const CCValAssign &VA, const SDLoc &DL) { 161 switch (VA.getLocInfo()) { 162 default: 163 llvm_unreachable("Unexpected CCValAssign::LocInfo"); 164 case CCValAssign::Full: 165 break; 166 case CCValAssign::BCvt: 167 Val = DAG.getNode(ISD::BITCAST, DL, VA.getValVT(), Val); 168 break; 169 } 170 return Val; 171 } 172 173 static SDValue unpackFromRegLoc(const CSKYSubtarget &Subtarget, 174 SelectionDAG &DAG, SDValue Chain, 175 const CCValAssign &VA, const SDLoc &DL) { 176 MachineFunction &MF = DAG.getMachineFunction(); 177 MachineRegisterInfo &RegInfo = MF.getRegInfo(); 178 EVT LocVT = VA.getLocVT(); 179 SDValue Val; 180 const TargetRegisterClass *RC; 181 182 switch (LocVT.getSimpleVT().SimpleTy) { 183 default: 184 llvm_unreachable("Unexpected register type"); 185 case MVT::i32: 186 RC = &CSKY::GPRRegClass; 187 break; 188 case MVT::f32: 189 RC = Subtarget.hasFPUv2SingleFloat() ? &CSKY::sFPR32RegClass 190 : &CSKY::FPR32RegClass; 191 break; 192 case MVT::f64: 193 RC = Subtarget.hasFPUv2DoubleFloat() ? &CSKY::sFPR64RegClass 194 : &CSKY::FPR64RegClass; 195 break; 196 } 197 198 Register VReg = RegInfo.createVirtualRegister(RC); 199 RegInfo.addLiveIn(VA.getLocReg(), VReg); 200 Val = DAG.getCopyFromReg(Chain, DL, VReg, LocVT); 201 202 return convertLocVTToValVT(DAG, Val, VA, DL); 203 } 204 205 static SDValue unpackFromMemLoc(SelectionDAG &DAG, SDValue Chain, 206 const CCValAssign &VA, const SDLoc &DL) { 207 MachineFunction &MF = DAG.getMachineFunction(); 208 MachineFrameInfo &MFI = MF.getFrameInfo(); 209 EVT LocVT = VA.getLocVT(); 210 EVT ValVT = VA.getValVT(); 211 EVT PtrVT = MVT::getIntegerVT(DAG.getDataLayout().getPointerSizeInBits(0)); 212 int FI = MFI.CreateFixedObject(ValVT.getSizeInBits() / 8, 213 VA.getLocMemOffset(), /*Immutable=*/true); 214 SDValue FIN = DAG.getFrameIndex(FI, PtrVT); 215 SDValue Val; 216 217 ISD::LoadExtType ExtType; 218 switch (VA.getLocInfo()) { 219 default: 220 llvm_unreachable("Unexpected CCValAssign::LocInfo"); 221 case CCValAssign::Full: 222 case CCValAssign::BCvt: 223 ExtType = ISD::NON_EXTLOAD; 224 break; 225 } 226 Val = DAG.getExtLoad( 227 ExtType, DL, LocVT, Chain, FIN, 228 MachinePointerInfo::getFixedStack(DAG.getMachineFunction(), FI), ValVT); 229 return Val; 230 } 231 232 static SDValue unpack64(SelectionDAG &DAG, SDValue Chain, const CCValAssign &VA, 233 const SDLoc &DL) { 234 assert(VA.getLocVT() == MVT::i32 && 235 (VA.getValVT() == MVT::f64 || VA.getValVT() == MVT::i64) && 236 "Unexpected VA"); 237 MachineFunction &MF = DAG.getMachineFunction(); 238 MachineFrameInfo &MFI = MF.getFrameInfo(); 239 MachineRegisterInfo &RegInfo = MF.getRegInfo(); 240 241 if (VA.isMemLoc()) { 242 // f64/i64 is passed on the stack. 243 int FI = MFI.CreateFixedObject(8, VA.getLocMemOffset(), /*Immutable=*/true); 244 SDValue FIN = DAG.getFrameIndex(FI, MVT::i32); 245 return DAG.getLoad(VA.getValVT(), DL, Chain, FIN, 246 MachinePointerInfo::getFixedStack(MF, FI)); 247 } 248 249 assert(VA.isRegLoc() && "Expected register VA assignment"); 250 251 Register LoVReg = RegInfo.createVirtualRegister(&CSKY::GPRRegClass); 252 RegInfo.addLiveIn(VA.getLocReg(), LoVReg); 253 SDValue Lo = DAG.getCopyFromReg(Chain, DL, LoVReg, MVT::i32); 254 SDValue Hi; 255 if (VA.getLocReg() == CSKY::R3) { 256 // Second half of f64/i64 is passed on the stack. 257 int FI = MFI.CreateFixedObject(4, 0, /*Immutable=*/true); 258 SDValue FIN = DAG.getFrameIndex(FI, MVT::i32); 259 Hi = DAG.getLoad(MVT::i32, DL, Chain, FIN, 260 MachinePointerInfo::getFixedStack(MF, FI)); 261 } else { 262 // Second half of f64/i64 is passed in another GPR. 263 Register HiVReg = RegInfo.createVirtualRegister(&CSKY::GPRRegClass); 264 RegInfo.addLiveIn(VA.getLocReg() + 1, HiVReg); 265 Hi = DAG.getCopyFromReg(Chain, DL, HiVReg, MVT::i32); 266 } 267 return DAG.getNode(CSKYISD::BITCAST_FROM_LOHI, DL, VA.getValVT(), Lo, Hi); 268 } 269 270 // Transform physical registers into virtual registers. 271 SDValue CSKYTargetLowering::LowerFormalArguments( 272 SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, 273 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, 274 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const { 275 276 switch (CallConv) { 277 default: 278 report_fatal_error("Unsupported calling convention"); 279 case CallingConv::C: 280 case CallingConv::Fast: 281 break; 282 } 283 284 MachineFunction &MF = DAG.getMachineFunction(); 285 286 // Used with vargs to acumulate store chains. 287 std::vector<SDValue> OutChains; 288 289 // Assign locations to all of the incoming arguments. 290 SmallVector<CCValAssign, 16> ArgLocs; 291 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); 292 293 CCInfo.AnalyzeFormalArguments(Ins, CCAssignFnForCall(CallConv, IsVarArg)); 294 295 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 296 CCValAssign &VA = ArgLocs[i]; 297 SDValue ArgValue; 298 299 bool IsF64OnCSKY = VA.getLocVT() == MVT::i32 && VA.getValVT() == MVT::f64; 300 301 if (IsF64OnCSKY) 302 ArgValue = unpack64(DAG, Chain, VA, DL); 303 else if (VA.isRegLoc()) 304 ArgValue = unpackFromRegLoc(Subtarget, DAG, Chain, VA, DL); 305 else 306 ArgValue = unpackFromMemLoc(DAG, Chain, VA, DL); 307 308 InVals.push_back(ArgValue); 309 } 310 311 if (IsVarArg) { 312 const unsigned XLenInBytes = 4; 313 const MVT XLenVT = MVT::i32; 314 315 ArrayRef<MCPhysReg> ArgRegs = makeArrayRef(GPRArgRegs); 316 unsigned Idx = CCInfo.getFirstUnallocated(ArgRegs); 317 const TargetRegisterClass *RC = &CSKY::GPRRegClass; 318 MachineFrameInfo &MFI = MF.getFrameInfo(); 319 MachineRegisterInfo &RegInfo = MF.getRegInfo(); 320 CSKYMachineFunctionInfo *CSKYFI = MF.getInfo<CSKYMachineFunctionInfo>(); 321 322 // Offset of the first variable argument from stack pointer, and size of 323 // the vararg save area. For now, the varargs save area is either zero or 324 // large enough to hold a0-a4. 325 int VaArgOffset, VarArgsSaveSize; 326 327 // If all registers are allocated, then all varargs must be passed on the 328 // stack and we don't need to save any argregs. 329 if (ArgRegs.size() == Idx) { 330 VaArgOffset = CCInfo.getNextStackOffset(); 331 VarArgsSaveSize = 0; 332 } else { 333 VarArgsSaveSize = XLenInBytes * (ArgRegs.size() - Idx); 334 VaArgOffset = -VarArgsSaveSize; 335 } 336 337 // Record the frame index of the first variable argument 338 // which is a value necessary to VASTART. 339 int FI = MFI.CreateFixedObject(XLenInBytes, VaArgOffset, true); 340 CSKYFI->setVarArgsFrameIndex(FI); 341 342 // Copy the integer registers that may have been used for passing varargs 343 // to the vararg save area. 344 for (unsigned I = Idx; I < ArgRegs.size(); 345 ++I, VaArgOffset += XLenInBytes) { 346 const Register Reg = RegInfo.createVirtualRegister(RC); 347 RegInfo.addLiveIn(ArgRegs[I], Reg); 348 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, Reg, XLenVT); 349 FI = MFI.CreateFixedObject(XLenInBytes, VaArgOffset, true); 350 SDValue PtrOff = DAG.getFrameIndex(FI, getPointerTy(DAG.getDataLayout())); 351 SDValue Store = DAG.getStore(Chain, DL, ArgValue, PtrOff, 352 MachinePointerInfo::getFixedStack(MF, FI)); 353 cast<StoreSDNode>(Store.getNode()) 354 ->getMemOperand() 355 ->setValue((Value *)nullptr); 356 OutChains.push_back(Store); 357 } 358 CSKYFI->setVarArgsSaveSize(VarArgsSaveSize); 359 } 360 361 // All stores are grouped in one node to allow the matching between 362 // the size of Ins and InVals. This only happens for vararg functions. 363 if (!OutChains.empty()) { 364 OutChains.push_back(Chain); 365 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, OutChains); 366 } 367 368 return Chain; 369 } 370 371 bool CSKYTargetLowering::CanLowerReturn( 372 CallingConv::ID CallConv, MachineFunction &MF, bool IsVarArg, 373 const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const { 374 SmallVector<CCValAssign, 16> CSKYLocs; 375 CCState CCInfo(CallConv, IsVarArg, MF, CSKYLocs, Context); 376 return CCInfo.CheckReturn(Outs, CCAssignFnForReturn(CallConv, IsVarArg)); 377 } 378 379 SDValue 380 CSKYTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv, 381 bool IsVarArg, 382 const SmallVectorImpl<ISD::OutputArg> &Outs, 383 const SmallVectorImpl<SDValue> &OutVals, 384 const SDLoc &DL, SelectionDAG &DAG) const { 385 // Stores the assignment of the return value to a location. 386 SmallVector<CCValAssign, 16> CSKYLocs; 387 388 // Info about the registers and stack slot. 389 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), CSKYLocs, 390 *DAG.getContext()); 391 CCInfo.AnalyzeReturn(Outs, CCAssignFnForReturn(CallConv, IsVarArg)); 392 393 SDValue Glue; 394 SmallVector<SDValue, 4> RetOps(1, Chain); 395 396 // Copy the result values into the output registers. 397 for (unsigned i = 0, e = CSKYLocs.size(); i < e; ++i) { 398 SDValue Val = OutVals[i]; 399 CCValAssign &VA = CSKYLocs[i]; 400 assert(VA.isRegLoc() && "Can only return in registers!"); 401 402 bool IsF64OnCSKY = VA.getLocVT() == MVT::i32 && VA.getValVT() == MVT::f64; 403 404 if (IsF64OnCSKY) { 405 406 assert(VA.isRegLoc() && "Expected return via registers"); 407 SDValue Split64 = DAG.getNode(CSKYISD::BITCAST_TO_LOHI, DL, 408 DAG.getVTList(MVT::i32, MVT::i32), Val); 409 SDValue Lo = Split64.getValue(0); 410 SDValue Hi = Split64.getValue(1); 411 412 Register RegLo = VA.getLocReg(); 413 assert(RegLo < CSKY::R31 && "Invalid register pair"); 414 Register RegHi = RegLo + 1; 415 416 Chain = DAG.getCopyToReg(Chain, DL, RegLo, Lo, Glue); 417 Glue = Chain.getValue(1); 418 RetOps.push_back(DAG.getRegister(RegLo, MVT::i32)); 419 Chain = DAG.getCopyToReg(Chain, DL, RegHi, Hi, Glue); 420 Glue = Chain.getValue(1); 421 RetOps.push_back(DAG.getRegister(RegHi, MVT::i32)); 422 } else { 423 // Handle a 'normal' return. 424 Val = convertValVTToLocVT(DAG, Val, VA, DL); 425 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Val, Glue); 426 427 // Guarantee that all emitted copies are stuck together. 428 Glue = Chain.getValue(1); 429 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); 430 } 431 } 432 433 RetOps[0] = Chain; // Update chain. 434 435 // Add the glue node if we have it. 436 if (Glue.getNode()) { 437 RetOps.push_back(Glue); 438 } 439 440 // Interrupt service routines use different return instructions. 441 if (DAG.getMachineFunction().getFunction().hasFnAttribute("interrupt")) 442 return DAG.getNode(CSKYISD::NIR, DL, MVT::Other, RetOps); 443 444 return DAG.getNode(CSKYISD::RET, DL, MVT::Other, RetOps); 445 } 446 447 // Lower a call to a callseq_start + CALL + callseq_end chain, and add input 448 // and output parameter nodes. 449 SDValue CSKYTargetLowering::LowerCall(CallLoweringInfo &CLI, 450 SmallVectorImpl<SDValue> &InVals) const { 451 SelectionDAG &DAG = CLI.DAG; 452 SDLoc &DL = CLI.DL; 453 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs; 454 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; 455 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; 456 SDValue Chain = CLI.Chain; 457 SDValue Callee = CLI.Callee; 458 bool &IsTailCall = CLI.IsTailCall; 459 CallingConv::ID CallConv = CLI.CallConv; 460 bool IsVarArg = CLI.IsVarArg; 461 EVT PtrVT = getPointerTy(DAG.getDataLayout()); 462 MVT XLenVT = MVT::i32; 463 464 MachineFunction &MF = DAG.getMachineFunction(); 465 466 // Analyze the operands of the call, assigning locations to each operand. 467 SmallVector<CCValAssign, 16> ArgLocs; 468 CCState ArgCCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); 469 470 ArgCCInfo.AnalyzeCallOperands(Outs, CCAssignFnForCall(CallConv, IsVarArg)); 471 472 // Check if it's really possible to do a tail call. 473 if (IsTailCall) 474 IsTailCall = false; // TODO: TailCallOptimization; 475 476 if (IsTailCall) 477 ++NumTailCalls; 478 else if (CLI.CB && CLI.CB->isMustTailCall()) 479 report_fatal_error("failed to perform tail call elimination on a call " 480 "site marked musttail"); 481 482 // Get a count of how many bytes are to be pushed on the stack. 483 unsigned NumBytes = ArgCCInfo.getNextStackOffset(); 484 485 // Create local copies for byval args 486 SmallVector<SDValue, 8> ByValArgs; 487 for (unsigned i = 0, e = Outs.size(); i != e; ++i) { 488 ISD::ArgFlagsTy Flags = Outs[i].Flags; 489 if (!Flags.isByVal()) 490 continue; 491 492 SDValue Arg = OutVals[i]; 493 unsigned Size = Flags.getByValSize(); 494 Align Alignment = Flags.getNonZeroByValAlign(); 495 496 int FI = 497 MF.getFrameInfo().CreateStackObject(Size, Alignment, /*isSS=*/false); 498 SDValue FIPtr = DAG.getFrameIndex(FI, getPointerTy(DAG.getDataLayout())); 499 SDValue SizeNode = DAG.getConstant(Size, DL, XLenVT); 500 501 Chain = DAG.getMemcpy(Chain, DL, FIPtr, Arg, SizeNode, Alignment, 502 /*IsVolatile=*/false, 503 /*AlwaysInline=*/false, IsTailCall, 504 MachinePointerInfo(), MachinePointerInfo()); 505 ByValArgs.push_back(FIPtr); 506 } 507 508 if (!IsTailCall) 509 Chain = DAG.getCALLSEQ_START(Chain, NumBytes, 0, CLI.DL); 510 511 // Copy argument values to their designated locations. 512 SmallVector<std::pair<Register, SDValue>, 8> RegsToPass; 513 SmallVector<SDValue, 8> MemOpChains; 514 SDValue StackPtr; 515 for (unsigned i = 0, j = 0, e = ArgLocs.size(); i != e; ++i) { 516 CCValAssign &VA = ArgLocs[i]; 517 SDValue ArgValue = OutVals[i]; 518 ISD::ArgFlagsTy Flags = Outs[i].Flags; 519 520 bool IsF64OnCSKY = VA.getLocVT() == MVT::i32 && VA.getValVT() == MVT::f64; 521 522 if (IsF64OnCSKY && VA.isRegLoc()) { 523 SDValue Split64 = 524 DAG.getNode(CSKYISD::BITCAST_TO_LOHI, DL, 525 DAG.getVTList(MVT::i32, MVT::i32), ArgValue); 526 SDValue Lo = Split64.getValue(0); 527 SDValue Hi = Split64.getValue(1); 528 529 Register RegLo = VA.getLocReg(); 530 RegsToPass.push_back(std::make_pair(RegLo, Lo)); 531 532 if (RegLo == CSKY::R3) { 533 // Second half of f64/i64 is passed on the stack. 534 // Work out the address of the stack slot. 535 if (!StackPtr.getNode()) 536 StackPtr = DAG.getCopyFromReg(Chain, DL, CSKY::R14, PtrVT); 537 // Emit the store. 538 MemOpChains.push_back( 539 DAG.getStore(Chain, DL, Hi, StackPtr, MachinePointerInfo())); 540 } else { 541 // Second half of f64/i64 is passed in another GPR. 542 assert(RegLo < CSKY::R31 && "Invalid register pair"); 543 Register RegHigh = RegLo + 1; 544 RegsToPass.push_back(std::make_pair(RegHigh, Hi)); 545 } 546 continue; 547 } 548 549 ArgValue = convertValVTToLocVT(DAG, ArgValue, VA, DL); 550 551 // Use local copy if it is a byval arg. 552 if (Flags.isByVal()) 553 ArgValue = ByValArgs[j++]; 554 555 if (VA.isRegLoc()) { 556 // Queue up the argument copies and emit them at the end. 557 RegsToPass.push_back(std::make_pair(VA.getLocReg(), ArgValue)); 558 } else { 559 assert(VA.isMemLoc() && "Argument not register or memory"); 560 assert(!IsTailCall && "Tail call not allowed if stack is used " 561 "for passing parameters"); 562 563 // Work out the address of the stack slot. 564 if (!StackPtr.getNode()) 565 StackPtr = DAG.getCopyFromReg(Chain, DL, CSKY::R14, PtrVT); 566 SDValue Address = 567 DAG.getNode(ISD::ADD, DL, PtrVT, StackPtr, 568 DAG.getIntPtrConstant(VA.getLocMemOffset(), DL)); 569 570 // Emit the store. 571 MemOpChains.push_back( 572 DAG.getStore(Chain, DL, ArgValue, Address, MachinePointerInfo())); 573 } 574 } 575 576 // Join the stores, which are independent of one another. 577 if (!MemOpChains.empty()) 578 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, MemOpChains); 579 580 SDValue Glue; 581 582 // Build a sequence of copy-to-reg nodes, chained and glued together. 583 for (auto &Reg : RegsToPass) { 584 Chain = DAG.getCopyToReg(Chain, DL, Reg.first, Reg.second, Glue); 585 Glue = Chain.getValue(1); 586 } 587 588 SmallVector<SDValue, 8> Ops; 589 EVT Ty = getPointerTy(DAG.getDataLayout()); 590 bool IsRegCall = false; 591 592 Ops.push_back(Chain); 593 594 if (GlobalAddressSDNode *S = dyn_cast<GlobalAddressSDNode>(Callee)) { 595 const GlobalValue *GV = S->getGlobal(); 596 bool IsLocal = 597 getTargetMachine().shouldAssumeDSOLocal(*GV->getParent(), GV); 598 599 if (isPositionIndependent() || !Subtarget.has2E3()) { 600 IsRegCall = true; 601 Ops.push_back(getAddr<GlobalAddressSDNode, true>(S, DAG, IsLocal)); 602 } else { 603 Ops.push_back(getTargetNode(cast<GlobalAddressSDNode>(Callee), DL, Ty, 604 DAG, CSKYII::MO_None)); 605 Ops.push_back(getTargetConstantPoolValue( 606 cast<GlobalAddressSDNode>(Callee), Ty, DAG, CSKYII::MO_None)); 607 } 608 } else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee)) { 609 bool IsLocal = getTargetMachine().shouldAssumeDSOLocal( 610 *MF.getFunction().getParent(), nullptr); 611 612 if (isPositionIndependent() || !Subtarget.has2E3()) { 613 IsRegCall = true; 614 Ops.push_back(getAddr<ExternalSymbolSDNode, true>(S, DAG, IsLocal)); 615 } else { 616 Ops.push_back(getTargetNode(cast<ExternalSymbolSDNode>(Callee), DL, Ty, 617 DAG, CSKYII::MO_None)); 618 Ops.push_back(getTargetConstantPoolValue( 619 cast<ExternalSymbolSDNode>(Callee), Ty, DAG, CSKYII::MO_None)); 620 } 621 } else { 622 IsRegCall = true; 623 Ops.push_back(Callee); 624 } 625 626 // Add argument registers to the end of the list so that they are 627 // known live into the call. 628 for (auto &Reg : RegsToPass) 629 Ops.push_back(DAG.getRegister(Reg.first, Reg.second.getValueType())); 630 631 if (!IsTailCall) { 632 // Add a register mask operand representing the call-preserved registers. 633 const TargetRegisterInfo *TRI = Subtarget.getRegisterInfo(); 634 const uint32_t *Mask = TRI->getCallPreservedMask(MF, CallConv); 635 assert(Mask && "Missing call preserved mask for calling convention"); 636 Ops.push_back(DAG.getRegisterMask(Mask)); 637 } 638 639 // Glue the call to the argument copies, if any. 640 if (Glue.getNode()) 641 Ops.push_back(Glue); 642 643 // Emit the call. 644 SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue); 645 646 if (IsTailCall) { 647 MF.getFrameInfo().setHasTailCall(); 648 return DAG.getNode(IsRegCall ? CSKYISD::TAILReg : CSKYISD::TAIL, DL, 649 NodeTys, Ops); 650 } 651 652 Chain = DAG.getNode(IsRegCall ? CSKYISD::CALLReg : CSKYISD::CALL, DL, NodeTys, 653 Ops); 654 DAG.addNoMergeSiteInfo(Chain.getNode(), CLI.NoMerge); 655 Glue = Chain.getValue(1); 656 657 // Mark the end of the call, which is glued to the call itself. 658 Chain = DAG.getCALLSEQ_END(Chain, DAG.getConstant(NumBytes, DL, PtrVT, true), 659 DAG.getConstant(0, DL, PtrVT, true), Glue, DL); 660 Glue = Chain.getValue(1); 661 662 // Assign locations to each value returned by this call. 663 SmallVector<CCValAssign, 16> CSKYLocs; 664 CCState RetCCInfo(CallConv, IsVarArg, MF, CSKYLocs, *DAG.getContext()); 665 RetCCInfo.AnalyzeCallResult(Ins, CCAssignFnForReturn(CallConv, IsVarArg)); 666 667 // Copy all of the result registers out of their specified physreg. 668 for (auto &VA : CSKYLocs) { 669 // Copy the value out 670 SDValue RetValue = 671 DAG.getCopyFromReg(Chain, DL, VA.getLocReg(), VA.getLocVT(), Glue); 672 // Glue the RetValue to the end of the call sequence 673 Chain = RetValue.getValue(1); 674 Glue = RetValue.getValue(2); 675 676 bool IsF64OnCSKY = VA.getLocVT() == MVT::i32 && VA.getValVT() == MVT::f64; 677 678 if (IsF64OnCSKY) { 679 assert(VA.getLocReg() == GPRArgRegs[0] && "Unexpected reg assignment"); 680 SDValue RetValue2 = 681 DAG.getCopyFromReg(Chain, DL, GPRArgRegs[1], MVT::i32, Glue); 682 Chain = RetValue2.getValue(1); 683 Glue = RetValue2.getValue(2); 684 RetValue = DAG.getNode(CSKYISD::BITCAST_FROM_LOHI, DL, VA.getValVT(), 685 RetValue, RetValue2); 686 } 687 688 RetValue = convertLocVTToValVT(DAG, RetValue, VA, DL); 689 690 InVals.push_back(RetValue); 691 } 692 693 return Chain; 694 } 695 696 CCAssignFn *CSKYTargetLowering::CCAssignFnForReturn(CallingConv::ID CC, 697 bool IsVarArg) const { 698 if (IsVarArg || !Subtarget.useHardFloatABI()) 699 return RetCC_CSKY_ABIV2_SOFT; 700 else 701 return RetCC_CSKY_ABIV2_FP; 702 } 703 704 CCAssignFn *CSKYTargetLowering::CCAssignFnForCall(CallingConv::ID CC, 705 bool IsVarArg) const { 706 if (IsVarArg || !Subtarget.useHardFloatABI()) 707 return CC_CSKY_ABIV2_SOFT; 708 else 709 return CC_CSKY_ABIV2_FP; 710 } 711 712 static CSKYCP::CSKYCPModifier getModifier(unsigned Flags) { 713 714 if (Flags == CSKYII::MO_ADDR32) 715 return CSKYCP::ADDR; 716 else if (Flags == CSKYII::MO_GOT32) 717 return CSKYCP::GOT; 718 else if (Flags == CSKYII::MO_GOTOFF) 719 return CSKYCP::GOTOFF; 720 else if (Flags == CSKYII::MO_PLT32) 721 return CSKYCP::PLT; 722 else if (Flags == CSKYII::MO_None) 723 return CSKYCP::NO_MOD; 724 else 725 assert(0 && "unknown CSKYII Modifier"); 726 return CSKYCP::NO_MOD; 727 } 728 729 SDValue CSKYTargetLowering::getTargetConstantPoolValue(GlobalAddressSDNode *N, 730 EVT Ty, 731 SelectionDAG &DAG, 732 unsigned Flags) const { 733 CSKYConstantPoolValue *CPV = CSKYConstantPoolConstant::Create( 734 N->getGlobal(), CSKYCP::CPValue, 0, getModifier(Flags), false); 735 736 return DAG.getTargetConstantPool(CPV, Ty); 737 } 738 739 static MachineBasicBlock * 740 emitSelectPseudo(MachineInstr &MI, MachineBasicBlock *BB, unsigned Opcode) { 741 742 const TargetInstrInfo &TII = *BB->getParent()->getSubtarget().getInstrInfo(); 743 DebugLoc DL = MI.getDebugLoc(); 744 745 // To "insert" a SELECT instruction, we actually have to insert the 746 // diamond control-flow pattern. The incoming instruction knows the 747 // destination vreg to set, the condition code register to branch on, the 748 // true/false values to select between, and a branch opcode to use. 749 const BasicBlock *LLVM_BB = BB->getBasicBlock(); 750 MachineFunction::iterator It = ++BB->getIterator(); 751 752 // thisMBB: 753 // ... 754 // TrueVal = ... 755 // bt32 c, sinkMBB 756 // fallthrough --> copyMBB 757 MachineBasicBlock *thisMBB = BB; 758 MachineFunction *F = BB->getParent(); 759 MachineBasicBlock *copyMBB = F->CreateMachineBasicBlock(LLVM_BB); 760 MachineBasicBlock *sinkMBB = F->CreateMachineBasicBlock(LLVM_BB); 761 F->insert(It, copyMBB); 762 F->insert(It, sinkMBB); 763 764 // Transfer the remainder of BB and its successor edges to sinkMBB. 765 sinkMBB->splice(sinkMBB->begin(), BB, 766 std::next(MachineBasicBlock::iterator(MI)), BB->end()); 767 sinkMBB->transferSuccessorsAndUpdatePHIs(BB); 768 769 // Next, add the true and fallthrough blocks as its successors. 770 BB->addSuccessor(copyMBB); 771 BB->addSuccessor(sinkMBB); 772 773 // bt32 condition, sinkMBB 774 BuildMI(BB, DL, TII.get(Opcode)) 775 .addReg(MI.getOperand(1).getReg()) 776 .addMBB(sinkMBB); 777 778 // copyMBB: 779 // %FalseValue = ... 780 // # fallthrough to sinkMBB 781 BB = copyMBB; 782 783 // Update machine-CFG edges 784 BB->addSuccessor(sinkMBB); 785 786 // sinkMBB: 787 // %Result = phi [ %TrueValue, thisMBB ], [ %FalseValue, copyMBB ] 788 // ... 789 BB = sinkMBB; 790 791 BuildMI(*BB, BB->begin(), DL, TII.get(CSKY::PHI), MI.getOperand(0).getReg()) 792 .addReg(MI.getOperand(2).getReg()) 793 .addMBB(thisMBB) 794 .addReg(MI.getOperand(3).getReg()) 795 .addMBB(copyMBB); 796 797 MI.eraseFromParent(); // The pseudo instruction is gone now. 798 799 return BB; 800 } 801 802 MachineBasicBlock * 803 CSKYTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI, 804 MachineBasicBlock *BB) const { 805 switch (MI.getOpcode()) { 806 default: 807 llvm_unreachable("Unexpected instr type to insert"); 808 case CSKY::ISEL32: 809 return emitSelectPseudo(MI, BB, CSKY::BT32); 810 case CSKY::ISEL16: 811 return emitSelectPseudo(MI, BB, CSKY::BT16); 812 } 813 } 814 815 SDValue CSKYTargetLowering::getTargetConstantPoolValue(ExternalSymbolSDNode *N, 816 EVT Ty, 817 SelectionDAG &DAG, 818 unsigned Flags) const { 819 CSKYConstantPoolValue *CPV = 820 CSKYConstantPoolSymbol::Create(Type::getInt32Ty(*DAG.getContext()), 821 N->getSymbol(), 0, getModifier(Flags)); 822 823 return DAG.getTargetConstantPool(CPV, Ty); 824 } 825 826 SDValue CSKYTargetLowering::getTargetConstantPoolValue(JumpTableSDNode *N, 827 EVT Ty, 828 SelectionDAG &DAG, 829 unsigned Flags) const { 830 CSKYConstantPoolValue *CPV = 831 CSKYConstantPoolJT::Create(Type::getInt32Ty(*DAG.getContext()), 832 N->getIndex(), 0, getModifier(Flags)); 833 return DAG.getTargetConstantPool(CPV, Ty); 834 } 835 836 SDValue CSKYTargetLowering::getTargetConstantPoolValue(BlockAddressSDNode *N, 837 EVT Ty, 838 SelectionDAG &DAG, 839 unsigned Flags) const { 840 CSKYConstantPoolValue *CPV = CSKYConstantPoolConstant::Create( 841 N->getBlockAddress(), CSKYCP::CPBlockAddress, 0, getModifier(Flags), 842 false); 843 return DAG.getTargetConstantPool(CPV, Ty); 844 } 845 846 SDValue CSKYTargetLowering::getTargetNode(GlobalAddressSDNode *N, SDLoc DL, 847 EVT Ty, SelectionDAG &DAG, 848 unsigned Flags) const { 849 return DAG.getTargetGlobalAddress(N->getGlobal(), DL, Ty, 0, Flags); 850 } 851 852 SDValue CSKYTargetLowering::getTargetNode(ExternalSymbolSDNode *N, SDLoc DL, 853 EVT Ty, SelectionDAG &DAG, 854 unsigned Flags) const { 855 return DAG.getTargetExternalSymbol(N->getSymbol(), Ty, Flags); 856 } 857 858 SDValue CSKYTargetLowering::getTargetNode(JumpTableSDNode *N, SDLoc DL, EVT Ty, 859 SelectionDAG &DAG, 860 unsigned Flags) const { 861 return DAG.getTargetJumpTable(N->getIndex(), Ty, Flags); 862 } 863 864 SDValue CSKYTargetLowering::getTargetNode(BlockAddressSDNode *N, SDLoc DL, 865 EVT Ty, SelectionDAG &DAG, 866 unsigned Flags) const { 867 return DAG.getTargetBlockAddress(N->getBlockAddress(), Ty, N->getOffset(), 868 Flags); 869 } 870 871 const char *CSKYTargetLowering::getTargetNodeName(unsigned Opcode) const { 872 switch (Opcode) { 873 default: 874 llvm_unreachable("unknown CSKYISD node"); 875 case CSKYISD::NIE: 876 return "CSKYISD::NIE"; 877 case CSKYISD::NIR: 878 return "CSKYISD::NIR"; 879 case CSKYISD::RET: 880 return "CSKYISD::RET"; 881 case CSKYISD::CALL: 882 return "CSKYISD::CALL"; 883 case CSKYISD::CALLReg: 884 return "CSKYISD::CALLReg"; 885 case CSKYISD::TAIL: 886 return "CSKYISD::TAIL"; 887 case CSKYISD::TAILReg: 888 return "CSKYISD::TAILReg"; 889 case CSKYISD::LOAD_ADDR: 890 return "CSKYISD::LOAD_ADDR"; 891 case CSKYISD::BITCAST_TO_LOHI: 892 return "CSKYISD::BITCAST_TO_LOHI"; 893 case CSKYISD::BITCAST_FROM_LOHI: 894 return "CSKYISD::BITCAST_FROM_LOHI"; 895 } 896 } 897 898 SDValue CSKYTargetLowering::LowerGlobalAddress(SDValue Op, 899 SelectionDAG &DAG) const { 900 SDLoc DL(Op); 901 EVT Ty = Op.getValueType(); 902 GlobalAddressSDNode *N = cast<GlobalAddressSDNode>(Op); 903 int64_t Offset = N->getOffset(); 904 905 const GlobalValue *GV = N->getGlobal(); 906 bool IsLocal = getTargetMachine().shouldAssumeDSOLocal(*GV->getParent(), GV); 907 SDValue Addr = getAddr<GlobalAddressSDNode, false>(N, DAG, IsLocal); 908 909 // In order to maximise the opportunity for common subexpression elimination, 910 // emit a separate ADD node for the global address offset instead of folding 911 // it in the global address node. Later peephole optimisations may choose to 912 // fold it back in when profitable. 913 if (Offset != 0) 914 return DAG.getNode(ISD::ADD, DL, Ty, Addr, 915 DAG.getConstant(Offset, DL, MVT::i32)); 916 return Addr; 917 } 918 919 SDValue CSKYTargetLowering::LowerExternalSymbol(SDValue Op, 920 SelectionDAG &DAG) const { 921 ExternalSymbolSDNode *N = cast<ExternalSymbolSDNode>(Op); 922 923 return getAddr(N, DAG, false); 924 } 925 926 SDValue CSKYTargetLowering::LowerJumpTable(SDValue Op, 927 SelectionDAG &DAG) const { 928 JumpTableSDNode *N = cast<JumpTableSDNode>(Op); 929 930 return getAddr<JumpTableSDNode, false>(N, DAG); 931 } 932 933 SDValue CSKYTargetLowering::LowerBlockAddress(SDValue Op, 934 SelectionDAG &DAG) const { 935 BlockAddressSDNode *N = cast<BlockAddressSDNode>(Op); 936 937 return getAddr(N, DAG); 938 } 939 940 SDValue CSKYTargetLowering::LowerVASTART(SDValue Op, SelectionDAG &DAG) const { 941 MachineFunction &MF = DAG.getMachineFunction(); 942 CSKYMachineFunctionInfo *FuncInfo = MF.getInfo<CSKYMachineFunctionInfo>(); 943 944 SDLoc DL(Op); 945 SDValue FI = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), 946 getPointerTy(MF.getDataLayout())); 947 948 // vastart just stores the address of the VarArgsFrameIndex slot into the 949 // memory location argument. 950 const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue(); 951 return DAG.getStore(Op.getOperand(0), DL, FI, Op.getOperand(1), 952 MachinePointerInfo(SV)); 953 } 954 955 SDValue CSKYTargetLowering::LowerFRAMEADDR(SDValue Op, 956 SelectionDAG &DAG) const { 957 const CSKYRegisterInfo &RI = *Subtarget.getRegisterInfo(); 958 MachineFunction &MF = DAG.getMachineFunction(); 959 MachineFrameInfo &MFI = MF.getFrameInfo(); 960 MFI.setFrameAddressIsTaken(true); 961 962 EVT VT = Op.getValueType(); 963 SDLoc dl(Op); 964 unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue(); 965 Register FrameReg = RI.getFrameRegister(MF); 966 SDValue FrameAddr = DAG.getCopyFromReg(DAG.getEntryNode(), dl, FrameReg, VT); 967 while (Depth--) 968 FrameAddr = DAG.getLoad(VT, dl, DAG.getEntryNode(), FrameAddr, 969 MachinePointerInfo()); 970 return FrameAddr; 971 } 972 973 SDValue CSKYTargetLowering::LowerRETURNADDR(SDValue Op, 974 SelectionDAG &DAG) const { 975 const CSKYRegisterInfo &RI = *Subtarget.getRegisterInfo(); 976 MachineFunction &MF = DAG.getMachineFunction(); 977 MachineFrameInfo &MFI = MF.getFrameInfo(); 978 MFI.setReturnAddressIsTaken(true); 979 980 if (verifyReturnAddressArgumentIsConstant(Op, DAG)) 981 return SDValue(); 982 983 EVT VT = Op.getValueType(); 984 SDLoc dl(Op); 985 unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue(); 986 if (Depth) { 987 SDValue FrameAddr = LowerFRAMEADDR(Op, DAG); 988 SDValue Offset = DAG.getConstant(4, dl, MVT::i32); 989 return DAG.getLoad(VT, dl, DAG.getEntryNode(), 990 DAG.getNode(ISD::ADD, dl, VT, FrameAddr, Offset), 991 MachinePointerInfo()); 992 } 993 // Return the value of the return address register, marking it an implicit 994 // live-in. 995 unsigned Reg = MF.addLiveIn(RI.getRARegister(), getRegClassFor(MVT::i32)); 996 return DAG.getCopyFromReg(DAG.getEntryNode(), dl, Reg, VT); 997 } 998 999 Register CSKYTargetLowering::getExceptionPointerRegister( 1000 const Constant *PersonalityFn) const { 1001 return CSKY::R0; 1002 } 1003 1004 Register CSKYTargetLowering::getExceptionSelectorRegister( 1005 const Constant *PersonalityFn) const { 1006 return CSKY::R1; 1007 } 1008