1 //===-- BPFMCCodeEmitter.cpp - Convert BPF code to machine code -----------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file implements the BPFMCCodeEmitter class. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #include "MCTargetDesc/BPFMCTargetDesc.h" 14 #include "llvm/ADT/SmallVector.h" 15 #include "llvm/MC/MCCodeEmitter.h" 16 #include "llvm/MC/MCExpr.h" 17 #include "llvm/MC/MCFixup.h" 18 #include "llvm/MC/MCInst.h" 19 #include "llvm/MC/MCInstrInfo.h" 20 #include "llvm/MC/MCRegisterInfo.h" 21 #include "llvm/MC/MCSubtargetInfo.h" 22 #include "llvm/Support/Endian.h" 23 #include "llvm/Support/EndianStream.h" 24 #include <cassert> 25 #include <cstdint> 26 27 using namespace llvm; 28 29 #define DEBUG_TYPE "mccodeemitter" 30 31 namespace { 32 33 class BPFMCCodeEmitter : public MCCodeEmitter { 34 const MCInstrInfo &MCII; 35 const MCRegisterInfo &MRI; 36 bool IsLittleEndian; 37 38 public: 39 BPFMCCodeEmitter(const MCInstrInfo &mcii, const MCRegisterInfo &mri, 40 bool IsLittleEndian) 41 : MCII(mcii), MRI(mri), IsLittleEndian(IsLittleEndian) {} 42 BPFMCCodeEmitter(const BPFMCCodeEmitter &) = delete; 43 void operator=(const BPFMCCodeEmitter &) = delete; 44 ~BPFMCCodeEmitter() override = default; 45 46 // getBinaryCodeForInstr - TableGen'erated function for getting the 47 // binary encoding for an instruction. 48 uint64_t getBinaryCodeForInstr(const MCInst &MI, 49 SmallVectorImpl<MCFixup> &Fixups, 50 const MCSubtargetInfo &STI) const; 51 52 // getMachineOpValue - Return binary encoding of operand. If the machin 53 // operand requires relocation, record the relocation and return zero. 54 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO, 55 SmallVectorImpl<MCFixup> &Fixups, 56 const MCSubtargetInfo &STI) const; 57 58 uint64_t getMemoryOpValue(const MCInst &MI, unsigned Op, 59 SmallVectorImpl<MCFixup> &Fixups, 60 const MCSubtargetInfo &STI) const; 61 62 void encodeInstruction(const MCInst &MI, raw_ostream &OS, 63 SmallVectorImpl<MCFixup> &Fixups, 64 const MCSubtargetInfo &STI) const override; 65 }; 66 67 } // end anonymous namespace 68 69 MCCodeEmitter *llvm::createBPFMCCodeEmitter(const MCInstrInfo &MCII, 70 MCContext &Ctx) { 71 return new BPFMCCodeEmitter(MCII, *Ctx.getRegisterInfo(), true); 72 } 73 74 MCCodeEmitter *llvm::createBPFbeMCCodeEmitter(const MCInstrInfo &MCII, 75 MCContext &Ctx) { 76 return new BPFMCCodeEmitter(MCII, *Ctx.getRegisterInfo(), false); 77 } 78 79 unsigned BPFMCCodeEmitter::getMachineOpValue(const MCInst &MI, 80 const MCOperand &MO, 81 SmallVectorImpl<MCFixup> &Fixups, 82 const MCSubtargetInfo &STI) const { 83 if (MO.isReg()) 84 return MRI.getEncodingValue(MO.getReg()); 85 if (MO.isImm()) 86 return static_cast<unsigned>(MO.getImm()); 87 88 assert(MO.isExpr()); 89 90 const MCExpr *Expr = MO.getExpr(); 91 92 assert(Expr->getKind() == MCExpr::SymbolRef); 93 94 if (MI.getOpcode() == BPF::JAL) 95 // func call name 96 Fixups.push_back(MCFixup::create(0, Expr, FK_PCRel_4)); 97 else if (MI.getOpcode() == BPF::LD_imm64) 98 Fixups.push_back(MCFixup::create(0, Expr, FK_SecRel_8)); 99 else 100 // bb label 101 Fixups.push_back(MCFixup::create(0, Expr, FK_PCRel_2)); 102 103 return 0; 104 } 105 106 static uint8_t SwapBits(uint8_t Val) 107 { 108 return (Val & 0x0F) << 4 | (Val & 0xF0) >> 4; 109 } 110 111 void BPFMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS, 112 SmallVectorImpl<MCFixup> &Fixups, 113 const MCSubtargetInfo &STI) const { 114 unsigned Opcode = MI.getOpcode(); 115 support::endian::Writer OSE(OS, 116 IsLittleEndian ? support::little : support::big); 117 118 if (Opcode == BPF::LD_imm64 || Opcode == BPF::LD_pseudo) { 119 uint64_t Value = getBinaryCodeForInstr(MI, Fixups, STI); 120 OS << char(Value >> 56); 121 if (IsLittleEndian) 122 OS << char((Value >> 48) & 0xff); 123 else 124 OS << char(SwapBits((Value >> 48) & 0xff)); 125 OSE.write<uint16_t>(0); 126 OSE.write<uint32_t>(Value & 0xffffFFFF); 127 128 const MCOperand &MO = MI.getOperand(1); 129 uint64_t Imm = MO.isImm() ? MO.getImm() : 0; 130 OSE.write<uint8_t>(0); 131 OSE.write<uint8_t>(0); 132 OSE.write<uint16_t>(0); 133 OSE.write<uint32_t>(Imm >> 32); 134 } else { 135 // Get instruction encoding and emit it 136 uint64_t Value = getBinaryCodeForInstr(MI, Fixups, STI); 137 OS << char(Value >> 56); 138 if (IsLittleEndian) 139 OS << char((Value >> 48) & 0xff); 140 else 141 OS << char(SwapBits((Value >> 48) & 0xff)); 142 OSE.write<uint16_t>((Value >> 32) & 0xffff); 143 OSE.write<uint32_t>(Value & 0xffffFFFF); 144 } 145 } 146 147 // Encode BPF Memory Operand 148 uint64_t BPFMCCodeEmitter::getMemoryOpValue(const MCInst &MI, unsigned Op, 149 SmallVectorImpl<MCFixup> &Fixups, 150 const MCSubtargetInfo &STI) const { 151 // For CMPXCHG instructions, output is implicitly in R0/W0, 152 // so memory operand starts from operand 0. 153 int MemOpStartIndex = 1, Opcode = MI.getOpcode(); 154 if (Opcode == BPF::CMPXCHGW32 || Opcode == BPF::CMPXCHGD) 155 MemOpStartIndex = 0; 156 157 uint64_t Encoding; 158 const MCOperand Op1 = MI.getOperand(MemOpStartIndex); 159 assert(Op1.isReg() && "First operand is not register."); 160 Encoding = MRI.getEncodingValue(Op1.getReg()); 161 Encoding <<= 16; 162 MCOperand Op2 = MI.getOperand(MemOpStartIndex + 1); 163 assert(Op2.isImm() && "Second operand is not immediate."); 164 Encoding |= Op2.getImm() & 0xffff; 165 return Encoding; 166 } 167 168 #include "BPFGenMCCodeEmitter.inc" 169