1 //===-- BPFMCCodeEmitter.cpp - Convert BPF code to machine code -----------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements the BPFMCCodeEmitter class. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "MCTargetDesc/BPFMCTargetDesc.h" 15 #include "llvm/MC/MCCodeEmitter.h" 16 #include "llvm/MC/MCFixup.h" 17 #include "llvm/MC/MCInst.h" 18 #include "llvm/MC/MCInstrInfo.h" 19 #include "llvm/MC/MCRegisterInfo.h" 20 #include "llvm/MC/MCSubtargetInfo.h" 21 #include "llvm/MC/MCSymbol.h" 22 #include "llvm/ADT/Statistic.h" 23 #include "llvm/Support/EndianStream.h" 24 #include "llvm/Support/raw_ostream.h" 25 using namespace llvm; 26 27 #define DEBUG_TYPE "mccodeemitter" 28 29 namespace { 30 class BPFMCCodeEmitter : public MCCodeEmitter { 31 BPFMCCodeEmitter(const BPFMCCodeEmitter &) = delete; 32 void operator=(const BPFMCCodeEmitter &) = delete; 33 const MCInstrInfo &MCII; 34 const MCRegisterInfo &MRI; 35 bool IsLittleEndian; 36 37 public: 38 BPFMCCodeEmitter(const MCInstrInfo &mcii, const MCRegisterInfo &mri, 39 bool IsLittleEndian) 40 : MCII(mcii), MRI(mri), IsLittleEndian(IsLittleEndian) {} 41 42 ~BPFMCCodeEmitter() {} 43 44 // getBinaryCodeForInstr - TableGen'erated function for getting the 45 // binary encoding for an instruction. 46 uint64_t getBinaryCodeForInstr(const MCInst &MI, 47 SmallVectorImpl<MCFixup> &Fixups, 48 const MCSubtargetInfo &STI) const; 49 50 // getMachineOpValue - Return binary encoding of operand. If the machin 51 // operand requires relocation, record the relocation and return zero. 52 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO, 53 SmallVectorImpl<MCFixup> &Fixups, 54 const MCSubtargetInfo &STI) const; 55 56 uint64_t getMemoryOpValue(const MCInst &MI, unsigned Op, 57 SmallVectorImpl<MCFixup> &Fixups, 58 const MCSubtargetInfo &STI) const; 59 60 void encodeInstruction(const MCInst &MI, raw_ostream &OS, 61 SmallVectorImpl<MCFixup> &Fixups, 62 const MCSubtargetInfo &STI) const override; 63 64 private: 65 uint64_t computeAvailableFeatures(const FeatureBitset &FB) const; 66 void verifyInstructionPredicates(const MCInst &MI, 67 uint64_t AvailableFeatures) const; 68 }; 69 } 70 71 MCCodeEmitter *llvm::createBPFMCCodeEmitter(const MCInstrInfo &MCII, 72 const MCRegisterInfo &MRI, 73 MCContext &Ctx) { 74 return new BPFMCCodeEmitter(MCII, MRI, true); 75 } 76 77 MCCodeEmitter *llvm::createBPFbeMCCodeEmitter(const MCInstrInfo &MCII, 78 const MCRegisterInfo &MRI, 79 MCContext &Ctx) { 80 return new BPFMCCodeEmitter(MCII, MRI, false); 81 } 82 83 unsigned BPFMCCodeEmitter::getMachineOpValue(const MCInst &MI, 84 const MCOperand &MO, 85 SmallVectorImpl<MCFixup> &Fixups, 86 const MCSubtargetInfo &STI) const { 87 if (MO.isReg()) 88 return MRI.getEncodingValue(MO.getReg()); 89 if (MO.isImm()) 90 return static_cast<unsigned>(MO.getImm()); 91 92 assert(MO.isExpr()); 93 94 const MCExpr *Expr = MO.getExpr(); 95 96 assert(Expr->getKind() == MCExpr::SymbolRef); 97 98 if (MI.getOpcode() == BPF::JAL) 99 // func call name 100 Fixups.push_back(MCFixup::create(0, Expr, FK_SecRel_4)); 101 else if (MI.getOpcode() == BPF::LD_imm64) 102 Fixups.push_back(MCFixup::create(0, Expr, FK_SecRel_8)); 103 else 104 // bb label 105 Fixups.push_back(MCFixup::create(0, Expr, FK_PCRel_2)); 106 107 return 0; 108 } 109 110 static uint8_t SwapBits(uint8_t Val) 111 { 112 return (Val & 0x0F) << 4 | (Val & 0xF0) >> 4; 113 } 114 115 void BPFMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS, 116 SmallVectorImpl<MCFixup> &Fixups, 117 const MCSubtargetInfo &STI) const { 118 verifyInstructionPredicates(MI, 119 computeAvailableFeatures(STI.getFeatureBits())); 120 121 unsigned Opcode = MI.getOpcode(); 122 support::endian::Writer<support::little> LE(OS); 123 support::endian::Writer<support::big> BE(OS); 124 125 if (Opcode == BPF::LD_imm64 || Opcode == BPF::LD_pseudo) { 126 uint64_t Value = getBinaryCodeForInstr(MI, Fixups, STI); 127 LE.write<uint8_t>(Value >> 56); 128 if (IsLittleEndian) 129 LE.write<uint8_t>((Value >> 48) & 0xff); 130 else 131 LE.write<uint8_t>(SwapBits((Value >> 48) & 0xff)); 132 LE.write<uint16_t>(0); 133 if (IsLittleEndian) 134 LE.write<uint32_t>(Value & 0xffffFFFF); 135 else 136 BE.write<uint32_t>(Value & 0xffffFFFF); 137 138 const MCOperand &MO = MI.getOperand(1); 139 uint64_t Imm = MO.isImm() ? MO.getImm() : 0; 140 LE.write<uint8_t>(0); 141 LE.write<uint8_t>(0); 142 LE.write<uint16_t>(0); 143 if (IsLittleEndian) 144 LE.write<uint32_t>(Imm >> 32); 145 else 146 BE.write<uint32_t>(Imm >> 32); 147 } else { 148 // Get instruction encoding and emit it 149 uint64_t Value = getBinaryCodeForInstr(MI, Fixups, STI); 150 LE.write<uint8_t>(Value >> 56); 151 if (IsLittleEndian) { 152 LE.write<uint8_t>((Value >> 48) & 0xff); 153 LE.write<uint16_t>((Value >> 32) & 0xffff); 154 LE.write<uint32_t>(Value & 0xffffFFFF); 155 } else { 156 LE.write<uint8_t>(SwapBits((Value >> 48) & 0xff)); 157 BE.write<uint16_t>((Value >> 32) & 0xffff); 158 BE.write<uint32_t>(Value & 0xffffFFFF); 159 } 160 } 161 } 162 163 // Encode BPF Memory Operand 164 uint64_t BPFMCCodeEmitter::getMemoryOpValue(const MCInst &MI, unsigned Op, 165 SmallVectorImpl<MCFixup> &Fixups, 166 const MCSubtargetInfo &STI) const { 167 uint64_t Encoding; 168 const MCOperand Op1 = MI.getOperand(1); 169 assert(Op1.isReg() && "First operand is not register."); 170 Encoding = MRI.getEncodingValue(Op1.getReg()); 171 Encoding <<= 16; 172 MCOperand Op2 = MI.getOperand(2); 173 assert(Op2.isImm() && "Second operand is not immediate."); 174 Encoding |= Op2.getImm() & 0xffff; 175 return Encoding; 176 } 177 178 #define ENABLE_INSTR_PREDICATE_VERIFIER 179 #include "BPFGenMCCodeEmitter.inc" 180