1 //===-- BPFMCCodeEmitter.cpp - Convert BPF code to machine code -----------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the BPFMCCodeEmitter class.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "MCTargetDesc/BPFMCTargetDesc.h"
15 #include "llvm/MC/MCCodeEmitter.h"
16 #include "llvm/MC/MCFixup.h"
17 #include "llvm/MC/MCInst.h"
18 #include "llvm/MC/MCInstrInfo.h"
19 #include "llvm/MC/MCRegisterInfo.h"
20 #include "llvm/MC/MCSubtargetInfo.h"
21 #include "llvm/MC/MCSymbol.h"
22 #include "llvm/ADT/Statistic.h"
23 #include "llvm/Support/raw_ostream.h"
24 using namespace llvm;
25 
26 #define DEBUG_TYPE "mccodeemitter"
27 
28 namespace {
29 class BPFMCCodeEmitter : public MCCodeEmitter {
30   BPFMCCodeEmitter(const BPFMCCodeEmitter &) = delete;
31   void operator=(const BPFMCCodeEmitter &) = delete;
32   const MCRegisterInfo &MRI;
33 
34 public:
35   BPFMCCodeEmitter(const MCRegisterInfo &mri) : MRI(mri) {}
36 
37   ~BPFMCCodeEmitter() {}
38 
39   // getBinaryCodeForInstr - TableGen'erated function for getting the
40   // binary encoding for an instruction.
41   uint64_t getBinaryCodeForInstr(const MCInst &MI,
42                                  SmallVectorImpl<MCFixup> &Fixups,
43                                  const MCSubtargetInfo &STI) const;
44 
45   // getMachineOpValue - Return binary encoding of operand. If the machin
46   // operand requires relocation, record the relocation and return zero.
47   unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
48                              SmallVectorImpl<MCFixup> &Fixups,
49                              const MCSubtargetInfo &STI) const;
50 
51   uint64_t getMemoryOpValue(const MCInst &MI, unsigned Op,
52                             SmallVectorImpl<MCFixup> &Fixups,
53                             const MCSubtargetInfo &STI) const;
54 
55   void encodeInstruction(const MCInst &MI, raw_ostream &OS,
56                          SmallVectorImpl<MCFixup> &Fixups,
57                          const MCSubtargetInfo &STI) const override;
58 };
59 }
60 
61 MCCodeEmitter *llvm::createBPFMCCodeEmitter(const MCInstrInfo &MCII,
62                                             const MCRegisterInfo &MRI,
63                                             MCContext &Ctx) {
64   return new BPFMCCodeEmitter(MRI);
65 }
66 
67 unsigned BPFMCCodeEmitter::getMachineOpValue(const MCInst &MI,
68                                              const MCOperand &MO,
69                                              SmallVectorImpl<MCFixup> &Fixups,
70                                              const MCSubtargetInfo &STI) const {
71   if (MO.isReg())
72     return MRI.getEncodingValue(MO.getReg());
73   if (MO.isImm())
74     return static_cast<unsigned>(MO.getImm());
75 
76   assert(MO.isExpr());
77 
78   const MCExpr *Expr = MO.getExpr();
79 
80   assert(Expr->getKind() == MCExpr::SymbolRef);
81 
82   if (MI.getOpcode() == BPF::JAL)
83     // func call name
84     Fixups.push_back(MCFixup::create(0, Expr, FK_SecRel_4));
85   else if (MI.getOpcode() == BPF::LD_imm64)
86     Fixups.push_back(MCFixup::create(0, Expr, FK_SecRel_8));
87   else
88     // bb label
89     Fixups.push_back(MCFixup::create(0, Expr, FK_PCRel_2));
90 
91   return 0;
92 }
93 
94 void BPFMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
95                                          SmallVectorImpl<MCFixup> &Fixups,
96                                          const MCSubtargetInfo &STI) const {
97   unsigned Opcode = MI.getOpcode();
98   support::endian::Writer<support::little> LE(OS);
99 
100   if (Opcode == BPF::LD_imm64 || Opcode == BPF::LD_pseudo) {
101     uint64_t Value = getBinaryCodeForInstr(MI, Fixups, STI);
102     LE.write<uint8_t>(Value >> 56);
103     LE.write<uint8_t>(((Value >> 48) & 0xff));
104     LE.write<uint16_t>(0);
105     LE.write<uint32_t>(Value & 0xffffFFFF);
106 
107     const MCOperand &MO = MI.getOperand(1);
108     uint64_t Imm = MO.isImm() ? MO.getImm() : 0;
109     LE.write<uint8_t>(0);
110     LE.write<uint8_t>(0);
111     LE.write<uint16_t>(0);
112     LE.write<uint32_t>(Imm >> 32);
113   } else {
114     // Get instruction encoding and emit it
115     uint64_t Value = getBinaryCodeForInstr(MI, Fixups, STI);
116     LE.write<uint8_t>(Value >> 56);
117     LE.write<uint8_t>((Value >> 48) & 0xff);
118     LE.write<uint16_t>((Value >> 32) & 0xffff);
119     LE.write<uint32_t>(Value & 0xffffFFFF);
120   }
121 }
122 
123 // Encode BPF Memory Operand
124 uint64_t BPFMCCodeEmitter::getMemoryOpValue(const MCInst &MI, unsigned Op,
125                                             SmallVectorImpl<MCFixup> &Fixups,
126                                             const MCSubtargetInfo &STI) const {
127   uint64_t Encoding;
128   const MCOperand Op1 = MI.getOperand(1);
129   assert(Op1.isReg() && "First operand is not register.");
130   Encoding = MRI.getEncodingValue(Op1.getReg());
131   Encoding <<= 16;
132   MCOperand Op2 = MI.getOperand(2);
133   assert(Op2.isImm() && "Second operand is not immediate.");
134   Encoding |= Op2.getImm() & 0xffff;
135   return Encoding;
136 }
137 
138 #include "BPFGenMCCodeEmitter.inc"
139