1 //===-- BPFMCCodeEmitter.cpp - Convert BPF code to machine code -----------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements the BPFMCCodeEmitter class. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "MCTargetDesc/BPFMCTargetDesc.h" 15 #include "llvm/MC/MCCodeEmitter.h" 16 #include "llvm/MC/MCFixup.h" 17 #include "llvm/MC/MCInst.h" 18 #include "llvm/MC/MCInstrInfo.h" 19 #include "llvm/MC/MCRegisterInfo.h" 20 #include "llvm/MC/MCSubtargetInfo.h" 21 #include "llvm/MC/MCSymbol.h" 22 #include "llvm/ADT/Statistic.h" 23 #include "llvm/Support/raw_ostream.h" 24 using namespace llvm; 25 26 #define DEBUG_TYPE "mccodeemitter" 27 28 namespace { 29 class BPFMCCodeEmitter : public MCCodeEmitter { 30 BPFMCCodeEmitter(const BPFMCCodeEmitter &) = delete; 31 void operator=(const BPFMCCodeEmitter &) = delete; 32 const MCRegisterInfo &MRI; 33 34 public: 35 BPFMCCodeEmitter(const MCRegisterInfo &mri) : MRI(mri) {} 36 37 ~BPFMCCodeEmitter() {} 38 39 // getBinaryCodeForInstr - TableGen'erated function for getting the 40 // binary encoding for an instruction. 41 uint64_t getBinaryCodeForInstr(const MCInst &MI, 42 SmallVectorImpl<MCFixup> &Fixups, 43 const MCSubtargetInfo &STI) const; 44 45 // getMachineOpValue - Return binary encoding of operand. If the machin 46 // operand requires relocation, record the relocation and return zero. 47 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO, 48 SmallVectorImpl<MCFixup> &Fixups, 49 const MCSubtargetInfo &STI) const; 50 51 uint64_t getMemoryOpValue(const MCInst &MI, unsigned Op, 52 SmallVectorImpl<MCFixup> &Fixups, 53 const MCSubtargetInfo &STI) const; 54 55 void EncodeInstruction(const MCInst &MI, raw_ostream &OS, 56 SmallVectorImpl<MCFixup> &Fixups, 57 const MCSubtargetInfo &STI) const override; 58 }; 59 } 60 61 MCCodeEmitter *llvm::createBPFMCCodeEmitter(const MCInstrInfo &MCII, 62 const MCRegisterInfo &MRI, 63 MCContext &Ctx) { 64 return new BPFMCCodeEmitter(MRI); 65 } 66 67 unsigned BPFMCCodeEmitter::getMachineOpValue(const MCInst &MI, 68 const MCOperand &MO, 69 SmallVectorImpl<MCFixup> &Fixups, 70 const MCSubtargetInfo &STI) const { 71 if (MO.isReg()) 72 return MRI.getEncodingValue(MO.getReg()); 73 if (MO.isImm()) 74 return static_cast<unsigned>(MO.getImm()); 75 76 assert(MO.isExpr()); 77 78 const MCExpr *Expr = MO.getExpr(); 79 MCExpr::ExprKind Kind = Expr->getKind(); 80 81 assert(Kind == MCExpr::SymbolRef); 82 83 if (MI.getOpcode() == BPF::JAL) 84 // func call name 85 Fixups.push_back(MCFixup::Create(0, Expr, FK_SecRel_4)); 86 else if (MI.getOpcode() == BPF::LD_imm64) 87 Fixups.push_back(MCFixup::Create(0, Expr, FK_SecRel_8)); 88 else 89 // bb label 90 Fixups.push_back(MCFixup::Create(0, Expr, FK_PCRel_2)); 91 92 return 0; 93 } 94 95 // Emit one byte through output stream 96 void EmitByte(unsigned char C, unsigned &CurByte, raw_ostream &OS) { 97 OS << (char)C; 98 ++CurByte; 99 } 100 101 // Emit a series of bytes (little endian) 102 void EmitLEConstant(uint64_t Val, unsigned Size, unsigned &CurByte, 103 raw_ostream &OS) { 104 assert(Size <= 8 && "size too big in emit constant"); 105 106 for (unsigned i = 0; i != Size; ++i) { 107 EmitByte(Val & 255, CurByte, OS); 108 Val >>= 8; 109 } 110 } 111 112 // Emit a series of bytes (big endian) 113 void EmitBEConstant(uint64_t Val, unsigned Size, unsigned &CurByte, 114 raw_ostream &OS) { 115 assert(Size <= 8 && "size too big in emit constant"); 116 117 for (int i = (Size - 1) * 8; i >= 0; i -= 8) 118 EmitByte((Val >> i) & 255, CurByte, OS); 119 } 120 121 void BPFMCCodeEmitter::EncodeInstruction(const MCInst &MI, raw_ostream &OS, 122 SmallVectorImpl<MCFixup> &Fixups, 123 const MCSubtargetInfo &STI) const { 124 unsigned Opcode = MI.getOpcode(); 125 // Keep track of the current byte being emitted 126 unsigned CurByte = 0; 127 128 if (Opcode == BPF::LD_imm64 || Opcode == BPF::LD_pseudo) { 129 uint64_t Value = getBinaryCodeForInstr(MI, Fixups, STI); 130 EmitByte(Value >> 56, CurByte, OS); 131 EmitByte(((Value >> 48) & 0xff), CurByte, OS); 132 EmitLEConstant(0, 2, CurByte, OS); 133 EmitLEConstant(Value & 0xffffFFFF, 4, CurByte, OS); 134 135 const MCOperand &MO = MI.getOperand(1); 136 uint64_t Imm = MO.isImm() ? MO.getImm() : 0; 137 EmitByte(0, CurByte, OS); 138 EmitByte(0, CurByte, OS); 139 EmitLEConstant(0, 2, CurByte, OS); 140 EmitLEConstant(Imm >> 32, 4, CurByte, OS); 141 } else { 142 // Get instruction encoding and emit it 143 uint64_t Value = getBinaryCodeForInstr(MI, Fixups, STI); 144 EmitByte(Value >> 56, CurByte, OS); 145 EmitByte((Value >> 48) & 0xff, CurByte, OS); 146 EmitLEConstant((Value >> 32) & 0xffff, 2, CurByte, OS); 147 EmitLEConstant(Value & 0xffffFFFF, 4, CurByte, OS); 148 } 149 } 150 151 // Encode BPF Memory Operand 152 uint64_t BPFMCCodeEmitter::getMemoryOpValue(const MCInst &MI, unsigned Op, 153 SmallVectorImpl<MCFixup> &Fixups, 154 const MCSubtargetInfo &STI) const { 155 uint64_t Encoding; 156 const MCOperand Op1 = MI.getOperand(1); 157 assert(Op1.isReg() && "First operand is not register."); 158 Encoding = MRI.getEncodingValue(Op1.getReg()); 159 Encoding <<= 16; 160 MCOperand Op2 = MI.getOperand(2); 161 assert(Op2.isImm() && "Second operand is not immediate."); 162 Encoding |= Op2.getImm() & 0xffff; 163 return Encoding; 164 } 165 166 #include "BPFGenMCCodeEmitter.inc" 167