1 //===-- AVRTargetMachine.cpp - Define TargetMachine for AVR ---------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines the AVR specific subclass of TargetMachine.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "AVRTargetMachine.h"
15 
16 #include "llvm/CodeGen/Passes.h"
17 #include "llvm/CodeGen/TargetPassConfig.h"
18 #include "llvm/IR/Module.h"
19 #include "llvm/IR/LegacyPassManager.h"
20 #include "llvm/Support/TargetRegistry.h"
21 
22 #include "AVRTargetObjectFile.h"
23 #include "AVR.h"
24 #include "MCTargetDesc/AVRMCTargetDesc.h"
25 
26 namespace llvm {
27 
28 /// Processes a CPU name.
29 static StringRef getTargetCPU(StringRef CPU) {
30   if (CPU.empty() || CPU == "generic") {
31     return "avr2";
32   }
33 
34   return CPU;
35 }
36 
37 AVRTargetMachine::AVRTargetMachine(const Target &T, const Triple &TT,
38                                    StringRef CPU, StringRef FS,
39                                    const TargetOptions &Options,
40                                    Reloc::Model RM, CodeModel::Model CM,
41                                    CodeGenOpt::Level OL)
42     : LLVMTargetMachine(
43           T, "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8-i64:8:8-f32:8:8-f64:8:8-n8", TT,
44           getTargetCPU(CPU), FS, Options, RM, CM, OL),
45       SubTarget(TT, GetTargetCPU(CPU), FS, *this) {
46   this->TLOF = make_unique<AVRTargetObjectFile>();
47   initAsmInfo();
48 }
49 
50 namespace {
51 /// AVR Code Generator Pass Configuration Options.
52 class AVRPassConfig : public TargetPassConfig {
53 public:
54   AVRPassConfig(AVRTargetMachine *TM, PassManagerBase &PM)
55       : TargetPassConfig(TM, PM) {}
56 
57   AVRTargetMachine &getAVRTargetMachine() const {
58     return getTM<AVRTargetMachine>();
59   }
60 
61   bool addInstSelector() override;
62   void addPreSched2() override;
63   void addPreRegAlloc() override;
64   void addPreEmitPass() override;
65 };
66 } // namespace
67 
68 TargetPassConfig *AVRTargetMachine::createPassConfig(PassManagerBase &PM) {
69   return new AVRPassConfig(this, PM);
70 }
71 
72 extern "C" void LLVMInitializeAVRTarget() {
73   // Register the target.
74   RegisterTargetMachine<AVRTargetMachine> X(TheAVRTarget);
75 }
76 
77 const AVRSubtarget *AVRTargetMachine::getSubtargetImpl() const {
78   return &SubTarget;
79 }
80 
81 const AVRSubtarget *AVRTargetMachine::getSubtargetImpl(const Function &) const {
82   return &SubTarget;
83 }
84 
85 //===----------------------------------------------------------------------===//
86 // Pass Pipeline Configuration
87 //===----------------------------------------------------------------------===//
88 
89 bool AVRPassConfig::addInstSelector() {
90   return false;
91 }
92 
93 void AVRPassConfig::addPreRegAlloc() {
94 }
95 
96 void AVRPassConfig::addPreSched2() { }
97 
98 void AVRPassConfig::addPreEmitPass() {
99 }
100 
101 } // end of namespace llvm
102