1 //===-- ARMBaseInfo.cpp - ARM Base encoding information------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file provides basic encoding and assembly information for ARM. 11 // 12 //===----------------------------------------------------------------------===// 13 #include "ARMBaseInfo.h" 14 #include "llvm/ADT/ArrayRef.h" 15 #include "llvm/ADT/SmallVector.h" 16 #include "llvm/ADT/StringExtras.h" 17 #include "llvm/Support/Regex.h" 18 19 using namespace llvm; 20 namespace llvm { 21 namespace ARMSysReg { 22 23 // lookup system register using 12-bit SYSm value. 24 // Note: the search is uniqued using M1 mask 25 const MClassSysReg *lookupMClassSysRegBy12bitSYSmValue(unsigned SYSm) { 26 return lookupMClassSysRegByM1Encoding12(SYSm); 27 } 28 29 // returns APSR with _<bits> qualifier. 30 // Note: ARMv7-M deprecates using MSR APSR without a _<bits> qualifier 31 const MClassSysReg *lookupMClassSysRegAPSRNonDeprecated(unsigned SYSm) { 32 return lookupMClassSysRegByM2M3Encoding8((1<<9)|(SYSm & 0xFF)); 33 } 34 35 // lookup system registers using 8-bit SYSm value 36 const MClassSysReg *lookupMClassSysRegBy8bitSYSmValue(unsigned SYSm) { 37 return ARMSysReg::lookupMClassSysRegByM2M3Encoding8((1<<8)|(SYSm & 0xFF)); 38 } 39 40 #define GET_MCLASSSYSREG_IMPL 41 #include "ARMGenSystemRegister.inc" 42 43 } 44 } 45