1 //===- Thumb2InstrInfo.cpp - Thumb-2 Instruction Information --------*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the Thumb-2 implementation of the TargetInstrInfo class.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "ARMInstrInfo.h"
15 #include "ARM.h"
16 #include "ARMGenInstrInfo.inc"
17 #include "ARMMachineFunctionInfo.h"
18 #include "llvm/CodeGen/MachineFrameInfo.h"
19 #include "llvm/CodeGen/MachineInstrBuilder.h"
20 #include "llvm/ADT/SmallVector.h"
21 #include "Thumb2InstrInfo.h"
22 
23 using namespace llvm;
24 
25 Thumb2InstrInfo::Thumb2InstrInfo(const ARMSubtarget &STI)
26   : ARMBaseInstrInfo(STI), RI(*this, STI) {
27 }
28 
29 unsigned Thumb2InstrInfo::
30 getUnindexedOpcode(unsigned Opc) const {
31   // FIXME
32   return 0;
33 }
34 
35 unsigned Thumb2InstrInfo::
36 getOpcode(ARMII::Op Op) const {
37   switch (Op) {
38   case ARMII::ADDri: return ARM::t2ADDri;
39   case ARMII::ADDrs: return ARM::t2ADDrs;
40   case ARMII::ADDrr: return ARM::t2ADDrr;
41   case ARMII::B: return ARM::t2B;
42   case ARMII::Bcc: return ARM::t2Bcc;
43   case ARMII::BR_JTr: return ARM::t2BR_JTr;
44   case ARMII::BR_JTm: return ARM::t2BR_JTm;
45   case ARMII::BR_JTadd: return ARM::t2BR_JTadd;
46   case ARMII::BX_RET: return ARM::t2BX_RET;
47   case ARMII::FCPYS: return ARM::FCPYS;
48   case ARMII::FCPYD: return ARM::FCPYD;
49   case ARMII::FLDD: return ARM::FLDD;
50   case ARMII::FLDS: return ARM::FLDS;
51   case ARMII::FSTD: return ARM::FSTD;
52   case ARMII::FSTS: return ARM::FSTS;
53   case ARMII::LDR: return ARM::LDR;   // FIXME
54   case ARMII::MOVr: return ARM::t2MOVr;
55   case ARMII::STR: return ARM::STR;   // FIXME
56   case ARMII::SUBri: return ARM::t2SUBri;
57   case ARMII::SUBrs: return ARM::t2SUBrs;
58   case ARMII::SUBrr: return ARM::t2SUBrr;
59   case ARMII::VMOVD: return ARM::VMOVD;
60   case ARMII::VMOVQ: return ARM::VMOVQ;
61   default:
62     break;
63   }
64 
65   return 0;
66 }
67 
68 bool
69 Thumb2InstrInfo::BlockHasNoFallThrough(const MachineBasicBlock &MBB) const {
70   if (MBB.empty()) return false;
71 
72   // FIXME
73   switch (MBB.back().getOpcode()) {
74   case ARM::t2BX_RET:
75     //  case ARM::LDM_RET:
76   case ARM::t2B:        // Uncond branch.
77   case ARM::t2BR_JTr:   // Jumptable branch.
78   case ARM::t2BR_JTm:   // Jumptable branch through mem.
79   case ARM::t2BR_JTadd: // Jumptable branch add to pc.
80     return true;
81   case ARM::tBX_RET:
82   case ARM::tBX_RET_vararg:
83   case ARM::tPOP_RET:
84   case ARM::tB:
85   case ARM::tBR_JTr:
86     return true;
87   default:
88     break;
89   }
90 
91   return false;
92 }
93