1 //===-- MVEVPTBlockPass.cpp - Insert MVE VPT blocks -----------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "ARM.h"
10 #include "ARMMachineFunctionInfo.h"
11 #include "ARMSubtarget.h"
12 #include "MCTargetDesc/ARMBaseInfo.h"
13 #include "Thumb2InstrInfo.h"
14 #include "llvm/ADT/SmallSet.h"
15 #include "llvm/ADT/SmallVector.h"
16 #include "llvm/ADT/Statistic.h"
17 #include "llvm/ADT/StringRef.h"
18 #include "llvm/CodeGen/MachineBasicBlock.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/MachineFunctionPass.h"
21 #include "llvm/CodeGen/MachineInstr.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineInstrBundle.h"
24 #include "llvm/CodeGen/MachineOperand.h"
25 #include "llvm/IR/DebugLoc.h"
26 #include "llvm/MC/MCInstrDesc.h"
27 #include "llvm/MC/MCRegisterInfo.h"
28 #include "llvm/Support/Debug.h"
29 #include <cassert>
30 #include <new>
31 
32 using namespace llvm;
33 
34 #define DEBUG_TYPE "arm-mve-vpt"
35 
36 namespace {
37   class MVEVPTBlock : public MachineFunctionPass {
38   public:
39     static char ID;
40     const Thumb2InstrInfo *TII;
41     const TargetRegisterInfo *TRI;
42 
43     MVEVPTBlock() : MachineFunctionPass(ID) {}
44 
45     bool runOnMachineFunction(MachineFunction &Fn) override;
46 
47     MachineFunctionProperties getRequiredProperties() const override {
48       return MachineFunctionProperties().set(
49           MachineFunctionProperties::Property::NoVRegs);
50     }
51 
52     StringRef getPassName() const override {
53       return "MVE VPT block insertion pass";
54     }
55 
56   private:
57     bool InsertVPTBlocks(MachineBasicBlock &MBB);
58   };
59 
60   char MVEVPTBlock::ID = 0;
61 
62 } // end anonymous namespace
63 
64 INITIALIZE_PASS(MVEVPTBlock, DEBUG_TYPE, "ARM MVE VPT block pass", false, false)
65 
66 static MachineInstr *findVCMPToFoldIntoVPST(MachineBasicBlock::iterator MI,
67                                             const TargetRegisterInfo *TRI,
68                                             unsigned &NewOpcode) {
69   // Search backwards to the instruction that defines VPR. This may or not
70   // be a VCMP, we check that after this loop. If we find another instruction
71   // that reads cpsr, we return nullptr.
72   MachineBasicBlock::iterator CmpMI = MI;
73   while (CmpMI != MI->getParent()->begin()) {
74     --CmpMI;
75     if (CmpMI->modifiesRegister(ARM::VPR, TRI))
76       break;
77     if (CmpMI->readsRegister(ARM::VPR, TRI))
78       break;
79   }
80 
81   if (CmpMI == MI)
82     return nullptr;
83   NewOpcode = VCMPOpcodeToVPT(CmpMI->getOpcode());
84   if (NewOpcode == 0)
85     return nullptr;
86 
87   // Search forward from CmpMI to MI, checking if either register was def'd
88   if (registerDefinedBetween(CmpMI->getOperand(1).getReg(), std::next(CmpMI),
89                              MI, TRI))
90     return nullptr;
91   if (registerDefinedBetween(CmpMI->getOperand(2).getReg(), std::next(CmpMI),
92                              MI, TRI))
93     return nullptr;
94   return &*CmpMI;
95 }
96 
97 bool MVEVPTBlock::InsertVPTBlocks(MachineBasicBlock &Block) {
98   bool Modified = false;
99   MachineBasicBlock::instr_iterator MBIter = Block.instr_begin();
100   MachineBasicBlock::instr_iterator EndIter = Block.instr_end();
101 
102   while (MBIter != EndIter) {
103     MachineInstr *MI = &*MBIter;
104     unsigned PredReg = 0;
105     DebugLoc dl = MI->getDebugLoc();
106 
107     ARMVCC::VPTCodes Pred = getVPTInstrPredicate(*MI, PredReg);
108 
109     // The idea of the predicate is that None, Then and Else are for use when
110     // handling assembly language: they correspond to the three possible
111     // suffixes "", "t" and "e" on the mnemonic. So when instructions are read
112     // from assembly source or disassembled from object code, you expect to see
113     // a mixture whenever there's a long VPT block. But in code generation, we
114     // hope we'll never generate an Else as input to this pass.
115     assert(Pred != ARMVCC::Else && "VPT block pass does not expect Else preds");
116 
117     if (Pred == ARMVCC::None) {
118       ++MBIter;
119       continue;
120     }
121 
122     LLVM_DEBUG(dbgs() << "VPT block created for: "; MI->dump());
123     int VPTInstCnt = 1;
124     ARMVCC::VPTCodes NextPred;
125 
126     // Look at subsequent instructions, checking if they can be in the same VPT
127     // block.
128     ++MBIter;
129     while (MBIter != EndIter && VPTInstCnt < 4) {
130       NextPred = getVPTInstrPredicate(*MBIter, PredReg);
131       assert(NextPred != ARMVCC::Else &&
132              "VPT block pass does not expect Else preds");
133       if (NextPred != Pred)
134         break;
135       LLVM_DEBUG(dbgs() << "  adding : "; MBIter->dump());
136       ++VPTInstCnt;
137       ++MBIter;
138     };
139 
140     unsigned BlockMask = getARMVPTBlockMask(VPTInstCnt);
141 
142     // Search back for a VCMP that can be folded to create a VPT, or else create
143     // a VPST directly
144     MachineInstrBuilder MIBuilder;
145     unsigned NewOpcode;
146     MachineInstr *VCMP = findVCMPToFoldIntoVPST(MI, TRI, NewOpcode);
147     if (VCMP) {
148       LLVM_DEBUG(dbgs() << "  folding VCMP into VPST: "; VCMP->dump());
149       MIBuilder = BuildMI(Block, MI, dl, TII->get(NewOpcode));
150       MIBuilder.addImm(BlockMask);
151       MIBuilder.add(VCMP->getOperand(1));
152       MIBuilder.add(VCMP->getOperand(2));
153       MIBuilder.add(VCMP->getOperand(3));
154       VCMP->eraseFromParent();
155     } else {
156       MIBuilder = BuildMI(Block, MI, dl, TII->get(ARM::MVE_VPST));
157       MIBuilder.addImm(BlockMask);
158     }
159 
160     finalizeBundle(
161         Block, MachineBasicBlock::instr_iterator(MIBuilder.getInstr()), MBIter);
162 
163     Modified = true;
164   }
165   return Modified;
166 }
167 
168 bool MVEVPTBlock::runOnMachineFunction(MachineFunction &Fn) {
169   const ARMSubtarget &STI =
170       static_cast<const ARMSubtarget &>(Fn.getSubtarget());
171 
172   if (!STI.isThumb2() || !STI.hasMVEIntegerOps())
173     return false;
174 
175   TII = static_cast<const Thumb2InstrInfo *>(STI.getInstrInfo());
176   TRI = STI.getRegisterInfo();
177 
178   LLVM_DEBUG(dbgs() << "********** ARM MVE VPT BLOCKS **********\n"
179                     << "********** Function: " << Fn.getName() << '\n');
180 
181   bool Modified = false;
182   for (MachineBasicBlock &MBB : Fn)
183     Modified |= InsertVPTBlocks(MBB);
184 
185   LLVM_DEBUG(dbgs() << "**************************************\n");
186   return Modified;
187 }
188 
189 /// createMVEVPTBlock - Returns an instance of the MVE VPT block
190 /// insertion pass.
191 FunctionPass *llvm::createMVEVPTBlockPass() { return new MVEVPTBlock(); }
192