1 //===-- ARMTargetTransformInfo.cpp - ARM specific TTI pass ----------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 /// \file
10 /// This file implements a TargetTransformInfo analysis pass specific to the
11 /// ARM target machine. It uses the target's detailed information to provide
12 /// more precise answers to certain TTI queries, while letting the target
13 /// independent and default TTI implementations handle the rest.
14 ///
15 //===----------------------------------------------------------------------===//
16 
17 #define DEBUG_TYPE "armtti"
18 #include "ARM.h"
19 #include "ARMTargetMachine.h"
20 #include "llvm/Analysis/TargetTransformInfo.h"
21 #include "llvm/Support/Debug.h"
22 #include "llvm/Target/TargetLowering.h"
23 using namespace llvm;
24 
25 // Declare the pass initialization routine locally as target-specific passes
26 // don't havve a target-wide initialization entry point, and so we rely on the
27 // pass constructor initialization.
28 namespace llvm {
29 void initializeARMTTIPass(PassRegistry &);
30 }
31 
32 namespace {
33 
34 class ARMTTI : public ImmutablePass, public TargetTransformInfo {
35   const ARMBaseTargetMachine *TM;
36   const ARMSubtarget *ST;
37 
38   /// Estimate the overhead of scalarizing an instruction. Insert and Extract
39   /// are set if the result needs to be inserted and/or extracted from vectors.
40   unsigned getScalarizationOverhead(Type *Ty, bool Insert, bool Extract) const;
41 
42 public:
43   ARMTTI() : ImmutablePass(ID), TM(0), ST(0) {
44     llvm_unreachable("This pass cannot be directly constructed");
45   }
46 
47   ARMTTI(const ARMBaseTargetMachine *TM)
48       : ImmutablePass(ID), TM(TM), ST(TM->getSubtargetImpl()) {
49     initializeARMTTIPass(*PassRegistry::getPassRegistry());
50   }
51 
52   virtual void initializePass() {
53     pushTTIStack(this);
54   }
55 
56   virtual void finalizePass() {
57     popTTIStack();
58   }
59 
60   virtual void getAnalysisUsage(AnalysisUsage &AU) const {
61     TargetTransformInfo::getAnalysisUsage(AU);
62   }
63 
64   /// Pass identification.
65   static char ID;
66 
67   /// Provide necessary pointer adjustments for the two base classes.
68   virtual void *getAdjustedAnalysisPointer(const void *ID) {
69     if (ID == &TargetTransformInfo::ID)
70       return (TargetTransformInfo*)this;
71     return this;
72   }
73 
74   /// \name Scalar TTI Implementations
75   /// @{
76 
77   virtual unsigned getIntImmCost(const APInt &Imm, Type *Ty) const;
78 
79   /// @}
80 
81 
82   /// \name Vector TTI Implementations
83   /// @{
84 
85   unsigned getNumberOfRegisters(bool Vector) const {
86     if (Vector) {
87       if (ST->hasNEON())
88         return 16;
89       return 0;
90     }
91 
92     if (ST->isThumb1Only())
93       return 8;
94     return 16;
95   }
96 
97   unsigned getRegisterBitWidth(bool Vector) const {
98     if (Vector) {
99       if (ST->hasNEON())
100         return 128;
101       return 0;
102     }
103 
104     return 32;
105   }
106 
107   unsigned getMaximumUnrollFactor() const {
108     // These are out of order CPUs:
109     if (ST->isCortexA15() || ST->isSwift())
110       return 2;
111     return 1;
112   }
113 
114   /// @}
115 };
116 
117 } // end anonymous namespace
118 
119 INITIALIZE_AG_PASS(ARMTTI, TargetTransformInfo, "armtti",
120                    "ARM Target Transform Info", true, true, false)
121 char ARMTTI::ID = 0;
122 
123 ImmutablePass *
124 llvm::createARMTargetTransformInfoPass(const ARMBaseTargetMachine *TM) {
125   return new ARMTTI(TM);
126 }
127 
128 
129 unsigned ARMTTI::getIntImmCost(const APInt &Imm, Type *Ty) const {
130   assert(Ty->isIntegerTy());
131 
132   unsigned Bits = Ty->getPrimitiveSizeInBits();
133   if (Bits == 0 || Bits > 32)
134     return 4;
135 
136   int32_t SImmVal = Imm.getSExtValue();
137   uint32_t ZImmVal = Imm.getZExtValue();
138   if (!ST->isThumb()) {
139     if ((SImmVal >= 0 && SImmVal < 65536) ||
140         (ARM_AM::getSOImmVal(ZImmVal) != -1) ||
141         (ARM_AM::getSOImmVal(~ZImmVal) != -1))
142       return 1;
143     return ST->hasV6T2Ops() ? 2 : 3;
144   } else if (ST->isThumb2()) {
145     if ((SImmVal >= 0 && SImmVal < 65536) ||
146         (ARM_AM::getT2SOImmVal(ZImmVal) != -1) ||
147         (ARM_AM::getT2SOImmVal(~ZImmVal) != -1))
148       return 1;
149     return ST->hasV6T2Ops() ? 2 : 3;
150   } else /*Thumb1*/ {
151     if (SImmVal >= 0 && SImmVal < 256)
152       return 1;
153     if ((~ZImmVal < 256) || ARM_AM::isThumbImmShiftedVal(ZImmVal))
154       return 2;
155     // Load from constantpool.
156     return 3;
157   }
158   return 2;
159 }
160