1 //===-- ARMTargetMachine.cpp - Define TargetMachine for ARM ---------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "ARMTargetMachine.h"
14 #include "ARMTargetAsmInfo.h"
15 #include "ARMFrameInfo.h"
16 #include "ARM.h"
17 #include "llvm/Module.h"
18 #include "llvm/PassManager.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/Support/CommandLine.h"
21 #include "llvm/Support/raw_ostream.h"
22 #include "llvm/Target/TargetMachineRegistry.h"
23 #include "llvm/Target/TargetOptions.h"
24 using namespace llvm;
25 
26 static cl::opt<bool> DisableLdStOpti("disable-arm-loadstore-opti", cl::Hidden,
27                               cl::desc("Disable load store optimization pass"));
28 static cl::opt<bool> DisableIfConversion("disable-arm-if-conversion",cl::Hidden,
29                               cl::desc("Disable if-conversion pass"));
30 
31 /// ARMTargetMachineModule - Note that this is used on hosts that cannot link
32 /// in a library unless there are references into the library.  In particular,
33 /// it seems that it is not possible to get things to work on Win32 without
34 /// this.  Though it is unused, do not remove it.
35 extern "C" int ARMTargetMachineModule;
36 int ARMTargetMachineModule = 0;
37 
38 // Register the target.
39 static RegisterTarget<ARMTargetMachine>   X("arm",   "ARM");
40 static RegisterTarget<ThumbTargetMachine> Y("thumb", "Thumb");
41 
42 // No assembler printer by default
43 ARMTargetMachine::AsmPrinterCtorFn ARMTargetMachine::AsmPrinterCtor = 0;
44 
45 /// ThumbTargetMachine - Create an Thumb architecture model.
46 ///
47 unsigned ThumbTargetMachine::getJITMatchQuality() {
48 #if defined(__thumb__)
49   return 10;
50 #endif
51   return 0;
52 }
53 
54 unsigned ThumbTargetMachine::getModuleMatchQuality(const Module &M) {
55   std::string TT = M.getTargetTriple();
56   // Match thumb-foo-bar, as well as things like thumbv5blah-*
57   if (TT.size() >= 6 &&
58       (TT.substr(0, 6) == "thumb-" || TT.substr(0, 6) == "thumbv"))
59     return 20;
60 
61   // If the target triple is something non-thumb, we don't match.
62   if (!TT.empty()) return 0;
63 
64   if (M.getEndianness()  == Module::LittleEndian &&
65       M.getPointerSize() == Module::Pointer32)
66     return 10;                                   // Weak match
67   else if (M.getEndianness() != Module::AnyEndianness ||
68            M.getPointerSize() != Module::AnyPointerSize)
69     return 0;                                    // Match for some other target
70 
71   return getJITMatchQuality()/2;
72 }
73 
74 ThumbTargetMachine::ThumbTargetMachine(const Module &M, const std::string &FS)
75   : ARMTargetMachine(M, FS, true) {
76 }
77 
78 /// TargetMachine ctor - Create an ARM architecture model.
79 ///
80 ARMTargetMachine::ARMTargetMachine(const Module &M, const std::string &FS,
81                                    bool isThumb)
82   : Subtarget(M, FS, isThumb),
83     DataLayout(Subtarget.isAPCS_ABI() ?
84                // APCS ABI
85           (isThumb ?
86            std::string("e-p:32:32-f64:32:32-i64:32:32-"
87                        "i16:16:32-i8:8:32-i1:8:32-a:0:32") :
88            std::string("e-p:32:32-f64:32:32-i64:32:32")) :
89                // AAPCS ABI
90           (isThumb ?
91            std::string("e-p:32:32-f64:64:64-i64:64:64-"
92                        "i16:16:32-i8:8:32-i1:8:32-a:0:32") :
93            std::string("e-p:32:32-f64:64:64-i64:64:64"))),
94     InstrInfo(Subtarget),
95     FrameInfo(Subtarget),
96     JITInfo(),
97     TLInfo(*this) {
98   DefRelocModel = getRelocationModel();
99 }
100 
101 unsigned ARMTargetMachine::getJITMatchQuality() {
102 #if defined(__arm__)
103   return 10;
104 #endif
105   return 0;
106 }
107 
108 unsigned ARMTargetMachine::getModuleMatchQuality(const Module &M) {
109   std::string TT = M.getTargetTriple();
110   // Match arm-foo-bar, as well as things like armv5blah-*
111   if (TT.size() >= 4 &&
112       (TT.substr(0, 4) == "arm-" || TT.substr(0, 4) == "armv"))
113     return 20;
114   // If the target triple is something non-arm, we don't match.
115   if (!TT.empty()) return 0;
116 
117   if (M.getEndianness()  == Module::LittleEndian &&
118       M.getPointerSize() == Module::Pointer32)
119     return 10;                                   // Weak match
120   else if (M.getEndianness() != Module::AnyEndianness ||
121            M.getPointerSize() != Module::AnyPointerSize)
122     return 0;                                    // Match for some other target
123 
124   return getJITMatchQuality()/2;
125 }
126 
127 
128 const TargetAsmInfo *ARMTargetMachine::createTargetAsmInfo() const {
129   switch (Subtarget.TargetType) {
130    case ARMSubtarget::isDarwin:
131     return new ARMDarwinTargetAsmInfo(*this);
132    case ARMSubtarget::isELF:
133     return new ARMELFTargetAsmInfo(*this);
134    default:
135     return new ARMGenericTargetAsmInfo(*this);
136   }
137 }
138 
139 
140 // Pass Pipeline Configuration
141 bool ARMTargetMachine::addInstSelector(PassManagerBase &PM,
142                                        CodeGenOpt::Level OptLevel) {
143   PM.add(createARMISelDag(*this));
144   return false;
145 }
146 
147 bool ARMTargetMachine::addPreEmitPass(PassManagerBase &PM,
148                                       CodeGenOpt::Level OptLevel) {
149   // FIXME: temporarily disabling load / store optimization pass for Thumb mode.
150   if (OptLevel != CodeGenOpt::None && !DisableLdStOpti && !Subtarget.isThumb())
151     PM.add(createARMLoadStoreOptimizationPass());
152 
153   if (OptLevel != CodeGenOpt::None &&
154       !DisableIfConversion && !Subtarget.isThumb())
155     PM.add(createIfConverterPass());
156 
157   PM.add(createARMConstantIslandPass());
158   return true;
159 }
160 
161 bool ARMTargetMachine::addAssemblyEmitter(PassManagerBase &PM,
162                                           CodeGenOpt::Level OptLevel,
163                                           bool Verbose,
164                                           raw_ostream &Out) {
165   // Output assembly language.
166   assert(AsmPrinterCtor && "AsmPrinter was not linked in");
167   if (AsmPrinterCtor)
168     PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose));
169 
170   return false;
171 }
172 
173 
174 bool ARMTargetMachine::addCodeEmitter(PassManagerBase &PM,
175                                       CodeGenOpt::Level OptLevel,
176                                       bool DumpAsm,
177                                       MachineCodeEmitter &MCE) {
178   // FIXME: Move this to TargetJITInfo!
179   if (DefRelocModel == Reloc::Default)
180     setRelocationModel(Reloc::Static);
181 
182   // Machine code emitter pass for ARM.
183   PM.add(createARMCodeEmitterPass(*this, MCE));
184   if (DumpAsm) {
185     assert(AsmPrinterCtor && "AsmPrinter was not linked in");
186     if (AsmPrinterCtor)
187       PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
188   }
189 
190   return false;
191 }
192 
193 bool ARMTargetMachine::addCodeEmitter(PassManagerBase &PM,
194                                       CodeGenOpt::Level OptLevel,
195                                       bool DumpAsm,
196                                       JITCodeEmitter &JCE) {
197   // FIXME: Move this to TargetJITInfo!
198   if (DefRelocModel == Reloc::Default)
199     setRelocationModel(Reloc::Static);
200 
201   // Machine code emitter pass for ARM.
202   PM.add(createARMJITCodeEmitterPass(*this, JCE));
203   if (DumpAsm) {
204     assert(AsmPrinterCtor && "AsmPrinter was not linked in");
205     if (AsmPrinterCtor)
206       PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
207   }
208 
209   return false;
210 }
211 
212 bool ARMTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
213                                             CodeGenOpt::Level OptLevel,
214                                             bool DumpAsm,
215                                             MachineCodeEmitter &MCE) {
216   // Machine code emitter pass for ARM.
217   PM.add(createARMCodeEmitterPass(*this, MCE));
218   if (DumpAsm) {
219     assert(AsmPrinterCtor && "AsmPrinter was not linked in");
220     if (AsmPrinterCtor)
221       PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
222   }
223 
224   return false;
225 }
226 
227 bool ARMTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
228                                             CodeGenOpt::Level OptLevel,
229                                             bool DumpAsm,
230                                             JITCodeEmitter &JCE) {
231   // Machine code emitter pass for ARM.
232   PM.add(createARMJITCodeEmitterPass(*this, JCE));
233   if (DumpAsm) {
234     assert(AsmPrinterCtor && "AsmPrinter was not linked in");
235     if (AsmPrinterCtor)
236       PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
237   }
238 
239   return false;
240 }
241 
242 
243