1 //===-- ARMOptimizeBarriersPass - two DMBs without a memory access in between, 2 //removed one -===// 3 // 4 // The LLVM Compiler Infrastructure 5 // 6 // This file is distributed under the University of Illinois Open Source 7 // License. See LICENSE.TXT for details. 8 // 9 //===------------------------------------------------------------------------------------------===// 10 11 #include "ARM.h" 12 #include "ARMInstrInfo.h" 13 #include "ARMMachineFunctionInfo.h" 14 #include "llvm/ADT/Statistic.h" 15 #include "llvm/CodeGen/MachineFunctionPass.h" 16 using namespace llvm; 17 18 #define DEBUG_TYPE "double barriers" 19 20 STATISTIC(NumDMBsRemoved, "Number of DMBs removed"); 21 22 namespace { 23 class ARMOptimizeBarriersPass : public MachineFunctionPass { 24 public: 25 static char ID; 26 ARMOptimizeBarriersPass() : MachineFunctionPass(ID) {} 27 28 bool runOnMachineFunction(MachineFunction &Fn) override; 29 30 MachineFunctionProperties getRequiredProperties() const override { 31 return MachineFunctionProperties().set( 32 MachineFunctionProperties::Property::AllVRegsAllocated); 33 } 34 35 const char *getPassName() const override { 36 return "optimise barriers pass"; 37 } 38 }; 39 char ARMOptimizeBarriersPass::ID = 0; 40 } 41 42 // Returns whether the instruction can safely move past a DMB instruction 43 // The current implementation allows this iif MI does not have any possible 44 // memory access 45 static bool CanMovePastDMB(const MachineInstr *MI) { 46 return !(MI->mayLoad() || 47 MI->mayStore() || 48 MI->hasUnmodeledSideEffects() || 49 MI->isCall() || 50 MI->isReturn()); 51 } 52 53 bool ARMOptimizeBarriersPass::runOnMachineFunction(MachineFunction &MF) { 54 // Vector to store the DMBs we will remove after the first iteration 55 std::vector<MachineInstr *> ToRemove; 56 // DMBType is the Imm value of the first operand. It determines whether it's a 57 // DMB ish, dmb sy, dmb osh, etc 58 int64_t DMBType = -1; 59 60 // Find a dmb. If we can move it until the next dmb, tag the second one for 61 // removal 62 for (auto &MBB : MF) { 63 // Will be true when we have seen a DMB, and not seen any instruction since 64 // that cannot move past a DMB 65 bool IsRemovableNextDMB = false; 66 for (auto &MI : MBB) { 67 if (MI.getOpcode() == ARM::DMB) { 68 if (IsRemovableNextDMB) { 69 // If the Imm of this DMB is the same as that of the last DMB, we can 70 // tag this second DMB for removal 71 if (MI.getOperand(0).getImm() == DMBType) { 72 ToRemove.push_back(&MI); 73 } else { 74 // If it has a different DMBType, we cannot remove it, but will scan 75 // for the next DMB, recording this DMB's type as last seen DMB type 76 DMBType = MI.getOperand(0).getImm(); 77 } 78 } else { 79 // After we see a DMB, a next one is removable 80 IsRemovableNextDMB = true; 81 DMBType = MI.getOperand(0).getImm(); 82 } 83 } else if (!CanMovePastDMB(&MI)) { 84 // If we find an instruction unable to pass past a DMB, a next DMB is 85 // not removable 86 IsRemovableNextDMB = false; 87 } 88 } 89 } 90 // Remove the tagged DMB 91 for (auto MI : ToRemove) { 92 MI->eraseFromParent(); 93 ++NumDMBsRemoved; 94 } 95 96 return NumDMBsRemoved > 0; 97 } 98 99 /// createARMOptimizeBarriersPass - Returns an instance of the remove double 100 /// barriers 101 /// pass. 102 FunctionPass *llvm::createARMOptimizeBarriersPass() { 103 return new ARMOptimizeBarriersPass(); 104 } 105