1 //===-- ARMMCInstLower.cpp - Convert ARM MachineInstr to an MCInst --------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains code to lower ARM MachineInstrs to their corresponding
11 // MCInst records.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #include "ARM.h"
16 #include "ARMAsmPrinter.h"
17 #include "MCTargetDesc/ARMMCExpr.h"
18 #include "llvm/CodeGen/MachineBasicBlock.h"
19 #include "llvm/IR/Constants.h"
20 #include "llvm/IR/Mangler.h"
21 #include "llvm/MC/MCExpr.h"
22 #include "llvm/MC/MCInst.h"
23 using namespace llvm;
24 
25 
26 MCOperand ARMAsmPrinter::GetSymbolRef(const MachineOperand &MO,
27                                       const MCSymbol *Symbol) {
28   const MCExpr *Expr;
29   unsigned Option = MO.getTargetFlags() & ARMII::MO_OPTION_MASK;
30   switch (Option) {
31   default: {
32     Expr = MCSymbolRefExpr::Create(Symbol, MCSymbolRefExpr::VK_None,
33                                    OutContext);
34     switch (Option) {
35     default: llvm_unreachable("Unknown target flag on symbol operand");
36     case 0:
37       break;
38     case ARMII::MO_LO16:
39       Expr = MCSymbolRefExpr::Create(Symbol, MCSymbolRefExpr::VK_None,
40                                      OutContext);
41       Expr = ARMMCExpr::CreateLower16(Expr, OutContext);
42       break;
43     case ARMII::MO_HI16:
44       Expr = MCSymbolRefExpr::Create(Symbol, MCSymbolRefExpr::VK_None,
45                                      OutContext);
46       Expr = ARMMCExpr::CreateUpper16(Expr, OutContext);
47       break;
48     }
49     break;
50   }
51 
52   case ARMII::MO_PLT:
53     Expr = MCSymbolRefExpr::Create(Symbol, MCSymbolRefExpr::VK_PLT,
54                                    OutContext);
55     break;
56   }
57 
58   if (!MO.isJTI() && MO.getOffset())
59     Expr = MCBinaryExpr::CreateAdd(Expr,
60                                    MCConstantExpr::Create(MO.getOffset(),
61                                                           OutContext),
62                                    OutContext);
63   return MCOperand::CreateExpr(Expr);
64 
65 }
66 
67 bool ARMAsmPrinter::lowerOperand(const MachineOperand &MO,
68                                  MCOperand &MCOp) {
69   switch (MO.getType()) {
70   default: llvm_unreachable("unknown operand type");
71   case MachineOperand::MO_Register:
72     // Ignore all non-CPSR implicit register operands.
73     if (MO.isImplicit() && MO.getReg() != ARM::CPSR)
74       return false;
75     assert(!MO.getSubReg() && "Subregs should be eliminated!");
76     MCOp = MCOperand::CreateReg(MO.getReg());
77     break;
78   case MachineOperand::MO_Immediate:
79     MCOp = MCOperand::CreateImm(MO.getImm());
80     break;
81   case MachineOperand::MO_MachineBasicBlock:
82     MCOp = MCOperand::CreateExpr(MCSymbolRefExpr::Create(
83         MO.getMBB()->getSymbol(), OutContext));
84     break;
85   case MachineOperand::MO_GlobalAddress: {
86     MCOp = GetSymbolRef(MO,
87                         GetARMGVSymbol(MO.getGlobal(), MO.getTargetFlags()));
88     break;
89   }
90   case MachineOperand::MO_ExternalSymbol:
91    MCOp = GetSymbolRef(MO,
92                         GetExternalSymbolSymbol(MO.getSymbolName()));
93     break;
94   case MachineOperand::MO_JumpTableIndex:
95     MCOp = GetSymbolRef(MO, GetJTISymbol(MO.getIndex()));
96     break;
97   case MachineOperand::MO_ConstantPoolIndex:
98     MCOp = GetSymbolRef(MO, GetCPISymbol(MO.getIndex()));
99     break;
100   case MachineOperand::MO_BlockAddress:
101     MCOp = GetSymbolRef(MO, GetBlockAddressSymbol(MO.getBlockAddress()));
102     break;
103   case MachineOperand::MO_FPImmediate: {
104     APFloat Val = MO.getFPImm()->getValueAPF();
105     bool ignored;
106     Val.convert(APFloat::IEEEdouble, APFloat::rmTowardZero, &ignored);
107     MCOp = MCOperand::CreateFPImm(Val.convertToDouble());
108     break;
109   }
110   case MachineOperand::MO_RegisterMask:
111     // Ignore call clobbers.
112     return false;
113   }
114   return true;
115 }
116 
117 void llvm::LowerARMMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
118                                         ARMAsmPrinter &AP) {
119   OutMI.setOpcode(MI->getOpcode());
120 
121   for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
122     const MachineOperand &MO = MI->getOperand(i);
123 
124     MCOperand MCOp;
125     if (AP.lowerOperand(MO, MCOp))
126       OutMI.addOperand(MCOp);
127   }
128 }
129