1 //===- ARMInstructionSelector.cpp ----------------------------*- C++ -*-==// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 /// \file 10 /// This file implements the targeting of the InstructionSelector class for ARM. 11 /// \todo This should be generated by TableGen. 12 //===----------------------------------------------------------------------===// 13 14 #include "ARMInstructionSelector.h" 15 #include "ARMRegisterBankInfo.h" 16 #include "ARMSubtarget.h" 17 #include "ARMTargetMachine.h" 18 #include "llvm/Support/Debug.h" 19 20 #define DEBUG_TYPE "arm-isel" 21 22 using namespace llvm; 23 24 #ifndef LLVM_BUILD_GLOBAL_ISEL 25 #error "You shouldn't build this" 26 #endif 27 28 ARMInstructionSelector::ARMInstructionSelector(const ARMBaseTargetMachine &TM, 29 const ARMSubtarget &STI, 30 const ARMRegisterBankInfo &RBI) 31 : InstructionSelector(), TM(TM), STI(STI), TII(*STI.getInstrInfo()), 32 TRI(*STI.getRegisterInfo()), RBI(RBI) {} 33 34 bool ARMInstructionSelector::select(llvm::MachineInstr &I) const { 35 return !isPreISelGenericOpcode(I.getOpcode()); 36 } 37