1 //===- ARMInstrInfo.cpp - ARM Instruction Information -----------*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the ARM implementation of the TargetInstrInfo class.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "ARMInstrInfo.h"
15 #include "ARM.h"
16 #include "ARMMachineFunctionInfo.h"
17 #include "MCTargetDesc/ARMAddressingModes.h"
18 #include "llvm/ADT/STLExtras.h"
19 #include "llvm/CodeGen/LiveVariables.h"
20 #include "llvm/CodeGen/MachineFrameInfo.h"
21 #include "llvm/CodeGen/MachineInstrBuilder.h"
22 #include "llvm/CodeGen/MachineJumpTableInfo.h"
23 #include "llvm/MC/MCAsmInfo.h"
24 using namespace llvm;
25 
26 ARMInstrInfo::ARMInstrInfo(const ARMSubtarget &STI)
27   : ARMBaseInstrInfo(STI), RI(*this, STI) {
28 }
29 
30 unsigned ARMInstrInfo::getUnindexedOpcode(unsigned Opc) const {
31   switch (Opc) {
32   default: break;
33   case ARM::LDR_PRE:
34   case ARM::LDR_POST_IMM:
35   case ARM::LDR_POST_REG:
36     return ARM::LDRi12;
37   case ARM::LDRH_PRE:
38   case ARM::LDRH_POST:
39     return ARM::LDRH;
40   case ARM::LDRB_PRE:
41   case ARM::LDRB_POST_IMM:
42   case ARM::LDRB_POST_REG:
43     return ARM::LDRBi12;
44   case ARM::LDRSH_PRE:
45   case ARM::LDRSH_POST:
46     return ARM::LDRSH;
47   case ARM::LDRSB_PRE:
48   case ARM::LDRSB_POST:
49     return ARM::LDRSB;
50   case ARM::STR_PRE_IMM:
51   case ARM::STR_PRE_REG:
52   case ARM::STR_POST_IMM:
53   case ARM::STR_POST_REG:
54     return ARM::STRi12;
55   case ARM::STRH_PRE:
56   case ARM::STRH_POST:
57     return ARM::STRH;
58   case ARM::STRB_PRE_IMM:
59   case ARM::STRB_PRE_REG:
60   case ARM::STRB_POST_IMM:
61   case ARM::STRB_POST_REG:
62     return ARM::STRBi12;
63   }
64 
65   return 0;
66 }
67