xref: /llvm-project-15.0.7/llvm/lib/Target/ARM/ARM.td (revision 3675e147) 
1//===-- ARM.td - Describe the ARM Target Machine -----------*- tablegen -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9//
10//===----------------------------------------------------------------------===//
11
12//===----------------------------------------------------------------------===//
13// Target-independent interfaces which we are implementing
14//===----------------------------------------------------------------------===//
15
16include "llvm/Target/Target.td"
17
18//===----------------------------------------------------------------------===//
19// ARM Subtarget state.
20//
21
22def ModeThumb             : SubtargetFeature<"thumb-mode", "InThumbMode",
23                                             "true", "Thumb mode">;
24
25def ModeSoftFloat         : SubtargetFeature<"soft-float","UseSoftFloat",
26                                             "true", "Use software floating "
27                                             "point features.">;
28
29
30//===----------------------------------------------------------------------===//
31// ARM Subtarget features.
32//
33
34// Floating Point, HW Division and Neon Support
35
36// FP loads/stores/moves, shared between VFP and MVE (even in the integer-only
37// version).
38def FeatureFPRegs         : SubtargetFeature<"fpregs", "HasFPRegs", "true",
39                                             "Enable FP registers">;
40
41// 16-bit FP loads/stores/moves, shared between VFP (with the v8.2A FP16
42// extension) and MVE (even in the integer-only version).
43def FeatureFPRegs16       : SubtargetFeature<"fpregs16", "HasFPRegs16", "true",
44                                             "Enable 16-bit FP registers",
45                                             [FeatureFPRegs]>;
46
47def FeatureFPRegs64       : SubtargetFeature<"fpregs64", "HasFPRegs64", "true",
48                                             "Enable 64-bit FP registers",
49                                             [FeatureFPRegs]>;
50
51def FeatureFP64           : SubtargetFeature<"fp64", "HasFP64", "true",
52                                             "Floating point unit supports "
53                                             "double precision",
54                                             [FeatureFPRegs64]>;
55
56def FeatureD32            : SubtargetFeature<"d32", "HasD32", "true",
57                                             "Extend FP to 32 double registers">;
58
59multiclass VFPver<string name, string query, string description,
60                  list<SubtargetFeature> prev,
61                  list<SubtargetFeature> otherimplies,
62                  list<SubtargetFeature> vfp2prev = []> {
63  def _D16_SP: SubtargetFeature<
64    name#"d16sp", query#"D16SP", "true",
65    description#" with only 16 d-registers and no double precision",
66    !foreach(v, prev, !cast<SubtargetFeature>(v # "_D16_SP")) #
67      !foreach(v, vfp2prev, !cast<SubtargetFeature>(v # "_SP")) #
68      otherimplies>;
69  def _SP: SubtargetFeature<
70    name#"sp", query#"SP", "true",
71    description#" with no double precision",
72    !foreach(v, prev, !cast<SubtargetFeature>(v # "_SP")) #
73      otherimplies # [FeatureD32, !cast<SubtargetFeature>(NAME # "_D16_SP")]>;
74  def _D16: SubtargetFeature<
75    name#"d16", query#"D16", "true",
76    description#" with only 16 d-registers",
77    !foreach(v, prev, !cast<SubtargetFeature>(v # "_D16")) #
78      vfp2prev #
79      otherimplies # [FeatureFP64, !cast<SubtargetFeature>(NAME # "_D16_SP")]>;
80  def "": SubtargetFeature<
81    name, query, "true", description,
82    prev # otherimplies # [
83        !cast<SubtargetFeature>(NAME # "_D16"),
84        !cast<SubtargetFeature>(NAME # "_SP")]>;
85}
86
87def FeatureVFP2_SP        : SubtargetFeature<"vfp2sp", "HasVFPv2SP", "true",
88                                             "Enable VFP2 instructions with "
89                                             "no double precision",
90                                             [FeatureFPRegs]>;
91
92def FeatureVFP2           : SubtargetFeature<"vfp2", "HasVFPv2", "true",
93                                             "Enable VFP2 instructions",
94                                             [FeatureFP64, FeatureVFP2_SP]>;
95
96defm FeatureVFP3: VFPver<"vfp3", "HasVFPv3", "Enable VFP3 instructions",
97                         [], [], [FeatureVFP2]>;
98
99def FeatureNEON           : SubtargetFeature<"neon", "HasNEON", "true",
100                                             "Enable NEON instructions",
101                                             [FeatureVFP3]>;
102
103def FeatureFP16           : SubtargetFeature<"fp16", "HasFP16", "true",
104                                             "Enable half-precision "
105                                             "floating point">;
106
107defm FeatureVFP4: VFPver<"vfp4", "HasVFPv4", "Enable VFP4 instructions",
108                         [FeatureVFP3], [FeatureFP16]>;
109
110defm FeatureFPARMv8: VFPver<"fp-armv8", "HasFPARMv8", "Enable ARMv8 FP",
111                         [FeatureVFP4], []>;
112
113def FeatureFullFP16       : SubtargetFeature<"fullfp16", "HasFullFP16", "true",
114                                             "Enable full half-precision "
115                                             "floating point",
116                                             [FeatureFPARMv8_D16_SP, FeatureFPRegs16]>;
117
118def FeatureFP16FML        : SubtargetFeature<"fp16fml", "HasFP16FML", "true",
119                                             "Enable full half-precision "
120                                             "floating point fml instructions",
121                                             [FeatureFullFP16]>;
122
123def FeatureHWDivThumb     : SubtargetFeature<"hwdiv",
124                                             "HasHardwareDivideInThumb", "true",
125                                             "Enable divide instructions in Thumb">;
126
127def FeatureHWDivARM       : SubtargetFeature<"hwdiv-arm",
128                                             "HasHardwareDivideInARM", "true",
129                                             "Enable divide instructions in ARM mode">;
130
131// Atomic Support
132def FeatureDB             : SubtargetFeature<"db", "HasDataBarrier", "true",
133                                             "Has data barrier (dmb/dsb) instructions">;
134
135def FeatureV7Clrex        : SubtargetFeature<"v7clrex", "HasV7Clrex", "true",
136                                             "Has v7 clrex instruction">;
137
138def FeatureDFB  : SubtargetFeature<"dfb", "HasFullDataBarrier", "true",
139                                   "Has full data barrier (dfb) instruction">;
140
141def FeatureAcquireRelease : SubtargetFeature<"acquire-release",
142                                             "HasAcquireRelease", "true",
143                                             "Has v8 acquire/release (lda/ldaex "
144                                             " etc) instructions">;
145
146
147def FeatureSlowFPBrcc     : SubtargetFeature<"slow-fp-brcc", "SlowFPBrcc", "true",
148                                             "FP compare + branch is slow">;
149
150def FeaturePerfMon        : SubtargetFeature<"perfmon", "HasPerfMon", "true",
151                                             "Enable support for Performance "
152                                             "Monitor extensions">;
153
154
155// TrustZone Security Extensions
156def FeatureTrustZone      : SubtargetFeature<"trustzone", "HasTrustZone", "true",
157                                             "Enable support for TrustZone "
158                                             "security extensions">;
159
160def Feature8MSecExt       : SubtargetFeature<"8msecext", "Has8MSecExt", "true",
161                                             "Enable support for ARMv8-M "
162                                             "Security Extensions">;
163
164def FeatureSHA2           : SubtargetFeature<"sha2", "HasSHA2", "true",
165                                             "Enable SHA1 and SHA256 support", [FeatureNEON]>;
166
167def FeatureAES            : SubtargetFeature<"aes", "HasAES", "true",
168                                             "Enable AES support", [FeatureNEON]>;
169
170def FeatureCrypto         : SubtargetFeature<"crypto", "HasCrypto", "true",
171                                             "Enable support for "
172                                             "Cryptography extensions",
173                                             [FeatureNEON, FeatureSHA2, FeatureAES]>;
174
175def FeatureCRC            : SubtargetFeature<"crc", "HasCRC", "true",
176                                             "Enable support for CRC instructions">;
177
178def FeatureDotProd        : SubtargetFeature<"dotprod", "HasDotProd", "true",
179                                             "Enable support for dot product instructions",
180                                             [FeatureNEON]>;
181
182// Not to be confused with FeatureHasRetAddrStack (return address stack)
183def FeatureRAS            : SubtargetFeature<"ras", "HasRAS", "true",
184                                             "Enable Reliability, Availability "
185                                             "and Serviceability extensions">;
186
187// Fast computation of non-negative address offsets
188def FeatureFPAO           : SubtargetFeature<"fpao", "HasFPAO", "true",
189                                             "Enable fast computation of "
190                                             "positive address offsets">;
191
192// Fast execution of AES crypto operations
193def FeatureFuseAES        : SubtargetFeature<"fuse-aes", "HasFuseAES", "true",
194                                             "CPU fuses AES crypto operations">;
195
196// Fast execution of bottom and top halves of literal generation
197def FeatureFuseLiterals   : SubtargetFeature<"fuse-literals", "HasFuseLiterals", "true",
198                                             "CPU fuses literal generation operations">;
199
200// The way of reading thread pointer
201def FeatureReadTp :  SubtargetFeature<"read-tp-hard", "ReadTPHard", "true",
202                                      "Reading thread pointer from register">;
203
204// Cyclone can zero VFP registers in 0 cycles.
205def FeatureZCZeroing      : SubtargetFeature<"zcz", "HasZeroCycleZeroing", "true",
206                                             "Has zero-cycle zeroing instructions">;
207
208// Whether it is profitable to unpredicate certain instructions during if-conversion
209def FeatureProfUnpredicate : SubtargetFeature<"prof-unpr",
210                                              "IsProfitableToUnpredicate", "true",
211                                              "Is profitable to unpredicate">;
212
213// Some targets (e.g. Swift) have microcoded VGETLNi32.
214def FeatureSlowVGETLNi32  : SubtargetFeature<"slow-vgetlni32",
215                                             "HasSlowVGETLNi32", "true",
216                                             "Has slow VGETLNi32 - prefer VMOV">;
217
218// Some targets (e.g. Swift) have microcoded VDUP32.
219def FeatureSlowVDUP32     : SubtargetFeature<"slow-vdup32", "HasSlowVDUP32",
220                                             "true",
221                                             "Has slow VDUP32 - prefer VMOV">;
222
223// Some targets (e.g. Cortex-A9) prefer VMOVSR to VMOVDRR even when using NEON
224// for scalar FP, as this allows more effective execution domain optimization.
225def FeaturePreferVMOVSR   : SubtargetFeature<"prefer-vmovsr", "PreferVMOVSR",
226                                             "true", "Prefer VMOVSR">;
227
228// Swift has ISHST barriers compatible with Atomic Release semantics but weaker
229// than ISH
230def FeaturePrefISHSTBarrier : SubtargetFeature<"prefer-ishst", "PreferISHST",
231                                               "true", "Prefer ISHST barriers">;
232
233// Some targets (e.g. Cortex-A9) have muxed AGU and NEON/FPU.
234def FeatureMuxedUnits     : SubtargetFeature<"muxed-units", "HasMuxedUnits",
235                                             "true",
236                                             "Has muxed AGU and NEON/FPU">;
237
238// Whether VLDM/VSTM starting with odd register number need more microops
239// than single VLDRS
240def FeatureSlowOddRegister : SubtargetFeature<"slow-odd-reg", "SlowOddRegister",
241                                              "true", "VLDM/VSTM starting "
242                                              "with an odd register is slow">;
243
244// Some targets have a renaming dependency when loading into D subregisters.
245def FeatureSlowLoadDSubreg : SubtargetFeature<"slow-load-D-subreg",
246                                              "SlowLoadDSubregister", "true",
247                                              "Loading into D subregs is slow">;
248
249def FeatureUseWideStrideVFP : SubtargetFeature<"wide-stride-vfp",
250                                               "UseWideStrideVFP", "true",
251                                               "Use a wide stride when allocating VFP registers">;
252
253// Some targets (e.g. Cortex-A15) never want VMOVS to be widened to VMOVD.
254def FeatureDontWidenVMOVS : SubtargetFeature<"dont-widen-vmovs",
255                                             "DontWidenVMOVS", "true",
256                                             "Don't widen VMOVS to VMOVD">;
257
258// Some targets (e.g. Cortex-A15) prefer to avoid mixing operations on different
259// VFP register widths.
260def FeatureSplatVFPToNeon : SubtargetFeature<"splat-vfp-neon",
261                                             "SplatVFPToNeon", "true",
262                                             "Splat register from VFP to NEON",
263                                             [FeatureDontWidenVMOVS]>;
264
265// Whether or not it is profitable to expand VFP/NEON MLA/MLS instructions.
266def FeatureExpandMLx      : SubtargetFeature<"expand-fp-mlx",
267                                             "ExpandMLx", "true",
268                                             "Expand VFP/NEON MLA/MLS instructions">;
269
270// Some targets have special RAW hazards for VFP/NEON VMLA/VMLS.
271def FeatureHasVMLxHazards : SubtargetFeature<"vmlx-hazards", "HasVMLxHazards",
272                                             "true", "Has VMLx hazards">;
273
274// Some targets (e.g. Cortex-A9) want to convert VMOVRS, VMOVSR and VMOVS from
275// VFP to NEON, as an execution domain optimization.
276def FeatureNEONForFPMovs  : SubtargetFeature<"neon-fpmovs",
277                                             "UseNEONForFPMovs", "true",
278                                             "Convert VMOVSR, VMOVRS, "
279                                             "VMOVS to NEON">;
280
281// Some processors benefit from using NEON instructions for scalar
282// single-precision FP operations. This affects instruction selection and should
283// only be enabled if the handling of denormals is not important.
284def FeatureNEONForFP      : SubtargetFeature<"neonfp",
285                                             "UseNEONForSinglePrecisionFP",
286                                             "true",
287                                             "Use NEON for single precision FP">;
288
289// On some processors, VLDn instructions that access unaligned data take one
290// extra cycle. Take that into account when computing operand latencies.
291def FeatureCheckVLDnAlign : SubtargetFeature<"vldn-align", "CheckVLDnAlign",
292                                             "true",
293                                             "Check for VLDn unaligned access">;
294
295// Some processors have a nonpipelined VFP coprocessor.
296def FeatureNonpipelinedVFP : SubtargetFeature<"nonpipelined-vfp",
297                                              "NonpipelinedVFP", "true",
298                                              "VFP instructions are not pipelined">;
299
300// Some processors have FP multiply-accumulate instructions that don't
301// play nicely with other VFP / NEON instructions, and it's generally better
302// to just not use them.
303def FeatureHasSlowFPVMLx  : SubtargetFeature<"slowfpvmlx", "SlowFPVMLx", "true",
304                                             "Disable VFP / NEON MAC instructions">;
305
306// VFPv4 added VFMA instructions that can similar be fast or slow.
307def FeatureHasSlowFPVFMx  : SubtargetFeature<"slowfpvfmx", "SlowFPVFMx", "true",
308                                             "Disable VFP / NEON FMA instructions">;
309
310// Cortex-A8 / A9 Advanced SIMD has multiplier accumulator forwarding.
311def FeatureVMLxForwarding : SubtargetFeature<"vmlx-forwarding",
312                                             "HasVMLxForwarding", "true",
313                                             "Has multiplier accumulator forwarding">;
314
315// Disable 32-bit to 16-bit narrowing for experimentation.
316def FeaturePref32BitThumb : SubtargetFeature<"32bit", "Pref32BitThumb", "true",
317                                             "Prefer 32-bit Thumb instrs">;
318
319def FeaturePrefLoopAlign32 : SubtargetFeature<"loop-align", "PrefLoopLogAlignment","2",
320                                              "Prefer 32-bit alignment for loops">;
321
322def FeatureMVEVectorCostFactor1 : SubtargetFeature<"mve1beat", "MVEVectorCostFactor", "1",
323                        "Model MVE instructions as a 1 beat per tick architecture">;
324
325def FeatureMVEVectorCostFactor2 : SubtargetFeature<"mve2beat", "MVEVectorCostFactor", "2",
326                        "Model MVE instructions as a 2 beats per tick architecture">;
327
328def FeatureMVEVectorCostFactor4 : SubtargetFeature<"mve4beat", "MVEVectorCostFactor", "4",
329                        "Model MVE instructions as a 4 beats per tick architecture">;
330
331/// Some instructions update CPSR partially, which can add false dependency for
332/// out-of-order implementation, e.g. Cortex-A9, unless each individual bit is
333/// mapped to a separate physical register. Avoid partial CPSR update for these
334/// processors.
335def FeatureAvoidPartialCPSR : SubtargetFeature<"avoid-partial-cpsr",
336                                               "AvoidCPSRPartialUpdate", "true",
337                                 "Avoid CPSR partial update for OOO execution">;
338
339/// Disable +1 predication cost for instructions updating CPSR.
340/// Enabled for Cortex-A57.
341def FeatureCheapPredicableCPSR : SubtargetFeature<"cheap-predicable-cpsr",
342                                                  "CheapPredicableCPSRDef",
343                                                  "true",
344                  "Disable +1 predication cost for instructions updating CPSR">;
345
346def FeatureAvoidMOVsShOp  : SubtargetFeature<"avoid-movs-shop",
347                                             "AvoidMOVsShifterOperand", "true",
348                                             "Avoid movs instructions with "
349                                             "shifter operand">;
350
351// Some processors perform return stack prediction. CodeGen should avoid issue
352// "normal" call instructions to callees which do not return.
353def FeatureHasRetAddrStack : SubtargetFeature<"ret-addr-stack",
354                                              "HasRetAddrStack", "true",
355                                              "Has return address stack">;
356
357// Some processors have no branch predictor, which changes the expected cost of
358// taking a branch which affects the choice of whether to use predicated
359// instructions.
360def FeatureHasNoBranchPredictor : SubtargetFeature<"no-branch-predictor",
361                                                   "HasBranchPredictor", "false",
362                                                   "Has no branch predictor">;
363
364/// DSP extension.
365def FeatureDSP            : SubtargetFeature<"dsp", "HasDSP", "true",
366                                             "Supports DSP instructions in "
367                                             "ARM and/or Thumb2">;
368
369// Multiprocessing extension.
370def FeatureMP             : SubtargetFeature<"mp", "HasMPExtension", "true",
371                                        "Supports Multiprocessing extension">;
372
373// Virtualization extension - requires HW divide (ARMv7-AR ARMARM - 4.4.8).
374def FeatureVirtualization : SubtargetFeature<"virtualization",
375                                             "HasVirtualization", "true",
376                                             "Supports Virtualization extension",
377                                             [FeatureHWDivThumb, FeatureHWDivARM]>;
378
379// Special TRAP encoding for NaCl, which looks like a TRAP in Thumb too.
380// See ARMInstrInfo.td for details.
381def FeatureNaClTrap       : SubtargetFeature<"nacl-trap", "UseNaClTrap", "true",
382                                             "NaCl trap">;
383
384def FeatureStrictAlign    : SubtargetFeature<"strict-align",
385                                             "StrictAlign", "true",
386                                             "Disallow all unaligned memory "
387                                             "access">;
388
389def FeatureLongCalls      : SubtargetFeature<"long-calls", "GenLongCalls", "true",
390                                             "Generate calls via indirect call "
391                                             "instructions">;
392
393def FeatureExecuteOnly    : SubtargetFeature<"execute-only",
394                                             "GenExecuteOnly", "true",
395                                             "Enable the generation of "
396                                             "execute only code.">;
397
398def FeatureReserveR9      : SubtargetFeature<"reserve-r9", "ReserveR9", "true",
399                                             "Reserve R9, making it unavailable"
400                                             " as GPR">;
401
402def FeatureNoMovt         : SubtargetFeature<"no-movt", "NoMovt", "true",
403                                             "Don't use movt/movw pairs for "
404                                             "32-bit imms">;
405
406def FeatureNoNegativeImmediates
407                          : SubtargetFeature<"no-neg-immediates",
408                                             "NegativeImmediates", "false",
409                                             "Convert immediates and instructions "
410                                             "to their negated or complemented "
411                                             "equivalent when the immediate does "
412                                             "not fit in the encoding.">;
413
414// Use the MachineScheduler for instruction scheduling for the subtarget.
415def FeatureUseMISched: SubtargetFeature<"use-misched", "UseMISched", "true",
416                                        "Use the MachineScheduler">;
417
418def FeatureNoPostRASched : SubtargetFeature<"disable-postra-scheduler",
419    "DisablePostRAScheduler", "true",
420    "Don't schedule again after register allocation">;
421
422// Armv8.5-A extensions
423
424def FeatureSB       : SubtargetFeature<"sb", "HasSB", "true",
425  "Enable v8.5a Speculation Barrier" >;
426
427// Armv8.6-A extensions
428def FeatureBF16     : SubtargetFeature<"bf16", "HasBF16", "true",
429  "Enable support for BFloat16 instructions",  [FeatureNEON]>;
430
431def FeatureMatMulInt8 : SubtargetFeature<"i8mm", "HasMatMulInt8",
432    "true", "Enable Matrix Multiply Int8 Extension", [FeatureNEON]>;
433
434// Armv8.1-M extensions
435
436def FeatureLOB            : SubtargetFeature<"lob", "HasLOB", "true",
437                                             "Enable Low Overhead Branch "
438                                             "extensions">;
439
440def FeatureFixCMSE_CVE_2021_35465 : SubtargetFeature<"fix-cmse-cve-2021-35465",
441                                        "FixCMSE_CVE_2021_35465", "true",
442                                        "Mitigate against the cve-2021-35465 "
443                                        "security vulnurability">;
444
445//===----------------------------------------------------------------------===//
446// ARM architecture class
447//
448
449// A-series ISA
450def FeatureAClass : SubtargetFeature<"aclass", "ARMProcClass", "AClass",
451                                     "Is application profile ('A' series)">;
452
453// R-series ISA
454def FeatureRClass : SubtargetFeature<"rclass", "ARMProcClass", "RClass",
455                                     "Is realtime profile ('R' series)">;
456
457// M-series ISA
458def FeatureMClass : SubtargetFeature<"mclass", "ARMProcClass", "MClass",
459                                     "Is microcontroller profile ('M' series)">;
460
461
462def FeatureThumb2 : SubtargetFeature<"thumb2", "HasThumb2", "true",
463                                     "Enable Thumb2 instructions">;
464
465def FeatureNoARM  : SubtargetFeature<"noarm", "NoARM", "true",
466                                     "Does not support ARM mode execution">;
467
468//===----------------------------------------------------------------------===//
469// ARM ISAa.
470//
471
472def HasV4TOps   : SubtargetFeature<"v4t", "HasV4TOps", "true",
473                                   "Support ARM v4T instructions">;
474
475def HasV5TOps   : SubtargetFeature<"v5t", "HasV5TOps", "true",
476                                   "Support ARM v5T instructions",
477                                   [HasV4TOps]>;
478
479def HasV5TEOps  : SubtargetFeature<"v5te", "HasV5TEOps", "true",
480                                   "Support ARM v5TE, v5TEj, and "
481                                   "v5TExp instructions",
482                                   [HasV5TOps]>;
483
484def HasV6Ops    : SubtargetFeature<"v6", "HasV6Ops", "true",
485                                   "Support ARM v6 instructions",
486                                   [HasV5TEOps]>;
487
488def HasV6MOps   : SubtargetFeature<"v6m", "HasV6MOps", "true",
489                                   "Support ARM v6M instructions",
490                                   [HasV6Ops]>;
491
492def HasV8MBaselineOps : SubtargetFeature<"v8m", "HasV8MBaselineOps", "true",
493                                         "Support ARM v8M Baseline instructions",
494                                         [HasV6MOps]>;
495
496def HasV6KOps   : SubtargetFeature<"v6k", "HasV6KOps", "true",
497                                   "Support ARM v6k instructions",
498                                   [HasV6Ops]>;
499
500def HasV6T2Ops  : SubtargetFeature<"v6t2", "HasV6T2Ops", "true",
501                                   "Support ARM v6t2 instructions",
502                                   [HasV8MBaselineOps, HasV6KOps, FeatureThumb2]>;
503
504def HasV7Ops    : SubtargetFeature<"v7", "HasV7Ops", "true",
505                                   "Support ARM v7 instructions",
506                                   [HasV6T2Ops, FeaturePerfMon,
507                                    FeatureV7Clrex]>;
508
509def HasV8MMainlineOps :
510                  SubtargetFeature<"v8m.main", "HasV8MMainlineOps", "true",
511                                   "Support ARM v8M Mainline instructions",
512                                   [HasV7Ops]>;
513
514def HasV8Ops    : SubtargetFeature<"v8", "HasV8Ops", "true",
515                                   "Support ARM v8 instructions",
516                                   [HasV7Ops, FeatureAcquireRelease]>;
517
518def HasV8_1aOps : SubtargetFeature<"v8.1a", "HasV8_1aOps", "true",
519                                   "Support ARM v8.1a instructions",
520                                   [HasV8Ops]>;
521
522def HasV8_2aOps : SubtargetFeature<"v8.2a", "HasV8_2aOps", "true",
523                                   "Support ARM v8.2a instructions",
524                                   [HasV8_1aOps]>;
525
526def HasV8_3aOps   : SubtargetFeature<"v8.3a", "HasV8_3aOps", "true",
527                                   "Support ARM v8.3a instructions",
528                                   [HasV8_2aOps]>;
529
530def HasV8_4aOps   : SubtargetFeature<"v8.4a", "HasV8_4aOps", "true",
531                                   "Support ARM v8.4a instructions",
532                                   [HasV8_3aOps, FeatureDotProd]>;
533
534def HasV8_5aOps   : SubtargetFeature<"v8.5a", "HasV8_5aOps", "true",
535                                   "Support ARM v8.5a instructions",
536                                   [HasV8_4aOps, FeatureSB]>;
537
538def HasV8_6aOps   : SubtargetFeature<"v8.6a", "HasV8_6aOps", "true",
539                                   "Support ARM v8.6a instructions",
540                                   [HasV8_5aOps, FeatureBF16,
541                                    FeatureMatMulInt8]>;
542
543def HasV8_7aOps   : SubtargetFeature<"v8.7a", "HasV8_7aOps", "true",
544                                   "Support ARM v8.7a instructions",
545                                   [HasV8_6aOps]>;
546
547def HasV8_1MMainlineOps : SubtargetFeature<
548               "v8.1m.main", "HasV8_1MMainlineOps", "true",
549               "Support ARM v8-1M Mainline instructions",
550               [HasV8MMainlineOps]>;
551def HasMVEIntegerOps : SubtargetFeature<
552               "mve", "HasMVEIntegerOps", "true",
553               "Support M-Class Vector Extension with integer ops",
554               [HasV8_1MMainlineOps, FeatureDSP, FeatureFPRegs16, FeatureFPRegs64]>;
555def HasMVEFloatOps : SubtargetFeature<
556               "mve.fp", "HasMVEFloatOps", "true",
557               "Support M-Class Vector Extension with integer and floating ops",
558               [HasMVEIntegerOps, FeatureFPARMv8_D16_SP, FeatureFullFP16]>;
559
560def HasCDEOps : SubtargetFeature<"cde", "HasCDEOps", "true",
561                                 "Support CDE instructions",
562                                 [HasV8MMainlineOps]>;
563
564foreach i = {0-7} in
565    def FeatureCoprocCDE#i : SubtargetFeature<"cdecp"#i,
566                                              "CoprocCDE["#i#"]", "true",
567                                              "Coprocessor "#i#" ISA is CDEv1",
568                                              [HasCDEOps]>;
569
570//===----------------------------------------------------------------------===//
571// Control codegen mitigation against Straight Line Speculation vulnerability.
572//===----------------------------------------------------------------------===//
573
574def FeatureHardenSlsRetBr : SubtargetFeature<"harden-sls-retbr",
575  "HardenSlsRetBr", "true",
576  "Harden against straight line speculation across RETurn and BranchRegister "
577  "instructions">;
578def FeatureHardenSlsBlr : SubtargetFeature<"harden-sls-blr",
579  "HardenSlsBlr", "true",
580  "Harden against straight line speculation across indirect calls">;
581def FeatureHardenSlsNoComdat : SubtargetFeature<"harden-sls-nocomdat",
582  "HardenSlsNoComdat", "true",
583  "Generate thunk code for SLS mitigation in the normal text section">;
584
585//===----------------------------------------------------------------------===//
586// ARM Processor subtarget features.
587//
588
589def ProcA5      : SubtargetFeature<"a5", "ARMProcFamily", "CortexA5",
590                                   "Cortex-A5 ARM processors", []>;
591def ProcA7      : SubtargetFeature<"a7", "ARMProcFamily", "CortexA7",
592                                   "Cortex-A7 ARM processors", []>;
593def ProcA8      : SubtargetFeature<"a8", "ARMProcFamily", "CortexA8",
594                                   "Cortex-A8 ARM processors", []>;
595def ProcA9      : SubtargetFeature<"a9", "ARMProcFamily", "CortexA9",
596                                   "Cortex-A9 ARM processors", []>;
597def ProcA12     : SubtargetFeature<"a12", "ARMProcFamily", "CortexA12",
598                                   "Cortex-A12 ARM processors", []>;
599def ProcA15     : SubtargetFeature<"a15", "ARMProcFamily", "CortexA15",
600                                   "Cortex-A15 ARM processors", []>;
601def ProcA17     : SubtargetFeature<"a17", "ARMProcFamily", "CortexA17",
602                                   "Cortex-A17 ARM processors", []>;
603def ProcA32     : SubtargetFeature<"a32", "ARMProcFamily", "CortexA32",
604                                   "Cortex-A32 ARM processors", []>;
605def ProcA35     : SubtargetFeature<"a35", "ARMProcFamily", "CortexA35",
606                                   "Cortex-A35 ARM processors", []>;
607def ProcA53     : SubtargetFeature<"a53", "ARMProcFamily", "CortexA53",
608                                   "Cortex-A53 ARM processors", []>;
609def ProcA55     : SubtargetFeature<"a55", "ARMProcFamily", "CortexA55",
610                                   "Cortex-A55 ARM processors", []>;
611def ProcA57     : SubtargetFeature<"a57", "ARMProcFamily", "CortexA57",
612                                   "Cortex-A57 ARM processors", []>;
613def ProcA72     : SubtargetFeature<"a72", "ARMProcFamily", "CortexA72",
614                                   "Cortex-A72 ARM processors", []>;
615def ProcA73     : SubtargetFeature<"a73", "ARMProcFamily", "CortexA73",
616                                   "Cortex-A73 ARM processors", []>;
617def ProcA75     : SubtargetFeature<"a75", "ARMProcFamily", "CortexA75",
618                                   "Cortex-A75 ARM processors", []>;
619def ProcA76     : SubtargetFeature<"a76", "ARMProcFamily", "CortexA76",
620                                   "Cortex-A76 ARM processors", []>;
621def ProcA77     : SubtargetFeature<"a77", "ARMProcFamily", "CortexA77",
622                                   "Cortex-A77 ARM processors", []>;
623def ProcA78     : SubtargetFeature<"cortex-a78", "ARMProcFamily", "CortexA78",
624                                   "Cortex-A78 ARM processors", []>;
625def ProcA78C    : SubtargetFeature<"a78c", "ARMProcFamily", "CortexA78C",
626                                   "Cortex-A78C ARM processors", []>;
627def ProcX1      : SubtargetFeature<"cortex-x1", "ARMProcFamily", "CortexX1",
628                                   "Cortex-X1 ARM processors", []>;
629
630def ProcV1      : SubtargetFeature<"neoverse-v1", "ARMProcFamily",
631                                   "NeoverseV1", "Neoverse-V1 ARM processors", []>;
632
633def ProcKrait   : SubtargetFeature<"krait", "ARMProcFamily", "Krait",
634                                   "Qualcomm Krait processors", []>;
635def ProcKryo    : SubtargetFeature<"kryo", "ARMProcFamily", "Kryo",
636                                   "Qualcomm Kryo processors", []>;
637def ProcSwift   : SubtargetFeature<"swift", "ARMProcFamily", "Swift",
638                                   "Swift ARM processors", []>;
639
640def ProcExynos  : SubtargetFeature<"exynos", "ARMProcFamily", "Exynos",
641                                   "Samsung Exynos processors",
642                                   [FeatureZCZeroing,
643                                    FeatureUseWideStrideVFP,
644                                    FeatureSplatVFPToNeon,
645                                    FeatureSlowVGETLNi32,
646                                    FeatureSlowVDUP32,
647                                    FeatureSlowFPBrcc,
648                                    FeatureProfUnpredicate,
649                                    FeatureHWDivThumb,
650                                    FeatureHWDivARM,
651                                    FeatureHasSlowFPVMLx,
652                                    FeatureHasSlowFPVFMx,
653                                    FeatureHasRetAddrStack,
654                                    FeatureFuseLiterals,
655                                    FeatureFuseAES,
656                                    FeatureExpandMLx,
657                                    FeatureCrypto,
658                                    FeatureCRC]>;
659
660def ProcR4      : SubtargetFeature<"r4", "ARMProcFamily", "CortexR4",
661                                   "Cortex-R4 ARM processors", []>;
662def ProcR5      : SubtargetFeature<"r5", "ARMProcFamily", "CortexR5",
663                                   "Cortex-R5 ARM processors", []>;
664def ProcR7      : SubtargetFeature<"r7", "ARMProcFamily", "CortexR7",
665                                   "Cortex-R7 ARM processors", []>;
666def ProcR52     : SubtargetFeature<"r52", "ARMProcFamily", "CortexR52",
667                                   "Cortex-R52 ARM processors", []>;
668
669def ProcM3      : SubtargetFeature<"m3", "ARMProcFamily", "CortexM3",
670                                   "Cortex-M3 ARM processors", []>;
671def ProcM7      : SubtargetFeature<"m7", "ARMProcFamily", "CortexM7",
672                                   "Cortex-M7 ARM processors", []>;
673
674//===----------------------------------------------------------------------===//
675// ARM Helper classes.
676//
677
678class Architecture<string fname, string aname, list<SubtargetFeature> features>
679  : SubtargetFeature<fname, "ARMArch", aname,
680                     !strconcat(aname, " architecture"), features>;
681
682class ProcNoItin<string Name, list<SubtargetFeature> Features>
683  : Processor<Name, NoItineraries, Features>;
684
685
686//===----------------------------------------------------------------------===//
687// ARM architectures
688//
689
690def ARMv2     : Architecture<"armv2",     "ARMv2",    []>;
691
692def ARMv2a    : Architecture<"armv2a",    "ARMv2a",   []>;
693
694def ARMv3     : Architecture<"armv3",     "ARMv3",    []>;
695
696def ARMv3m    : Architecture<"armv3m",    "ARMv3m",   []>;
697
698def ARMv4     : Architecture<"armv4",     "ARMv4",    []>;
699
700def ARMv4t    : Architecture<"armv4t",    "ARMv4t",   [HasV4TOps]>;
701
702def ARMv5t    : Architecture<"armv5t",    "ARMv5t",   [HasV5TOps]>;
703
704def ARMv5te   : Architecture<"armv5te",   "ARMv5te",  [HasV5TEOps]>;
705
706def ARMv5tej  : Architecture<"armv5tej",  "ARMv5tej", [HasV5TEOps]>;
707
708def ARMv6     : Architecture<"armv6",     "ARMv6",    [HasV6Ops,
709                                                       FeatureDSP]>;
710
711def ARMv6t2   : Architecture<"armv6t2",   "ARMv6t2",  [HasV6T2Ops,
712                                                       FeatureDSP]>;
713
714def ARMv6k    : Architecture<"armv6k",    "ARMv6k",   [HasV6KOps]>;
715
716def ARMv6kz   : Architecture<"armv6kz",   "ARMv6kz",  [HasV6KOps,
717                                                       FeatureTrustZone]>;
718
719def ARMv6m    : Architecture<"armv6-m",   "ARMv6m",   [HasV6MOps,
720                                                       FeatureNoARM,
721                                                       ModeThumb,
722                                                       FeatureDB,
723                                                       FeatureMClass,
724                                                       FeatureStrictAlign]>;
725
726def ARMv6sm   : Architecture<"armv6s-m",  "ARMv6sm",  [HasV6MOps,
727                                                       FeatureNoARM,
728                                                       ModeThumb,
729                                                       FeatureDB,
730                                                       FeatureMClass,
731                                                       FeatureStrictAlign]>;
732
733def ARMv7a    : Architecture<"armv7-a",   "ARMv7a",   [HasV7Ops,
734                                                       FeatureNEON,
735                                                       FeatureDB,
736                                                       FeatureDSP,
737                                                       FeatureAClass]>;
738
739def ARMv7ve   : Architecture<"armv7ve",   "ARMv7ve",  [HasV7Ops,
740                                                       FeatureNEON,
741                                                       FeatureDB,
742                                                       FeatureDSP,
743                                                       FeatureTrustZone,
744                                                       FeatureMP,
745                                                       FeatureVirtualization,
746                                                       FeatureAClass]>;
747
748def ARMv7r    : Architecture<"armv7-r",   "ARMv7r",   [HasV7Ops,
749                                                       FeatureDB,
750                                                       FeatureDSP,
751                                                       FeatureHWDivThumb,
752                                                       FeatureRClass]>;
753
754def ARMv7m    : Architecture<"armv7-m",   "ARMv7m",   [HasV7Ops,
755                                                       FeatureThumb2,
756                                                       FeatureNoARM,
757                                                       ModeThumb,
758                                                       FeatureDB,
759                                                       FeatureHWDivThumb,
760                                                       FeatureMClass]>;
761
762def ARMv7em   : Architecture<"armv7e-m",  "ARMv7em",  [HasV7Ops,
763                                                       FeatureThumb2,
764                                                       FeatureNoARM,
765                                                       ModeThumb,
766                                                       FeatureDB,
767                                                       FeatureHWDivThumb,
768                                                       FeatureMClass,
769                                                       FeatureDSP]>;
770
771def ARMv8a    : Architecture<"armv8-a",   "ARMv8a",   [HasV8Ops,
772                                                       FeatureAClass,
773                                                       FeatureDB,
774                                                       FeatureFPARMv8,
775                                                       FeatureNEON,
776                                                       FeatureDSP,
777                                                       FeatureTrustZone,
778                                                       FeatureMP,
779                                                       FeatureVirtualization,
780                                                       FeatureCrypto,
781                                                       FeatureCRC]>;
782
783def ARMv81a   : Architecture<"armv8.1-a", "ARMv81a",  [HasV8_1aOps,
784                                                       FeatureAClass,
785                                                       FeatureDB,
786                                                       FeatureFPARMv8,
787                                                       FeatureNEON,
788                                                       FeatureDSP,
789                                                       FeatureTrustZone,
790                                                       FeatureMP,
791                                                       FeatureVirtualization,
792                                                       FeatureCrypto,
793                                                       FeatureCRC]>;
794
795def ARMv82a   : Architecture<"armv8.2-a", "ARMv82a",  [HasV8_2aOps,
796                                                       FeatureAClass,
797                                                       FeatureDB,
798                                                       FeatureFPARMv8,
799                                                       FeatureNEON,
800                                                       FeatureDSP,
801                                                       FeatureTrustZone,
802                                                       FeatureMP,
803                                                       FeatureVirtualization,
804                                                       FeatureCrypto,
805                                                       FeatureCRC,
806                                                       FeatureRAS]>;
807
808def ARMv83a   : Architecture<"armv8.3-a", "ARMv83a",  [HasV8_3aOps,
809                                                       FeatureAClass,
810                                                       FeatureDB,
811                                                       FeatureFPARMv8,
812                                                       FeatureNEON,
813                                                       FeatureDSP,
814                                                       FeatureTrustZone,
815                                                       FeatureMP,
816                                                       FeatureVirtualization,
817                                                       FeatureCrypto,
818                                                       FeatureCRC,
819                                                       FeatureRAS]>;
820
821def ARMv84a   : Architecture<"armv8.4-a", "ARMv84a",  [HasV8_4aOps,
822                                                       FeatureAClass,
823                                                       FeatureDB,
824                                                       FeatureFPARMv8,
825                                                       FeatureNEON,
826                                                       FeatureDSP,
827                                                       FeatureTrustZone,
828                                                       FeatureMP,
829                                                       FeatureVirtualization,
830                                                       FeatureCrypto,
831                                                       FeatureCRC,
832                                                       FeatureRAS,
833                                                       FeatureDotProd]>;
834
835def ARMv85a   : Architecture<"armv8.5-a", "ARMv85a",  [HasV8_5aOps,
836                                                       FeatureAClass,
837                                                       FeatureDB,
838                                                       FeatureFPARMv8,
839                                                       FeatureNEON,
840                                                       FeatureDSP,
841                                                       FeatureTrustZone,
842                                                       FeatureMP,
843                                                       FeatureVirtualization,
844                                                       FeatureCrypto,
845                                                       FeatureCRC,
846                                                       FeatureRAS,
847                                                       FeatureDotProd]>;
848def ARMv86a   : Architecture<"armv8.6-a", "ARMv86a",  [HasV8_6aOps,
849                                                       FeatureAClass,
850                                                       FeatureDB,
851                                                       FeatureFPARMv8,
852                                                       FeatureNEON,
853                                                       FeatureDSP,
854                                                       FeatureTrustZone,
855                                                       FeatureMP,
856                                                       FeatureVirtualization,
857                                                       FeatureCrypto,
858                                                       FeatureCRC,
859                                                       FeatureRAS,
860                                                       FeatureDotProd]>;
861def ARMv87a   : Architecture<"armv8.7-a", "ARMv87a",  [HasV8_7aOps,
862                                                       FeatureAClass,
863                                                       FeatureDB,
864                                                       FeatureFPARMv8,
865                                                       FeatureNEON,
866                                                       FeatureDSP,
867                                                       FeatureTrustZone,
868                                                       FeatureMP,
869                                                       FeatureVirtualization,
870                                                       FeatureCrypto,
871                                                       FeatureCRC,
872                                                       FeatureRAS,
873                                                       FeatureDotProd]>;
874
875def ARMv8r    : Architecture<"armv8-r",   "ARMv8r",   [HasV8Ops,
876                                                       FeatureRClass,
877                                                       FeatureDB,
878                                                       FeatureDFB,
879                                                       FeatureDSP,
880                                                       FeatureCRC,
881                                                       FeatureMP,
882                                                       FeatureVirtualization,
883                                                       FeatureFPARMv8,
884                                                       FeatureNEON]>;
885
886def ARMv8mBaseline : Architecture<"armv8-m.base", "ARMv8mBaseline",
887                                                      [HasV8MBaselineOps,
888                                                       FeatureNoARM,
889                                                       ModeThumb,
890                                                       FeatureDB,
891                                                       FeatureHWDivThumb,
892                                                       FeatureV7Clrex,
893                                                       Feature8MSecExt,
894                                                       FeatureAcquireRelease,
895                                                       FeatureMClass,
896                                                       FeatureStrictAlign]>;
897
898def ARMv8mMainline : Architecture<"armv8-m.main", "ARMv8mMainline",
899                                                      [HasV8MMainlineOps,
900                                                       FeatureNoARM,
901                                                       ModeThumb,
902                                                       FeatureDB,
903                                                       FeatureHWDivThumb,
904                                                       Feature8MSecExt,
905                                                       FeatureAcquireRelease,
906                                                       FeatureMClass]>;
907
908def ARMv81mMainline : Architecture<"armv8.1-m.main", "ARMv81mMainline",
909                                                      [HasV8_1MMainlineOps,
910                                                       FeatureNoARM,
911                                                       ModeThumb,
912                                                       FeatureDB,
913                                                       FeatureHWDivThumb,
914                                                       Feature8MSecExt,
915                                                       FeatureAcquireRelease,
916                                                       FeatureMClass,
917                                                       FeatureRAS,
918                                                       FeatureLOB]>;
919
920// Aliases
921def IWMMXT   : Architecture<"iwmmxt",      "ARMv5te",  [ARMv5te]>;
922def IWMMXT2  : Architecture<"iwmmxt2",     "ARMv5te",  [ARMv5te]>;
923def XScale   : Architecture<"xscale",      "ARMv5te",  [ARMv5te]>;
924def ARMv6j   : Architecture<"armv6j",      "ARMv7a",   [ARMv6]>;
925def ARMv7k   : Architecture<"armv7k",      "ARMv7a",   [ARMv7a]>;
926def ARMv7s   : Architecture<"armv7s",      "ARMv7a",   [ARMv7a]>;
927
928//===----------------------------------------------------------------------===//
929// Register File Description
930//===----------------------------------------------------------------------===//
931
932include "ARMRegisterInfo.td"
933include "ARMRegisterBanks.td"
934include "ARMCallingConv.td"
935
936//===----------------------------------------------------------------------===//
937// ARM schedules.
938//===----------------------------------------------------------------------===//
939//
940include "ARMPredicates.td"
941include "ARMSchedule.td"
942
943//===----------------------------------------------------------------------===//
944// Instruction Descriptions
945//===----------------------------------------------------------------------===//
946
947include "ARMInstrInfo.td"
948def ARMInstrInfo : InstrInfo;
949
950//===----------------------------------------------------------------------===//
951// ARM schedules
952//
953include "ARMScheduleV6.td"
954include "ARMScheduleA8.td"
955include "ARMScheduleA9.td"
956include "ARMScheduleSwift.td"
957include "ARMScheduleR52.td"
958include "ARMScheduleA57.td"
959include "ARMScheduleM4.td"
960include "ARMScheduleM7.td"
961
962//===----------------------------------------------------------------------===//
963// ARM processors
964//
965// Dummy CPU, used to target architectures
966def : ProcessorModel<"generic",     CortexA8Model,      []>;
967
968// FIXME: Several processors below are not using their own scheduler
969// model, but one of similar/previous processor. These should be fixed.
970
971def : ProcNoItin<"arm8",                                [ARMv4]>;
972def : ProcNoItin<"arm810",                              [ARMv4]>;
973def : ProcNoItin<"strongarm",                           [ARMv4]>;
974def : ProcNoItin<"strongarm110",                        [ARMv4]>;
975def : ProcNoItin<"strongarm1100",                       [ARMv4]>;
976def : ProcNoItin<"strongarm1110",                       [ARMv4]>;
977
978def : ProcNoItin<"arm7tdmi",                            [ARMv4t]>;
979def : ProcNoItin<"arm7tdmi-s",                          [ARMv4t]>;
980def : ProcNoItin<"arm710t",                             [ARMv4t]>;
981def : ProcNoItin<"arm720t",                             [ARMv4t]>;
982def : ProcNoItin<"arm9",                                [ARMv4t]>;
983def : ProcNoItin<"arm9tdmi",                            [ARMv4t]>;
984def : ProcNoItin<"arm920",                              [ARMv4t]>;
985def : ProcNoItin<"arm920t",                             [ARMv4t]>;
986def : ProcNoItin<"arm922t",                             [ARMv4t]>;
987def : ProcNoItin<"arm940t",                             [ARMv4t]>;
988def : ProcNoItin<"ep9312",                              [ARMv4t]>;
989
990def : ProcNoItin<"arm10tdmi",                           [ARMv5t]>;
991def : ProcNoItin<"arm1020t",                            [ARMv5t]>;
992
993def : ProcNoItin<"arm9e",                               [ARMv5te]>;
994def : ProcNoItin<"arm926ej-s",                          [ARMv5te]>;
995def : ProcNoItin<"arm946e-s",                           [ARMv5te]>;
996def : ProcNoItin<"arm966e-s",                           [ARMv5te]>;
997def : ProcNoItin<"arm968e-s",                           [ARMv5te]>;
998def : ProcNoItin<"arm10e",                              [ARMv5te]>;
999def : ProcNoItin<"arm1020e",                            [ARMv5te]>;
1000def : ProcNoItin<"arm1022e",                            [ARMv5te]>;
1001def : ProcNoItin<"xscale",                              [ARMv5te]>;
1002def : ProcNoItin<"iwmmxt",                              [ARMv5te]>;
1003
1004def : Processor<"arm1136j-s",       ARMV6Itineraries,   [ARMv6]>;
1005def : Processor<"arm1136jf-s",      ARMV6Itineraries,   [ARMv6,
1006                                                         FeatureVFP2,
1007                                                         FeatureHasSlowFPVMLx]>;
1008
1009def : Processor<"cortex-m0",        ARMV6Itineraries,   [ARMv6m,
1010                                                         FeatureHasNoBranchPredictor]>;
1011def : Processor<"cortex-m0plus",    ARMV6Itineraries,   [ARMv6m,
1012                                                         FeatureHasNoBranchPredictor]>;
1013def : Processor<"cortex-m1",        ARMV6Itineraries,   [ARMv6m,
1014                                                         FeatureHasNoBranchPredictor]>;
1015def : Processor<"sc000",            ARMV6Itineraries,   [ARMv6m,
1016                                                         FeatureHasNoBranchPredictor]>;
1017
1018def : Processor<"arm1176jz-s",      ARMV6Itineraries,   [ARMv6kz]>;
1019def : Processor<"arm1176jzf-s",     ARMV6Itineraries,   [ARMv6kz,
1020                                                         FeatureVFP2,
1021                                                         FeatureHasSlowFPVMLx]>;
1022
1023def : Processor<"mpcorenovfp",      ARMV6Itineraries,   [ARMv6k]>;
1024def : Processor<"mpcore",           ARMV6Itineraries,   [ARMv6k,
1025                                                         FeatureVFP2,
1026                                                         FeatureHasSlowFPVMLx]>;
1027
1028def : Processor<"arm1156t2-s",      ARMV6Itineraries,   [ARMv6t2]>;
1029def : Processor<"arm1156t2f-s",     ARMV6Itineraries,   [ARMv6t2,
1030                                                         FeatureVFP2,
1031                                                         FeatureHasSlowFPVMLx]>;
1032
1033def : ProcessorModel<"cortex-a5",   CortexA8Model,      [ARMv7a, ProcA5,
1034                                                         FeatureHasRetAddrStack,
1035                                                         FeatureTrustZone,
1036                                                         FeatureSlowFPBrcc,
1037                                                         FeatureHasSlowFPVMLx,
1038                                                         FeatureHasSlowFPVFMx,
1039                                                         FeatureVMLxForwarding,
1040                                                         FeatureMP,
1041                                                         FeatureVFP4]>;
1042
1043def : ProcessorModel<"cortex-a7",   CortexA8Model,      [ARMv7a, ProcA7,
1044                                                         FeatureHasRetAddrStack,
1045                                                         FeatureTrustZone,
1046                                                         FeatureSlowFPBrcc,
1047                                                         FeatureHasVMLxHazards,
1048                                                         FeatureHasSlowFPVMLx,
1049                                                         FeatureHasSlowFPVFMx,
1050                                                         FeatureVMLxForwarding,
1051                                                         FeatureMP,
1052                                                         FeatureVFP4,
1053                                                         FeatureVirtualization]>;
1054
1055def : ProcessorModel<"cortex-a8",   CortexA8Model,      [ARMv7a, ProcA8,
1056                                                         FeatureHasRetAddrStack,
1057                                                         FeatureNonpipelinedVFP,
1058                                                         FeatureTrustZone,
1059                                                         FeatureSlowFPBrcc,
1060                                                         FeatureHasVMLxHazards,
1061                                                         FeatureHasSlowFPVMLx,
1062                                                         FeatureHasSlowFPVFMx,
1063                                                         FeatureVMLxForwarding]>;
1064
1065def : ProcessorModel<"cortex-a9",   CortexA9Model,      [ARMv7a, ProcA9,
1066                                                         FeatureHasRetAddrStack,
1067                                                         FeatureTrustZone,
1068                                                         FeatureHasVMLxHazards,
1069                                                         FeatureVMLxForwarding,
1070                                                         FeatureFP16,
1071                                                         FeatureAvoidPartialCPSR,
1072                                                         FeatureExpandMLx,
1073                                                         FeaturePreferVMOVSR,
1074                                                         FeatureMuxedUnits,
1075                                                         FeatureNEONForFPMovs,
1076                                                         FeatureCheckVLDnAlign,
1077                                                         FeatureMP]>;
1078
1079def : ProcessorModel<"cortex-a12",  CortexA9Model,      [ARMv7a, ProcA12,
1080                                                         FeatureHasRetAddrStack,
1081                                                         FeatureTrustZone,
1082                                                         FeatureVMLxForwarding,
1083                                                         FeatureVFP4,
1084                                                         FeatureAvoidPartialCPSR,
1085                                                         FeatureVirtualization,
1086                                                         FeatureMP]>;
1087
1088def : ProcessorModel<"cortex-a15",  CortexA9Model,      [ARMv7a, ProcA15,
1089                                                         FeatureDontWidenVMOVS,
1090                                                         FeatureSplatVFPToNeon,
1091                                                         FeatureHasRetAddrStack,
1092                                                         FeatureMuxedUnits,
1093                                                         FeatureTrustZone,
1094                                                         FeatureVFP4,
1095                                                         FeatureMP,
1096                                                         FeatureCheckVLDnAlign,
1097                                                         FeatureAvoidPartialCPSR,
1098                                                         FeatureVirtualization]>;
1099
1100def : ProcessorModel<"cortex-a17",  CortexA9Model,      [ARMv7a, ProcA17,
1101                                                         FeatureHasRetAddrStack,
1102                                                         FeatureTrustZone,
1103                                                         FeatureMP,
1104                                                         FeatureVMLxForwarding,
1105                                                         FeatureVFP4,
1106                                                         FeatureAvoidPartialCPSR,
1107                                                         FeatureVirtualization]>;
1108
1109// FIXME: krait has currently the same features as A9 plus VFP4 and  HWDiv
1110def : ProcessorModel<"krait",       CortexA9Model,      [ARMv7a, ProcKrait,
1111                                                         FeatureHasRetAddrStack,
1112                                                         FeatureMuxedUnits,
1113                                                         FeatureCheckVLDnAlign,
1114                                                         FeatureVMLxForwarding,
1115                                                         FeatureFP16,
1116                                                         FeatureAvoidPartialCPSR,
1117                                                         FeatureVFP4,
1118                                                         FeatureHWDivThumb,
1119                                                         FeatureHWDivARM]>;
1120
1121def : ProcessorModel<"swift",       SwiftModel,         [ARMv7a, ProcSwift,
1122                                                         FeatureHasRetAddrStack,
1123                                                         FeatureNEONForFP,
1124                                                         FeatureVFP4,
1125                                                         FeatureUseWideStrideVFP,
1126                                                         FeatureMP,
1127                                                         FeatureHWDivThumb,
1128                                                         FeatureHWDivARM,
1129                                                         FeatureAvoidPartialCPSR,
1130                                                         FeatureAvoidMOVsShOp,
1131                                                         FeatureHasSlowFPVMLx,
1132                                                         FeatureHasSlowFPVFMx,
1133                                                         FeatureHasVMLxHazards,
1134                                                         FeatureProfUnpredicate,
1135                                                         FeaturePrefISHSTBarrier,
1136                                                         FeatureSlowOddRegister,
1137                                                         FeatureSlowLoadDSubreg,
1138                                                         FeatureSlowVGETLNi32,
1139                                                         FeatureSlowVDUP32,
1140                                                         FeatureUseMISched,
1141                                                         FeatureNoPostRASched]>;
1142
1143def : ProcessorModel<"cortex-r4",   CortexA8Model,      [ARMv7r, ProcR4,
1144                                                         FeatureHasRetAddrStack,
1145                                                         FeatureAvoidPartialCPSR]>;
1146
1147def : ProcessorModel<"cortex-r4f",  CortexA8Model,      [ARMv7r, ProcR4,
1148                                                         FeatureHasRetAddrStack,
1149                                                         FeatureSlowFPBrcc,
1150                                                         FeatureHasSlowFPVMLx,
1151                                                         FeatureHasSlowFPVFMx,
1152                                                         FeatureVFP3_D16,
1153                                                         FeatureAvoidPartialCPSR]>;
1154
1155def : ProcessorModel<"cortex-r5",   CortexA8Model,      [ARMv7r, ProcR5,
1156                                                         FeatureHasRetAddrStack,
1157                                                         FeatureVFP3_D16,
1158                                                         FeatureSlowFPBrcc,
1159                                                         FeatureHWDivARM,
1160                                                         FeatureHasSlowFPVMLx,
1161                                                         FeatureHasSlowFPVFMx,
1162                                                         FeatureAvoidPartialCPSR]>;
1163
1164def : ProcessorModel<"cortex-r7",   CortexA8Model,      [ARMv7r, ProcR7,
1165                                                         FeatureHasRetAddrStack,
1166                                                         FeatureVFP3_D16,
1167                                                         FeatureFP16,
1168                                                         FeatureMP,
1169                                                         FeatureSlowFPBrcc,
1170                                                         FeatureHWDivARM,
1171                                                         FeatureHasSlowFPVMLx,
1172                                                         FeatureHasSlowFPVFMx,
1173                                                         FeatureAvoidPartialCPSR]>;
1174
1175def : ProcessorModel<"cortex-r8",   CortexA8Model,      [ARMv7r,
1176                                                         FeatureHasRetAddrStack,
1177                                                         FeatureVFP3_D16,
1178                                                         FeatureFP16,
1179                                                         FeatureMP,
1180                                                         FeatureSlowFPBrcc,
1181                                                         FeatureHWDivARM,
1182                                                         FeatureHasSlowFPVMLx,
1183                                                         FeatureHasSlowFPVFMx,
1184                                                         FeatureAvoidPartialCPSR]>;
1185
1186def : ProcessorModel<"cortex-m3",   CortexM4Model,      [ARMv7m,
1187                                                         ProcM3,
1188                                                         FeaturePrefLoopAlign32,
1189                                                         FeatureUseMISched,
1190                                                         FeatureHasNoBranchPredictor]>;
1191
1192def : ProcessorModel<"sc300",       CortexM4Model,      [ARMv7m,
1193                                                         ProcM3,
1194                                                         FeatureUseMISched,
1195                                                         FeatureHasNoBranchPredictor]>;
1196
1197def : ProcessorModel<"cortex-m4", CortexM4Model,        [ARMv7em,
1198                                                         FeatureVFP4_D16_SP,
1199                                                         FeaturePrefLoopAlign32,
1200                                                         FeatureHasSlowFPVMLx,
1201                                                         FeatureHasSlowFPVFMx,
1202                                                         FeatureUseMISched,
1203                                                         FeatureHasNoBranchPredictor]>;
1204
1205def : ProcessorModel<"cortex-m7", CortexM7Model,        [ARMv7em,
1206                                                         ProcM7,
1207                                                         FeatureFPARMv8_D16,
1208                                                         FeatureUseMISched]>;
1209
1210def : ProcNoItin<"cortex-m23",                          [ARMv8mBaseline,
1211                                                         FeatureNoMovt,
1212                                                         FeatureHasNoBranchPredictor]>;
1213
1214def : ProcessorModel<"cortex-m33", CortexM4Model,       [ARMv8mMainline,
1215                                                         FeatureDSP,
1216                                                         FeatureFPARMv8_D16_SP,
1217                                                         FeaturePrefLoopAlign32,
1218                                                         FeatureHasSlowFPVMLx,
1219                                                         FeatureHasSlowFPVFMx,
1220                                                         FeatureUseMISched,
1221                                                         FeatureHasNoBranchPredictor,
1222                                                         FeatureFixCMSE_CVE_2021_35465]>;
1223
1224def : ProcessorModel<"cortex-m35p", CortexM4Model,      [ARMv8mMainline,
1225                                                         FeatureDSP,
1226                                                         FeatureFPARMv8_D16_SP,
1227                                                         FeaturePrefLoopAlign32,
1228                                                         FeatureHasSlowFPVMLx,
1229                                                         FeatureHasSlowFPVFMx,
1230                                                         FeatureUseMISched,
1231                                                         FeatureHasNoBranchPredictor,
1232                                                         FeatureFixCMSE_CVE_2021_35465]>;
1233
1234def : ProcessorModel<"cortex-m55", CortexM4Model,      [ARMv81mMainline,
1235                                                         FeatureDSP,
1236                                                         FeatureFPARMv8_D16,
1237                                                         FeatureUseMISched,
1238                                                         FeatureHasNoBranchPredictor,
1239                                                         FeaturePrefLoopAlign32,
1240                                                         FeatureHasSlowFPVMLx,
1241                                                         HasMVEFloatOps,
1242                                                         FeatureFixCMSE_CVE_2021_35465]>;
1243
1244def : ProcNoItin<"cortex-a32",                           [ARMv8a,
1245                                                         FeatureHWDivThumb,
1246                                                         FeatureHWDivARM,
1247                                                         FeatureCrypto,
1248                                                         FeatureCRC]>;
1249
1250def : ProcNoItin<"cortex-a35",                          [ARMv8a, ProcA35,
1251                                                         FeatureHWDivThumb,
1252                                                         FeatureHWDivARM,
1253                                                         FeatureCrypto,
1254                                                         FeatureCRC]>;
1255
1256def : ProcNoItin<"cortex-a53",                          [ARMv8a, ProcA53,
1257                                                         FeatureHWDivThumb,
1258                                                         FeatureHWDivARM,
1259                                                         FeatureCrypto,
1260                                                         FeatureCRC,
1261                                                         FeatureFPAO]>;
1262
1263def : ProcNoItin<"cortex-a55",                          [ARMv82a, ProcA55,
1264                                                         FeatureHWDivThumb,
1265                                                         FeatureHWDivARM,
1266                                                         FeatureDotProd]>;
1267
1268def : ProcessorModel<"cortex-a57",  CortexA57Model,     [ARMv8a, ProcA57,
1269                                                         FeatureHWDivThumb,
1270                                                         FeatureHWDivARM,
1271                                                         FeatureCrypto,
1272                                                         FeatureCRC,
1273                                                         FeatureFPAO,
1274                                                         FeatureAvoidPartialCPSR,
1275                                                         FeatureCheapPredicableCPSR]>;
1276
1277def : ProcessorModel<"cortex-a72",  CortexA57Model,     [ARMv8a, ProcA72,
1278                                                         FeatureHWDivThumb,
1279                                                         FeatureHWDivARM,
1280                                                         FeatureCrypto,
1281                                                         FeatureCRC]>;
1282
1283def : ProcNoItin<"cortex-a73",                          [ARMv8a, ProcA73,
1284                                                         FeatureHWDivThumb,
1285                                                         FeatureHWDivARM,
1286                                                         FeatureCrypto,
1287                                                         FeatureCRC]>;
1288
1289def : ProcNoItin<"cortex-a75",                          [ARMv82a, ProcA75,
1290                                                         FeatureHWDivThumb,
1291                                                         FeatureHWDivARM,
1292                                                         FeatureDotProd]>;
1293
1294def : ProcNoItin<"cortex-a76",                          [ARMv82a, ProcA76,
1295                                                         FeatureHWDivThumb,
1296                                                         FeatureHWDivARM,
1297                                                         FeatureCrypto,
1298                                                         FeatureCRC,
1299                                                         FeatureFullFP16,
1300                                                         FeatureDotProd]>;
1301
1302def : ProcNoItin<"cortex-a76ae",                        [ARMv82a, ProcA76,
1303                                                         FeatureHWDivThumb,
1304                                                         FeatureHWDivARM,
1305                                                         FeatureCrypto,
1306                                                         FeatureCRC,
1307                                                         FeatureFullFP16,
1308                                                         FeatureDotProd]>;
1309
1310def : ProcNoItin<"cortex-a77",                          [ARMv82a, ProcA77,
1311                                                         FeatureHWDivThumb,
1312                                                         FeatureHWDivARM,
1313                                                         FeatureCrypto,
1314                                                         FeatureCRC,
1315                                                         FeatureFullFP16,
1316                                                         FeatureDotProd]>;
1317
1318def : ProcNoItin<"cortex-a78",                          [ARMv82a, ProcA78,
1319                                                         FeatureHWDivThumb,
1320                                                         FeatureHWDivARM,
1321                                                         FeatureCrypto,
1322                                                         FeatureCRC,
1323                                                         FeatureFullFP16,
1324                                                         FeatureDotProd]>;
1325
1326def : ProcNoItin<"cortex-a78c",                         [ARMv82a, ProcA78C,
1327                                                         FeatureHWDivThumb,
1328                                                         FeatureHWDivARM,
1329                                                         FeatureCrypto,
1330                                                         FeatureCRC,
1331                                                         FeatureDotProd,
1332                                                         FeatureFullFP16]>;
1333
1334def : ProcNoItin<"cortex-x1",                           [ARMv82a, ProcX1,
1335                                                         FeatureHWDivThumb,
1336                                                         FeatureHWDivARM,
1337                                                         FeatureCrypto,
1338                                                         FeatureCRC,
1339                                                         FeatureFullFP16,
1340                                                         FeatureDotProd]>;
1341
1342def : ProcNoItin<"neoverse-v1",                         [ARMv84a,
1343                                                         FeatureHWDivThumb,
1344                                                         FeatureHWDivARM,
1345                                                         FeatureCrypto,
1346                                                         FeatureCRC,
1347                                                         FeatureFullFP16,
1348                                                         FeatureBF16,
1349                                                         FeatureMatMulInt8]>;
1350
1351def : ProcNoItin<"neoverse-n1",                         [ARMv82a,
1352                                                         FeatureHWDivThumb,
1353                                                         FeatureHWDivARM,
1354                                                         FeatureCrypto,
1355                                                         FeatureCRC,
1356                                                         FeatureDotProd]>;
1357
1358def : ProcNoItin<"neoverse-n2",                         [ARMv85a,
1359                                                         FeatureBF16,
1360                                                         FeatureMatMulInt8,
1361                                                         FeaturePerfMon]>;
1362
1363def : ProcessorModel<"cyclone",     SwiftModel,         [ARMv8a, ProcSwift,
1364                                                         FeatureHasRetAddrStack,
1365                                                         FeatureNEONForFP,
1366                                                         FeatureVFP4,
1367                                                         FeatureMP,
1368                                                         FeatureHWDivThumb,
1369                                                         FeatureHWDivARM,
1370                                                         FeatureAvoidPartialCPSR,
1371                                                         FeatureAvoidMOVsShOp,
1372                                                         FeatureHasSlowFPVMLx,
1373                                                         FeatureHasSlowFPVFMx,
1374                                                         FeatureCrypto,
1375                                                         FeatureUseMISched,
1376                                                         FeatureZCZeroing,
1377                                                         FeatureNoPostRASched]>;
1378
1379def : ProcNoItin<"exynos-m3",                           [ARMv8a, ProcExynos]>;
1380def : ProcNoItin<"exynos-m4",                           [ARMv82a, ProcExynos,
1381                                                         FeatureFullFP16,
1382                                                         FeatureDotProd]>;
1383def : ProcNoItin<"exynos-m5",                           [ARMv82a, ProcExynos,
1384                                                         FeatureFullFP16,
1385                                                         FeatureDotProd]>;
1386
1387def : ProcNoItin<"kryo",                                [ARMv8a, ProcKryo,
1388                                                         FeatureHWDivThumb,
1389                                                         FeatureHWDivARM,
1390                                                         FeatureCrypto,
1391                                                         FeatureCRC]>;
1392
1393def : ProcessorModel<"cortex-r52", CortexR52Model,      [ARMv8r, ProcR52,
1394                                                         FeatureUseMISched,
1395                                                         FeatureFPAO]>;
1396
1397//===----------------------------------------------------------------------===//
1398// Declare the target which we are implementing
1399//===----------------------------------------------------------------------===//
1400
1401def ARMAsmWriter : AsmWriter {
1402  string AsmWriterClassName  = "InstPrinter";
1403  int PassSubtarget = 1;
1404  int Variant = 0;
1405  bit isMCAsmWriter = 1;
1406}
1407
1408def ARMAsmParser : AsmParser {
1409  bit ReportMultipleNearMisses = 1;
1410}
1411
1412def ARMAsmParserVariant : AsmParserVariant {
1413  int Variant = 0;
1414  string Name = "ARM";
1415  string BreakCharacters = ".";
1416}
1417
1418def ARM : Target {
1419  // Pull in Instruction Info.
1420  let InstructionSet = ARMInstrInfo;
1421  let AssemblyWriters = [ARMAsmWriter];
1422  let AssemblyParsers = [ARMAsmParser];
1423  let AssemblyParserVariants = [ARMAsmParserVariant];
1424  let AllowRegisterRenaming = 1;
1425}
1426