1//===-- VOPInstructions.td - Vector Instruction Defintions ----------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10// dummies for outer let
11class LetDummies {
12  bit isCommutable;
13  bit isConvertibleToThreeAddress;
14  bit isMoveImm;
15  bit isReMaterializable;
16  bit isAsCheapAsAMove;
17  bit VOPAsmPrefer32Bit;
18  Predicate SubtargetPredicate;
19  string Constraints;
20  string DisableEncoding;
21  list<SchedReadWrite> SchedRW;
22  list<Register> Uses;
23  list<Register> Defs;
24}
25
26class VOP <string opName> {
27  string OpName = opName;
28}
29
30class VOPAnyCommon <dag outs, dag ins, string asm, list<dag> pattern> :
31    InstSI <outs, ins, asm, pattern> {
32
33  let mayLoad = 0;
34  let mayStore = 0;
35  let hasSideEffects = 0;
36  let UseNamedOperandTable = 1;
37  let VALU = 1;
38  let Uses = [EXEC];
39}
40
41class VOP3Common <dag outs, dag ins, string asm = "",
42                  list<dag> pattern = [], bit HasMods = 0,
43                  bit VOP3Only = 0> :
44  VOPAnyCommon <outs, ins, asm, pattern> {
45
46  // Using complex patterns gives VOP3 patterns a very high complexity rating,
47  // but standalone patterns are almost always preferred, so we need to adjust the
48  // priority lower.  The goal is to use a high number to reduce complexity to
49  // zero (or less than zero).
50  let AddedComplexity = -1000;
51
52  let VOP3 = 1;
53
54  let AsmMatchConverter =
55    !if(!eq(VOP3Only,1),
56        "cvtVOP3",
57        !if(!eq(HasMods,1), "cvtVOP3_2_mod", ""));
58
59  let AsmVariantName = AMDGPUAsmVariants.VOP3;
60
61  let isCodeGenOnly = 0;
62
63  int Size = 8;
64
65  // Because SGPRs may be allowed if there are multiple operands, we
66  // need a post-isel hook to insert copies in order to avoid
67  // violating constant bus requirements.
68  let hasPostISelHook = 1;
69}
70
71class VOP3_Pseudo <string opName, VOPProfile P, list<dag> pattern=[], bit VOP3Only = 0> :
72  InstSI <P.Outs64, P.Ins64, "", pattern>,
73  VOP <opName>,
74  SIMCInstr<opName#"_e64", SIEncodingFamily.NONE>,
75  MnemonicAlias<opName#"_e64", opName> {
76
77  let isPseudo = 1;
78  let isCodeGenOnly = 1;
79  let UseNamedOperandTable = 1;
80
81  string Mnemonic = opName;
82  string AsmOperands = P.Asm64;
83
84  let Size = 8;
85  let mayLoad = 0;
86  let mayStore = 0;
87  let hasSideEffects = 0;
88  let SubtargetPredicate = isGCN;
89
90  // Because SGPRs may be allowed if there are multiple operands, we
91  // need a post-isel hook to insert copies in order to avoid
92  // violating constant bus requirements.
93  let hasPostISelHook = 1;
94
95  // Using complex patterns gives VOP3 patterns a very high complexity rating,
96  // but standalone patterns are almost always preferred, so we need to adjust the
97  // priority lower.  The goal is to use a high number to reduce complexity to
98  // zero (or less than zero).
99  let AddedComplexity = -1000;
100
101  let VOP3 = 1;
102  let VALU = 1;
103  let Uses = [EXEC];
104
105  let AsmVariantName = AMDGPUAsmVariants.VOP3;
106  let AsmMatchConverter =
107    !if(!eq(VOP3Only,1),
108        "cvtVOP3",
109        !if(!eq(P.HasModifiers, 1), "cvtVOP3_2_mod", ""));
110
111  VOPProfile Pfl = P;
112}
113
114class VOP3_Real <VOP3_Pseudo ps, int EncodingFamily> :
115  InstSI <ps.OutOperandList, ps.InOperandList, ps.Mnemonic # ps.AsmOperands, []>,
116  SIMCInstr <ps.PseudoInstr, EncodingFamily> {
117
118  let isPseudo = 0;
119  let isCodeGenOnly = 0;
120
121  // copy relevant pseudo op flags
122  let SubtargetPredicate = ps.SubtargetPredicate;
123  let AsmMatchConverter  = ps.AsmMatchConverter;
124  let AsmVariantName     = ps.AsmVariantName;
125  let Constraints        = ps.Constraints;
126  let DisableEncoding    = ps.DisableEncoding;
127  let TSFlags            = ps.TSFlags;
128}
129
130class VOP3a<VOPProfile P> : Enc64 {
131  bits<2> src0_modifiers;
132  bits<9> src0;
133  bits<2> src1_modifiers;
134  bits<9> src1;
135  bits<2> src2_modifiers;
136  bits<9> src2;
137  bits<1> clamp;
138  bits<2> omod;
139
140  let Inst{8}     = !if(P.HasSrc0Mods, src0_modifiers{1}, 0);
141  let Inst{9}     = !if(P.HasSrc1Mods, src1_modifiers{1}, 0);
142  let Inst{10}    = !if(P.HasSrc2Mods, src2_modifiers{1}, 0);
143
144  let Inst{31-26} = 0x34; //encoding
145  let Inst{40-32} = !if(P.HasSrc0, src0, 0);
146  let Inst{49-41} = !if(P.HasSrc1, src1, 0);
147  let Inst{58-50} = !if(P.HasSrc2, src2, 0);
148  let Inst{60-59} = !if(P.HasOMod, omod, 0);
149  let Inst{61}    = !if(P.HasSrc0Mods, src0_modifiers{0}, 0);
150  let Inst{62}    = !if(P.HasSrc1Mods, src1_modifiers{0}, 0);
151  let Inst{63}    = !if(P.HasSrc2Mods, src2_modifiers{0}, 0);
152}
153
154class VOP3a_si <bits<9> op, VOPProfile P> : VOP3a<P> {
155  let Inst{25-17} = op;
156  let Inst{11}    = !if(P.HasClamp, clamp{0}, 0);
157}
158
159class VOP3a_vi <bits<10> op, VOPProfile P> : VOP3a<P> {
160  let Inst{25-16} = op;
161  let Inst{15}    = !if(P.HasClamp, clamp{0}, 0);
162}
163
164class VOP3e_si <bits<9> op, VOPProfile P> : VOP3a_si <op, P> {
165  bits<8> vdst;
166  let Inst{7-0} = !if(P.EmitDst, vdst{7-0}, 0);
167}
168
169class VOP3e_vi <bits<10> op, VOPProfile P> : VOP3a_vi <op, P> {
170  bits<8> vdst;
171  let Inst{7-0} = !if(P.EmitDst, vdst{7-0}, 0);
172}
173
174class VOP3be <VOPProfile P> : Enc64 {
175  bits<8> vdst;
176  bits<2> src0_modifiers;
177  bits<9> src0;
178  bits<2> src1_modifiers;
179  bits<9> src1;
180  bits<2> src2_modifiers;
181  bits<9> src2;
182  bits<7> sdst;
183  bits<2> omod;
184
185  let Inst{7-0}   = vdst;
186  let Inst{14-8}  = sdst;
187  let Inst{31-26} = 0x34; //encoding
188  let Inst{40-32} = !if(P.HasSrc0, src0, 0);
189  let Inst{49-41} = !if(P.HasSrc1, src1, 0);
190  let Inst{58-50} = !if(P.HasSrc2, src2, 0);
191  let Inst{60-59} = !if(P.HasOMod, omod, 0);
192  let Inst{61}    = !if(P.HasSrc0Mods, src0_modifiers{0}, 0);
193  let Inst{62}    = !if(P.HasSrc1Mods, src1_modifiers{0}, 0);
194  let Inst{63}    = !if(P.HasSrc2Mods, src2_modifiers{0}, 0);
195}
196
197class VOP3be_si <bits<9> op, VOPProfile P> : VOP3be<P> {
198  let Inst{25-17} = op;
199}
200
201class VOP3be_vi <bits<10> op, VOPProfile P> : VOP3be<P> {
202  bits<1> clamp;
203  let Inst{25-16} = op;
204  let Inst{15}    = !if(P.HasClamp, clamp{0}, 0);
205}
206
207class VOP_SDWAe<VOPProfile P> : Enc64 {
208  bits<8> src0;
209  bits<3> src0_sel;
210  bits<2> src0_modifiers; // float: {abs,neg}, int {sext}
211  bits<3> src1_sel;
212  bits<2> src1_modifiers;
213  bits<3> dst_sel;
214  bits<2> dst_unused;
215  bits<1> clamp;
216
217  bits<3> SDWA_DWORD = 6;
218  bits<2> SDWA_UNUSED_PRESERVE = 2;
219
220  let Inst{39-32} = !if(P.HasSrc0, src0{7-0}, 0);
221  let Inst{42-40} = !if(P.EmitDst, dst_sel{2-0}, SDWA_DWORD{2-0});
222  let Inst{44-43} = !if(P.EmitDst, dst_unused{1-0}, SDWA_UNUSED_PRESERVE{1-0});
223  let Inst{45}    = !if(P.HasSDWAClamp, clamp{0}, 0);
224  let Inst{50-48} = !if(P.HasSrc0, src0_sel{2-0}, SDWA_DWORD{2-0});
225  let Inst{53-52} = !if(P.HasSrc0FloatMods, src0_modifiers{1-0}, 0);
226  let Inst{51}    = !if(P.HasSrc0IntMods, src0_modifiers{0}, 0);
227  let Inst{58-56} = !if(P.HasSrc1, src1_sel{2-0}, SDWA_DWORD{2-0});
228  let Inst{61-60} = !if(P.HasSrc1FloatMods, src1_modifiers{1-0}, 0);
229  let Inst{59}    = !if(P.HasSrc1IntMods, src1_modifiers{0}, 0);
230}
231
232class VOP_SDWA <string OpName, VOPProfile P> :
233  InstSI <P.OutsSDWA, P.InsSDWA, OpName#P.AsmSDWA, []>,
234  VOP_SDWAe<P> {
235  let mayLoad = 0;
236  let mayStore = 0;
237  let hasSideEffects = 0;
238  let UseNamedOperandTable = 1;
239  let VALU = 1;
240  let SDWA = 1;
241  let Size = 8;
242
243  let SubtargetPredicate = isVI;
244  let AssemblerPredicate = !if(P.HasExt, isVI, DisableInst);
245  let AsmVariantName = !if(P.HasExt, AMDGPUAsmVariants.SDWA,
246                                     AMDGPUAsmVariants.Disable);
247  let DecoderNamespace = "SDWA";
248}
249
250class VOP_DPPe<VOPProfile P> : Enc64 {
251  bits<2> src0_modifiers;
252  bits<8> src0;
253  bits<2> src1_modifiers;
254  bits<9> dpp_ctrl;
255  bits<1> bound_ctrl;
256  bits<4> bank_mask;
257  bits<4> row_mask;
258
259  let Inst{39-32} = !if(P.HasSrc0, src0{7-0}, 0);
260  let Inst{48-40} = dpp_ctrl;
261  let Inst{51}    = bound_ctrl;
262  let Inst{52}    = !if(P.HasSrc0Mods, src0_modifiers{0}, 0); // src0_neg
263  let Inst{53}    = !if(P.HasSrc0Mods, src0_modifiers{1}, 0); // src0_abs
264  let Inst{54}    = !if(P.HasSrc1Mods, src1_modifiers{0}, 0); // src1_neg
265  let Inst{55}    = !if(P.HasSrc1Mods, src1_modifiers{1}, 0); // src1_abs
266  let Inst{59-56} = bank_mask;
267  let Inst{63-60} = row_mask;
268}
269
270class VOP_DPP <string OpName, VOPProfile P> :
271  InstSI <P.OutsDPP, P.InsDPP, OpName#P.AsmDPP, []>,
272  VOP_DPPe<P> {
273
274  let mayLoad = 0;
275  let mayStore = 0;
276  let hasSideEffects = 0;
277  let UseNamedOperandTable = 1;
278
279  let VALU = 1;
280  let DPP = 1;
281  let Size = 8;
282
283  let AsmMatchConverter = !if(!eq(P.HasModifiers,1), "cvtDPP", "");
284  let SubtargetPredicate = isVI;
285  let AssemblerPredicate = !if(P.HasExt, isVI, DisableInst);
286  let AsmVariantName = !if(P.HasExt, AMDGPUAsmVariants.DPP,
287                                     AMDGPUAsmVariants.Disable);
288  let DecoderNamespace = "DPP";
289}
290
291include "VOPCInstructions.td"
292include "VOP1Instructions.td"
293include "VOP2Instructions.td"
294include "VOP3Instructions.td"
295