1//===-- VOPInstructions.td - Vector Instruction Defintions ----------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10// dummies for outer let
11class LetDummies {
12  bit isCommutable;
13  bit isConvertibleToThreeAddress;
14  bit isMoveImm;
15  bit isReMaterializable;
16  bit isAsCheapAsAMove;
17  bit VOPAsmPrefer32Bit;
18  Predicate SubtargetPredicate;
19  string Constraints;
20  string DisableEncoding;
21  list<SchedReadWrite> SchedRW;
22  list<Register> Uses;
23  list<Register> Defs;
24}
25
26class VOP <string opName> {
27  string OpName = opName;
28}
29
30class VOPAnyCommon <dag outs, dag ins, string asm, list<dag> pattern> :
31    InstSI <outs, ins, asm, pattern> {
32
33  let mayLoad = 0;
34  let mayStore = 0;
35  let hasSideEffects = 0;
36  let UseNamedOperandTable = 1;
37  let VALU = 1;
38  let Uses = [EXEC];
39}
40
41class VOP3Common <dag outs, dag ins, string asm = "",
42                  list<dag> pattern = [], bit HasMods = 0,
43                  bit VOP3Only = 0> :
44  VOPAnyCommon <outs, ins, asm, pattern> {
45
46  // Using complex patterns gives VOP3 patterns a very high complexity rating,
47  // but standalone patterns are almost always preferred, so we need to adjust the
48  // priority lower.  The goal is to use a high number to reduce complexity to
49  // zero (or less than zero).
50  let AddedComplexity = -1000;
51
52  let VOP3 = 1;
53
54  let AsmMatchConverter =
55    !if(!eq(VOP3Only,1),
56        "cvtVOP3",
57        !if(!eq(HasMods,1), "cvtVOP3_2_mod", ""));
58
59  let AsmVariantName = AMDGPUAsmVariants.VOP3;
60
61  let isCodeGenOnly = 0;
62
63  int Size = 8;
64
65  // Because SGPRs may be allowed if there are multiple operands, we
66  // need a post-isel hook to insert copies in order to avoid
67  // violating constant bus requirements.
68  let hasPostISelHook = 1;
69}
70
71class VOP3_Pseudo <string opName, VOPProfile P, list<dag> pattern=[], bit VOP3Only = 0> :
72  InstSI <P.Outs64, P.Ins64, "", pattern>,
73  VOP <opName>,
74  SIMCInstr<opName#"_e64", SIEncodingFamily.NONE>,
75  MnemonicAlias<opName#"_e64", opName> {
76
77  let isPseudo = 1;
78  let isCodeGenOnly = 1;
79  let UseNamedOperandTable = 1;
80
81  string Mnemonic = opName;
82  string AsmOperands = P.Asm64;
83
84  let Size = 8;
85  let mayLoad = 0;
86  let mayStore = 0;
87  let hasSideEffects = 0;
88  let SubtargetPredicate = isGCN;
89
90  // Because SGPRs may be allowed if there are multiple operands, we
91  // need a post-isel hook to insert copies in order to avoid
92  // violating constant bus requirements.
93  let hasPostISelHook = 1;
94
95  // Using complex patterns gives VOP3 patterns a very high complexity rating,
96  // but standalone patterns are almost always preferred, so we need to adjust the
97  // priority lower.  The goal is to use a high number to reduce complexity to
98  // zero (or less than zero).
99  let AddedComplexity = -1000;
100
101  let VOP3 = 1;
102  let VALU = 1;
103  let FPClamp = P.HasFPClamp;
104  let Uses = [EXEC];
105
106  let AsmVariantName = AMDGPUAsmVariants.VOP3;
107  let AsmMatchConverter =
108    !if(!eq(VOP3Only,1),
109        "cvtVOP3",
110        !if(!eq(P.HasModifiers, 1), "cvtVOP3_2_mod", ""));
111
112  VOPProfile Pfl = P;
113}
114
115class VOP3_Real <VOP3_Pseudo ps, int EncodingFamily> :
116  InstSI <ps.OutOperandList, ps.InOperandList, ps.Mnemonic # ps.AsmOperands, []>,
117  SIMCInstr <ps.PseudoInstr, EncodingFamily> {
118
119  let isPseudo = 0;
120  let isCodeGenOnly = 0;
121
122  let Constraints     = ps.Constraints;
123  let DisableEncoding = ps.DisableEncoding;
124
125  // copy relevant pseudo op flags
126  let SubtargetPredicate = ps.SubtargetPredicate;
127  let AsmMatchConverter  = ps.AsmMatchConverter;
128  let AsmVariantName     = ps.AsmVariantName;
129  let Constraints        = ps.Constraints;
130  let DisableEncoding    = ps.DisableEncoding;
131  let TSFlags            = ps.TSFlags;
132}
133
134class VOP3a<VOPProfile P> : Enc64 {
135  bits<2> src0_modifiers;
136  bits<9> src0;
137  bits<2> src1_modifiers;
138  bits<9> src1;
139  bits<2> src2_modifiers;
140  bits<9> src2;
141  bits<1> clamp;
142  bits<2> omod;
143
144  let Inst{8}     = !if(P.HasSrc0Mods, src0_modifiers{1}, 0);
145  let Inst{9}     = !if(P.HasSrc1Mods, src1_modifiers{1}, 0);
146  let Inst{10}    = !if(P.HasSrc2Mods, src2_modifiers{1}, 0);
147
148  let Inst{31-26} = 0x34; //encoding
149  let Inst{40-32} = !if(P.HasSrc0, src0, 0);
150  let Inst{49-41} = !if(P.HasSrc1, src1, 0);
151  let Inst{58-50} = !if(P.HasSrc2, src2, 0);
152  let Inst{60-59} = !if(P.HasOMod, omod, 0);
153  let Inst{61}    = !if(P.HasSrc0Mods, src0_modifiers{0}, 0);
154  let Inst{62}    = !if(P.HasSrc1Mods, src1_modifiers{0}, 0);
155  let Inst{63}    = !if(P.HasSrc2Mods, src2_modifiers{0}, 0);
156}
157
158class VOP3a_si <bits<9> op, VOPProfile P> : VOP3a<P> {
159  let Inst{25-17} = op;
160  let Inst{11}    = !if(P.HasClamp, clamp{0}, 0);
161}
162
163class VOP3a_vi <bits<10> op, VOPProfile P> : VOP3a<P> {
164  let Inst{25-16} = op;
165  let Inst{15}    = !if(P.HasClamp, clamp{0}, 0);
166}
167
168class VOP3e_si <bits<9> op, VOPProfile P> : VOP3a_si <op, P> {
169  bits<8> vdst;
170  let Inst{7-0} = !if(P.EmitDst, vdst{7-0}, 0);
171}
172
173class VOP3e_vi <bits<10> op, VOPProfile P> : VOP3a_vi <op, P> {
174  bits<8> vdst;
175  let Inst{7-0} = !if(P.EmitDst, vdst{7-0}, 0);
176}
177
178class VOP3be <VOPProfile P> : Enc64 {
179  bits<8> vdst;
180  bits<2> src0_modifiers;
181  bits<9> src0;
182  bits<2> src1_modifiers;
183  bits<9> src1;
184  bits<2> src2_modifiers;
185  bits<9> src2;
186  bits<7> sdst;
187  bits<2> omod;
188
189  let Inst{7-0}   = vdst;
190  let Inst{14-8}  = sdst;
191  let Inst{31-26} = 0x34; //encoding
192  let Inst{40-32} = !if(P.HasSrc0, src0, 0);
193  let Inst{49-41} = !if(P.HasSrc1, src1, 0);
194  let Inst{58-50} = !if(P.HasSrc2, src2, 0);
195  let Inst{60-59} = !if(P.HasOMod, omod, 0);
196  let Inst{61}    = !if(P.HasSrc0Mods, src0_modifiers{0}, 0);
197  let Inst{62}    = !if(P.HasSrc1Mods, src1_modifiers{0}, 0);
198  let Inst{63}    = !if(P.HasSrc2Mods, src2_modifiers{0}, 0);
199}
200
201class VOP3be_si <bits<9> op, VOPProfile P> : VOP3be<P> {
202  let Inst{25-17} = op;
203}
204
205class VOP3be_vi <bits<10> op, VOPProfile P> : VOP3be<P> {
206  bits<1> clamp;
207  let Inst{25-16} = op;
208  let Inst{15}    = !if(P.HasClamp, clamp{0}, 0);
209}
210
211def SDWA {
212  // sdwa_sel
213  int BYTE_0 = 0;
214  int BYTE_1 = 1;
215  int BYTE_2 = 2;
216  int BYTE_3 = 3;
217  int WORD_0 = 4;
218  int WORD_1 = 5;
219  int DWORD = 6;
220
221  // dst_unused
222  int UNUSED_PAD = 0;
223  int UNUSED_SEXT = 1;
224  int UNUSED_PRESERVE = 2;
225}
226
227class VOP_SDWAe<VOPProfile P> : Enc64 {
228  bits<8> src0;
229  bits<3> src0_sel;
230  bits<2> src0_modifiers; // float: {abs,neg}, int {sext}
231  bits<3> src1_sel;
232  bits<2> src1_modifiers;
233  bits<3> dst_sel;
234  bits<2> dst_unused;
235  bits<1> clamp;
236
237  let Inst{39-32} = !if(P.HasSrc0, src0{7-0}, 0);
238  let Inst{42-40} = !if(P.EmitDst, dst_sel{2-0}, SDWA.DWORD);
239  let Inst{44-43} = !if(P.EmitDst, dst_unused{1-0}, SDWA.UNUSED_PRESERVE);
240  let Inst{45}    = !if(P.HasSDWAClamp, clamp{0}, 0);
241  let Inst{50-48} = !if(P.HasSrc0, src0_sel{2-0}, SDWA.DWORD);
242  let Inst{53-52} = !if(P.HasSrc0FloatMods, src0_modifiers{1-0}, 0);
243  let Inst{51}    = !if(P.HasSrc0IntMods, src0_modifiers{0}, 0);
244  let Inst{58-56} = !if(P.HasSrc1, src1_sel{2-0}, SDWA.DWORD);
245  let Inst{61-60} = !if(P.HasSrc1FloatMods, src1_modifiers{1-0}, 0);
246  let Inst{59}    = !if(P.HasSrc1IntMods, src1_modifiers{0}, 0);
247}
248
249class VOP_SDWA_Pseudo <string opName, VOPProfile P, list<dag> pattern=[]> :
250  InstSI <P.OutsSDWA, P.InsSDWA, "", pattern>,
251  VOP <opName>,
252  SIMCInstr <opName#"_sdwa", SIEncodingFamily.NONE>,
253  MnemonicAlias <opName#"_sdwa", opName> {
254
255  let isPseudo = 1;
256  let isCodeGenOnly = 1;
257  let UseNamedOperandTable = 1;
258
259  string Mnemonic = opName;
260  string AsmOperands = P.AsmSDWA;
261
262  let Size = 8;
263  let mayLoad = 0;
264  let mayStore = 0;
265  let hasSideEffects = 0;
266
267  let VALU = 1;
268  let SDWA = 1;
269  let Uses = [EXEC];
270
271  let SubtargetPredicate = HasSDWA;
272  let AssemblerPredicate = !if(P.HasExt, HasSDWA, DisableInst);
273  let AsmVariantName = !if(P.HasExt, AMDGPUAsmVariants.SDWA,
274                                     AMDGPUAsmVariants.Disable);
275  let DecoderNamespace = "SDWA";
276
277  VOPProfile Pfl = P;
278}
279
280class VOP_SDWA_Real <VOP_SDWA_Pseudo ps> :
281  InstSI <ps.OutOperandList, ps.InOperandList, ps.Mnemonic # ps.AsmOperands, []>,
282  SIMCInstr <ps.PseudoInstr, SIEncodingFamily.VI> {
283
284  let isPseudo = 0;
285  let isCodeGenOnly = 0;
286
287  let Defs = ps.Defs;
288  let Uses = ps.Uses;
289  let SchedRW = ps.SchedRW;
290  let hasSideEffects = ps.hasSideEffects;
291
292  let Constraints     = ps.Constraints;
293  let DisableEncoding = ps.DisableEncoding;
294
295  // Copy relevant pseudo op flags
296  let SubtargetPredicate   = ps.SubtargetPredicate;
297  let AssemblerPredicate   = ps.AssemblerPredicate;
298  let AsmMatchConverter    = ps.AsmMatchConverter;
299  let AsmVariantName       = ps.AsmVariantName;
300  let UseNamedOperandTable = ps.UseNamedOperandTable;
301  let DecoderNamespace     = ps.DecoderNamespace;
302  let Constraints          = ps.Constraints;
303  let DisableEncoding      = ps.DisableEncoding;
304  let TSFlags              = ps.TSFlags;
305}
306
307class VOP_DPPe<VOPProfile P> : Enc64 {
308  bits<2> src0_modifiers;
309  bits<8> src0;
310  bits<2> src1_modifiers;
311  bits<9> dpp_ctrl;
312  bits<1> bound_ctrl;
313  bits<4> bank_mask;
314  bits<4> row_mask;
315
316  let Inst{39-32} = !if(P.HasSrc0, src0{7-0}, 0);
317  let Inst{48-40} = dpp_ctrl;
318  let Inst{51}    = bound_ctrl;
319  let Inst{52}    = !if(P.HasSrc0Mods, src0_modifiers{0}, 0); // src0_neg
320  let Inst{53}    = !if(P.HasSrc0Mods, src0_modifiers{1}, 0); // src0_abs
321  let Inst{54}    = !if(P.HasSrc1Mods, src1_modifiers{0}, 0); // src1_neg
322  let Inst{55}    = !if(P.HasSrc1Mods, src1_modifiers{1}, 0); // src1_abs
323  let Inst{59-56} = bank_mask;
324  let Inst{63-60} = row_mask;
325}
326
327class VOP_DPP <string OpName, VOPProfile P> :
328  InstSI <P.OutsDPP, P.InsDPP, OpName#P.AsmDPP, []>,
329  VOP_DPPe<P> {
330
331  let mayLoad = 0;
332  let mayStore = 0;
333  let hasSideEffects = 0;
334  let UseNamedOperandTable = 1;
335
336  let VALU = 1;
337  let DPP = 1;
338  let Size = 8;
339
340  let AsmMatchConverter = !if(!eq(P.HasModifiers,1), "cvtDPP", "");
341  let SubtargetPredicate = HasDPP;
342  let AssemblerPredicate = !if(P.HasExt, HasDPP, DisableInst);
343  let AsmVariantName = !if(P.HasExt, AMDGPUAsmVariants.DPP,
344                                     AMDGPUAsmVariants.Disable);
345  let DecoderNamespace = "DPP";
346}
347
348include "VOPCInstructions.td"
349include "VOP1Instructions.td"
350include "VOP2Instructions.td"
351include "VOP3Instructions.td"
352