1//===-- VOPCInstructions.td - Vector Instruction Definitions --------------===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8 9//===----------------------------------------------------------------------===// 10// Encodings 11//===----------------------------------------------------------------------===// 12 13class VOPCe <bits<8> op> : Enc32 { 14 bits<9> src0; 15 bits<8> src1; 16 17 let Inst{8-0} = src0; 18 let Inst{16-9} = src1; 19 let Inst{24-17} = op; 20 let Inst{31-25} = 0x3e; 21} 22 23class VOPC_SDWAe <bits<8> op, VOPProfile P> : VOP_SDWAe <P> { 24 bits<8> src1; 25 26 let Inst{8-0} = 0xf9; // sdwa 27 let Inst{16-9} = !if(P.HasSrc1, src1{7-0}, 0); 28 let Inst{24-17} = op; 29 let Inst{31-25} = 0x3e; // encoding 30 31 // VOPC disallows dst_sel and dst_unused as they have no effect on destination 32 let Inst{42-40} = 0; 33 let Inst{44-43} = 0; 34} 35 36class VOPC_SDWA9e <bits<8> op, VOPProfile P> : VOP_SDWA9Be <P> { 37 bits<9> src1; 38 39 let Inst{8-0} = 0xf9; // sdwa 40 let Inst{16-9} = !if(P.HasSrc1, src1{7-0}, 0); 41 let Inst{24-17} = op; 42 let Inst{31-25} = 0x3e; // encoding 43 let Inst{63} = !if(P.HasSrc1, src1{8}, 0); // src1_sgpr 44} 45 46 47//===----------------------------------------------------------------------===// 48// VOPC classes 49//===----------------------------------------------------------------------===// 50 51// VOPC instructions are a special case because for the 32-bit 52// encoding, we want to display the implicit vcc write as if it were 53// an explicit $dst. 54class VOPC_Profile<list<SchedReadWrite> sched, ValueType vt0, ValueType vt1 = vt0> : 55 VOPProfile <[i1, vt0, vt1, untyped]> { 56 let Asm32 = "$src0, $src1"; 57 // The destination for 32-bit encoding is implicit. 58 let HasDst32 = 0; 59 let Outs64 = (outs VOPDstS64orS32:$sdst); 60 list<SchedReadWrite> Schedule = sched; 61} 62 63class VOPC_NoSdst_Profile<list<SchedReadWrite> sched, ValueType vt0, 64 ValueType vt1 = vt0> : 65 VOPC_Profile<sched, vt0, vt1> { 66 let Outs64 = (outs ); 67 let OutsSDWA = (outs ); 68 let InsSDWA = (ins Src0ModSDWA:$src0_modifiers, Src0SDWA:$src0, 69 Src1ModSDWA:$src1_modifiers, Src1SDWA:$src1, 70 src0_sel:$src0_sel, src1_sel:$src1_sel); 71 let Asm64 = !if(isFloatType<Src0VT>.ret, "$src0_modifiers, $src1_modifiers$clamp", 72 "$src0, $src1"); 73 let AsmSDWA9 = "$src0_modifiers, $src1_modifiers $src0_sel $src1_sel"; 74 let EmitDst = 0; 75} 76 77class VOPC_Pseudo <string opName, VOPC_Profile P, list<dag> pattern=[], 78 bit DefVcc = 1> : 79 InstSI<(outs), P.Ins32, "", pattern>, 80 VOP <opName>, 81 SIMCInstr<opName#"_e32", SIEncodingFamily.NONE> { 82 83 let isPseudo = 1; 84 let isCodeGenOnly = 1; 85 let UseNamedOperandTable = 1; 86 87 string Mnemonic = opName; 88 string AsmOperands = P.Asm32; 89 90 let Size = 4; 91 let mayLoad = 0; 92 let mayStore = 0; 93 let hasSideEffects = 0; 94 95 let ReadsModeReg = isFloatType<P.Src0VT>.ret; 96 97 let VALU = 1; 98 let VOPC = 1; 99 let Uses = !if(ReadsModeReg, [MODE, EXEC], [EXEC]); 100 let Defs = !if(DefVcc, [VCC], []); 101 102 VOPProfile Pfl = P; 103} 104 105class VOPC_Real <VOPC_Pseudo ps, int EncodingFamily> : 106 InstSI <ps.OutOperandList, ps.InOperandList, ps.PseudoInstr # " " # ps.AsmOperands, []>, 107 SIMCInstr <ps.PseudoInstr, EncodingFamily> { 108 109 let isPseudo = 0; 110 let isCodeGenOnly = 0; 111 112 let Constraints = ps.Constraints; 113 let DisableEncoding = ps.DisableEncoding; 114 115 // copy relevant pseudo op flags 116 let SubtargetPredicate = ps.SubtargetPredicate; 117 let AsmMatchConverter = ps.AsmMatchConverter; 118 let Constraints = ps.Constraints; 119 let DisableEncoding = ps.DisableEncoding; 120 let TSFlags = ps.TSFlags; 121 let UseNamedOperandTable = ps.UseNamedOperandTable; 122 let Uses = ps.Uses; 123 let Defs = ps.Defs; 124 let SchedRW = ps.SchedRW; 125} 126 127class VOPC_SDWA_Pseudo <string OpName, VOPProfile P, list<dag> pattern=[]> : 128 VOP_SDWA_Pseudo <OpName, P, pattern> { 129 let AsmMatchConverter = "cvtSdwaVOPC"; 130} 131 132// This class is used only with VOPC instructions. Use $sdst for out operand 133class VOPCInstAlias <VOP3_Pseudo ps, Instruction inst, 134 string Asm32 = ps.Pfl.Asm32, VOPProfile p = ps.Pfl> : 135 InstAlias <ps.OpName#" "#Asm32, (inst)>, PredicateControl { 136 137 field bit isCompare; 138 field bit isCommutable; 139 140 let ResultInst = 141 !if (p.HasDst32, 142 !if (!eq(p.NumSrcArgs, 0), 143 // 1 dst, 0 src 144 (inst p.DstRC:$sdst), 145 !if (!eq(p.NumSrcArgs, 1), 146 // 1 dst, 1 src 147 (inst p.DstRC:$sdst, p.Src0RC32:$src0), 148 !if (!eq(p.NumSrcArgs, 2), 149 // 1 dst, 2 src 150 (inst p.DstRC:$sdst, p.Src0RC32:$src0, p.Src1RC32:$src1), 151 // else - unreachable 152 (inst)))), 153 // else 154 !if (!eq(p.NumSrcArgs, 2), 155 // 0 dst, 2 src 156 (inst p.Src0RC32:$src0, p.Src1RC32:$src1), 157 !if (!eq(p.NumSrcArgs, 1), 158 // 0 dst, 1 src 159 (inst p.Src0RC32:$src1), 160 // else 161 // 0 dst, 0 src 162 (inst)))); 163 164 let AsmVariantName = AMDGPUAsmVariants.Default; 165 let SubtargetPredicate = AssemblerPredicate; 166} 167 168multiclass VOPCInstAliases <string OpName, string Arch> { 169 def : VOPCInstAlias <!cast<VOP3_Pseudo>(OpName#"_e64"), 170 !cast<Instruction>(OpName#"_e32_"#Arch)>; 171 let WaveSizePredicate = isWave32 in { 172 def : VOPCInstAlias <!cast<VOP3_Pseudo>(OpName#"_e64"), 173 !cast<Instruction>(OpName#"_e32_"#Arch), 174 "vcc_lo, "#!cast<VOP3_Pseudo>(OpName#"_e64").Pfl.Asm32>; 175 } 176 let WaveSizePredicate = isWave64 in { 177 def : VOPCInstAlias <!cast<VOP3_Pseudo>(OpName#"_e64"), 178 !cast<Instruction>(OpName#"_e32_"#Arch), 179 "vcc, "#!cast<VOP3_Pseudo>(OpName#"_e64").Pfl.Asm32>; 180 } 181} 182 183multiclass VOPCXInstAliases <string OpName, string Arch> { 184 def : VOPCInstAlias <!cast<VOP3_Pseudo>(OpName#"_e64"), 185 !cast<Instruction>(OpName#"_e32_"#Arch)>; 186} 187 188 189class getVOPCPat64 <SDPatternOperator cond, VOPProfile P> : LetDummies { 190 list<dag> ret = !if(P.HasModifiers, 191 [(set i1:$sdst, 192 (setcc (P.Src0VT 193 !if(P.HasOMod, 194 (VOP3Mods0 P.Src0VT:$src0, i32:$src0_modifiers, i1:$clamp, i32:$omod), 195 (VOP3Mods0 P.Src0VT:$src0, i32:$src0_modifiers, i1:$clamp))), 196 (P.Src1VT (VOP3Mods P.Src1VT:$src1, i32:$src1_modifiers)), 197 cond))], 198 [(set i1:$sdst, (setcc P.Src0VT:$src0, P.Src1VT:$src1, cond))]); 199} 200 201class VCMPXNoSDstTable <bit has_sdst, string Name> { 202 bit HasSDst = has_sdst; 203 string NoSDstOp = Name; 204} 205 206multiclass VOPC_Pseudos <string opName, 207 VOPC_Profile P, 208 SDPatternOperator cond = COND_NULL, 209 string revOp = opName, 210 bit DefExec = 0> { 211 212 def _e32 : VOPC_Pseudo <opName, P>, 213 Commutable_REV<revOp#"_e32", !eq(revOp, opName)>, 214 VCMPXNoSDstTable<1, opName#"_e32"> { 215 let Defs = !if(DefExec, [VCC, EXEC], [VCC]); 216 let SchedRW = P.Schedule; 217 let isConvergent = DefExec; 218 let isCompare = 1; 219 let isCommutable = 1; 220 } 221 222 def _e64 : VOP3_Pseudo<opName, P, getVOPCPat64<cond, P>.ret>, 223 Commutable_REV<revOp#"_e64", !eq(revOp, opName)>, 224 VCMPXNoSDstTable<1, opName#"_e64"> { 225 let Defs = !if(DefExec, [EXEC], []); 226 let SchedRW = P.Schedule; 227 let isCompare = 1; 228 let isCommutable = 1; 229 } 230 231 foreach _ = BoolToList<P.HasExtSDWA>.ret in 232 def _sdwa : VOPC_SDWA_Pseudo <opName, P> { 233 let Defs = !if(DefExec, [EXEC], []); 234 let SchedRW = P.Schedule; 235 let isConvergent = DefExec; 236 let isCompare = 1; 237 } 238} 239 240let SubtargetPredicate = HasSdstCMPX in { 241multiclass VOPCX_Pseudos <string opName, 242 VOPC_Profile P, VOPC_Profile P_NoSDst, 243 SDPatternOperator cond = COND_NULL, 244 string revOp = opName> : 245 VOPC_Pseudos <opName, P, cond, revOp, 1> { 246 247 def _nosdst_e32 : VOPC_Pseudo <opName#"_nosdst", P_NoSDst, [], 0>, 248 Commutable_REV<revOp#"_nosdst_e32", !eq(revOp, opName)>, 249 VCMPXNoSDstTable<0, opName#"_e32"> { 250 let Defs = [EXEC]; 251 let SchedRW = P_NoSDst.Schedule; 252 let isConvergent = 1; 253 let isCompare = 1; 254 let isCommutable = 1; 255 let SubtargetPredicate = HasNoSdstCMPX; 256 } 257 258 def _nosdst_e64 : VOP3_Pseudo<opName#"_nosdst", P_NoSDst>, 259 Commutable_REV<revOp#"_nosdst_e64", !eq(revOp, opName)>, 260 VCMPXNoSDstTable<0, opName#"_e64"> { 261 let Defs = [EXEC]; 262 let SchedRW = P_NoSDst.Schedule; 263 let isCompare = 1; 264 let isCommutable = 1; 265 let SubtargetPredicate = HasNoSdstCMPX; 266 } 267 268 foreach _ = BoolToList<P_NoSDst.HasExtSDWA>.ret in 269 def _nosdst_sdwa : VOPC_SDWA_Pseudo <opName#"_nosdst", P_NoSDst> { 270 let Defs = [EXEC]; 271 let SchedRW = P_NoSDst.Schedule; 272 let isConvergent = 1; 273 let isCompare = 1; 274 let SubtargetPredicate = HasNoSdstCMPX; 275 } 276} 277} // End SubtargetPredicate = HasSdstCMPX 278 279def VOPC_I1_F16_F16 : VOPC_Profile<[Write32Bit], f16>; 280def VOPC_I1_F32_F32 : VOPC_Profile<[Write32Bit], f32>; 281def VOPC_I1_F64_F64 : VOPC_Profile<[WriteDoubleAdd], f64>; 282def VOPC_I1_I16_I16 : VOPC_Profile<[Write32Bit], i16>; 283def VOPC_I1_I32_I32 : VOPC_Profile<[Write32Bit], i32>; 284def VOPC_I1_I64_I64 : VOPC_Profile<[Write64Bit], i64>; 285 286def VOPC_F16_F16 : VOPC_NoSdst_Profile<[Write32Bit], f16>; 287def VOPC_F32_F32 : VOPC_NoSdst_Profile<[Write32Bit], f32>; 288def VOPC_F64_F64 : VOPC_NoSdst_Profile<[Write64Bit], f64>; 289def VOPC_I16_I16 : VOPC_NoSdst_Profile<[Write32Bit], i16>; 290def VOPC_I32_I32 : VOPC_NoSdst_Profile<[Write32Bit], i32>; 291def VOPC_I64_I64 : VOPC_NoSdst_Profile<[Write64Bit], i64>; 292 293multiclass VOPC_F16 <string opName, SDPatternOperator cond = COND_NULL, 294 string revOp = opName> : 295 VOPC_Pseudos <opName, VOPC_I1_F16_F16, cond, revOp, 0>; 296 297multiclass VOPC_F32 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> : 298 VOPC_Pseudos <opName, VOPC_I1_F32_F32, cond, revOp, 0>; 299 300multiclass VOPC_F64 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> : 301 VOPC_Pseudos <opName, VOPC_I1_F64_F64, cond, revOp, 0>; 302 303multiclass VOPC_I16 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> : 304 VOPC_Pseudos <opName, VOPC_I1_I16_I16, cond, revOp, 0>; 305 306multiclass VOPC_I32 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> : 307 VOPC_Pseudos <opName, VOPC_I1_I32_I32, cond, revOp, 0>; 308 309multiclass VOPC_I64 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> : 310 VOPC_Pseudos <opName, VOPC_I1_I64_I64, cond, revOp, 0>; 311 312multiclass VOPCX_F16 <string opName, string revOp = opName> : 313 VOPCX_Pseudos <opName, VOPC_I1_F16_F16, VOPC_F16_F16, COND_NULL, revOp>; 314 315multiclass VOPCX_F32 <string opName, string revOp = opName> : 316 VOPCX_Pseudos <opName, VOPC_I1_F32_F32, VOPC_F32_F32, COND_NULL, revOp>; 317 318multiclass VOPCX_F64 <string opName, string revOp = opName> : 319 VOPCX_Pseudos <opName, VOPC_I1_F64_F64, VOPC_F64_F64, COND_NULL, revOp>; 320 321multiclass VOPCX_I16 <string opName, string revOp = opName> : 322 VOPCX_Pseudos <opName, VOPC_I1_I16_I16, VOPC_I16_I16, COND_NULL, revOp>; 323 324multiclass VOPCX_I32 <string opName, string revOp = opName> : 325 VOPCX_Pseudos <opName, VOPC_I1_I32_I32, VOPC_I32_I32, COND_NULL, revOp>; 326 327multiclass VOPCX_I64 <string opName, string revOp = opName> : 328 VOPCX_Pseudos <opName, VOPC_I1_I64_I64, VOPC_I64_I64, COND_NULL, revOp>; 329 330 331//===----------------------------------------------------------------------===// 332// Compare instructions 333//===----------------------------------------------------------------------===// 334 335defm V_CMP_F_F32 : VOPC_F32 <"v_cmp_f_f32">; 336defm V_CMP_LT_F32 : VOPC_F32 <"v_cmp_lt_f32", COND_OLT, "v_cmp_gt_f32">; 337defm V_CMP_EQ_F32 : VOPC_F32 <"v_cmp_eq_f32", COND_OEQ>; 338defm V_CMP_LE_F32 : VOPC_F32 <"v_cmp_le_f32", COND_OLE, "v_cmp_ge_f32">; 339defm V_CMP_GT_F32 : VOPC_F32 <"v_cmp_gt_f32", COND_OGT>; 340defm V_CMP_LG_F32 : VOPC_F32 <"v_cmp_lg_f32", COND_ONE>; 341defm V_CMP_GE_F32 : VOPC_F32 <"v_cmp_ge_f32", COND_OGE>; 342defm V_CMP_O_F32 : VOPC_F32 <"v_cmp_o_f32", COND_O>; 343defm V_CMP_U_F32 : VOPC_F32 <"v_cmp_u_f32", COND_UO>; 344defm V_CMP_NGE_F32 : VOPC_F32 <"v_cmp_nge_f32", COND_ULT, "v_cmp_nle_f32">; 345defm V_CMP_NLG_F32 : VOPC_F32 <"v_cmp_nlg_f32", COND_UEQ>; 346defm V_CMP_NGT_F32 : VOPC_F32 <"v_cmp_ngt_f32", COND_ULE, "v_cmp_nlt_f32">; 347defm V_CMP_NLE_F32 : VOPC_F32 <"v_cmp_nle_f32", COND_UGT>; 348defm V_CMP_NEQ_F32 : VOPC_F32 <"v_cmp_neq_f32", COND_UNE>; 349defm V_CMP_NLT_F32 : VOPC_F32 <"v_cmp_nlt_f32", COND_UGE>; 350defm V_CMP_TRU_F32 : VOPC_F32 <"v_cmp_tru_f32">; 351 352defm V_CMPX_F_F32 : VOPCX_F32 <"v_cmpx_f_f32">; 353defm V_CMPX_LT_F32 : VOPCX_F32 <"v_cmpx_lt_f32", "v_cmpx_gt_f32">; 354defm V_CMPX_EQ_F32 : VOPCX_F32 <"v_cmpx_eq_f32">; 355defm V_CMPX_LE_F32 : VOPCX_F32 <"v_cmpx_le_f32", "v_cmpx_ge_f32">; 356defm V_CMPX_GT_F32 : VOPCX_F32 <"v_cmpx_gt_f32">; 357defm V_CMPX_LG_F32 : VOPCX_F32 <"v_cmpx_lg_f32">; 358defm V_CMPX_GE_F32 : VOPCX_F32 <"v_cmpx_ge_f32">; 359defm V_CMPX_O_F32 : VOPCX_F32 <"v_cmpx_o_f32">; 360defm V_CMPX_U_F32 : VOPCX_F32 <"v_cmpx_u_f32">; 361defm V_CMPX_NGE_F32 : VOPCX_F32 <"v_cmpx_nge_f32", "v_cmpx_nle_f32">; 362defm V_CMPX_NLG_F32 : VOPCX_F32 <"v_cmpx_nlg_f32">; 363defm V_CMPX_NGT_F32 : VOPCX_F32 <"v_cmpx_ngt_f32", "v_cmpx_nlt_f32">; 364defm V_CMPX_NLE_F32 : VOPCX_F32 <"v_cmpx_nle_f32">; 365defm V_CMPX_NEQ_F32 : VOPCX_F32 <"v_cmpx_neq_f32">; 366defm V_CMPX_NLT_F32 : VOPCX_F32 <"v_cmpx_nlt_f32">; 367defm V_CMPX_TRU_F32 : VOPCX_F32 <"v_cmpx_tru_f32">; 368 369defm V_CMP_F_F64 : VOPC_F64 <"v_cmp_f_f64">; 370defm V_CMP_LT_F64 : VOPC_F64 <"v_cmp_lt_f64", COND_OLT, "v_cmp_gt_f64">; 371defm V_CMP_EQ_F64 : VOPC_F64 <"v_cmp_eq_f64", COND_OEQ>; 372defm V_CMP_LE_F64 : VOPC_F64 <"v_cmp_le_f64", COND_OLE, "v_cmp_ge_f64">; 373defm V_CMP_GT_F64 : VOPC_F64 <"v_cmp_gt_f64", COND_OGT>; 374defm V_CMP_LG_F64 : VOPC_F64 <"v_cmp_lg_f64", COND_ONE>; 375defm V_CMP_GE_F64 : VOPC_F64 <"v_cmp_ge_f64", COND_OGE>; 376defm V_CMP_O_F64 : VOPC_F64 <"v_cmp_o_f64", COND_O>; 377defm V_CMP_U_F64 : VOPC_F64 <"v_cmp_u_f64", COND_UO>; 378defm V_CMP_NGE_F64 : VOPC_F64 <"v_cmp_nge_f64", COND_ULT, "v_cmp_nle_f64">; 379defm V_CMP_NLG_F64 : VOPC_F64 <"v_cmp_nlg_f64", COND_UEQ>; 380defm V_CMP_NGT_F64 : VOPC_F64 <"v_cmp_ngt_f64", COND_ULE, "v_cmp_nlt_f64">; 381defm V_CMP_NLE_F64 : VOPC_F64 <"v_cmp_nle_f64", COND_UGT>; 382defm V_CMP_NEQ_F64 : VOPC_F64 <"v_cmp_neq_f64", COND_UNE>; 383defm V_CMP_NLT_F64 : VOPC_F64 <"v_cmp_nlt_f64", COND_UGE>; 384defm V_CMP_TRU_F64 : VOPC_F64 <"v_cmp_tru_f64">; 385 386defm V_CMPX_F_F64 : VOPCX_F64 <"v_cmpx_f_f64">; 387defm V_CMPX_LT_F64 : VOPCX_F64 <"v_cmpx_lt_f64", "v_cmpx_gt_f64">; 388defm V_CMPX_EQ_F64 : VOPCX_F64 <"v_cmpx_eq_f64">; 389defm V_CMPX_LE_F64 : VOPCX_F64 <"v_cmpx_le_f64", "v_cmpx_ge_f64">; 390defm V_CMPX_GT_F64 : VOPCX_F64 <"v_cmpx_gt_f64">; 391defm V_CMPX_LG_F64 : VOPCX_F64 <"v_cmpx_lg_f64">; 392defm V_CMPX_GE_F64 : VOPCX_F64 <"v_cmpx_ge_f64">; 393defm V_CMPX_O_F64 : VOPCX_F64 <"v_cmpx_o_f64">; 394defm V_CMPX_U_F64 : VOPCX_F64 <"v_cmpx_u_f64">; 395defm V_CMPX_NGE_F64 : VOPCX_F64 <"v_cmpx_nge_f64", "v_cmpx_nle_f64">; 396defm V_CMPX_NLG_F64 : VOPCX_F64 <"v_cmpx_nlg_f64">; 397defm V_CMPX_NGT_F64 : VOPCX_F64 <"v_cmpx_ngt_f64", "v_cmpx_nlt_f64">; 398defm V_CMPX_NLE_F64 : VOPCX_F64 <"v_cmpx_nle_f64">; 399defm V_CMPX_NEQ_F64 : VOPCX_F64 <"v_cmpx_neq_f64">; 400defm V_CMPX_NLT_F64 : VOPCX_F64 <"v_cmpx_nlt_f64">; 401defm V_CMPX_TRU_F64 : VOPCX_F64 <"v_cmpx_tru_f64">; 402 403let SubtargetPredicate = isGFX6GFX7 in { 404 405defm V_CMPS_F_F32 : VOPC_F32 <"v_cmps_f_f32">; 406defm V_CMPS_LT_F32 : VOPC_F32 <"v_cmps_lt_f32", COND_NULL, "v_cmps_gt_f32">; 407defm V_CMPS_EQ_F32 : VOPC_F32 <"v_cmps_eq_f32">; 408defm V_CMPS_LE_F32 : VOPC_F32 <"v_cmps_le_f32", COND_NULL, "v_cmps_ge_f32">; 409defm V_CMPS_GT_F32 : VOPC_F32 <"v_cmps_gt_f32">; 410defm V_CMPS_LG_F32 : VOPC_F32 <"v_cmps_lg_f32">; 411defm V_CMPS_GE_F32 : VOPC_F32 <"v_cmps_ge_f32">; 412defm V_CMPS_O_F32 : VOPC_F32 <"v_cmps_o_f32">; 413defm V_CMPS_U_F32 : VOPC_F32 <"v_cmps_u_f32">; 414defm V_CMPS_NGE_F32 : VOPC_F32 <"v_cmps_nge_f32", COND_NULL, "v_cmps_nle_f32">; 415defm V_CMPS_NLG_F32 : VOPC_F32 <"v_cmps_nlg_f32">; 416defm V_CMPS_NGT_F32 : VOPC_F32 <"v_cmps_ngt_f32", COND_NULL, "v_cmps_nlt_f32">; 417defm V_CMPS_NLE_F32 : VOPC_F32 <"v_cmps_nle_f32">; 418defm V_CMPS_NEQ_F32 : VOPC_F32 <"v_cmps_neq_f32">; 419defm V_CMPS_NLT_F32 : VOPC_F32 <"v_cmps_nlt_f32">; 420defm V_CMPS_TRU_F32 : VOPC_F32 <"v_cmps_tru_f32">; 421 422defm V_CMPSX_F_F32 : VOPCX_F32 <"v_cmpsx_f_f32">; 423defm V_CMPSX_LT_F32 : VOPCX_F32 <"v_cmpsx_lt_f32", "v_cmpsx_gt_f32">; 424defm V_CMPSX_EQ_F32 : VOPCX_F32 <"v_cmpsx_eq_f32">; 425defm V_CMPSX_LE_F32 : VOPCX_F32 <"v_cmpsx_le_f32", "v_cmpsx_ge_f32">; 426defm V_CMPSX_GT_F32 : VOPCX_F32 <"v_cmpsx_gt_f32">; 427defm V_CMPSX_LG_F32 : VOPCX_F32 <"v_cmpsx_lg_f32">; 428defm V_CMPSX_GE_F32 : VOPCX_F32 <"v_cmpsx_ge_f32">; 429defm V_CMPSX_O_F32 : VOPCX_F32 <"v_cmpsx_o_f32">; 430defm V_CMPSX_U_F32 : VOPCX_F32 <"v_cmpsx_u_f32">; 431defm V_CMPSX_NGE_F32 : VOPCX_F32 <"v_cmpsx_nge_f32", "v_cmpsx_nle_f32">; 432defm V_CMPSX_NLG_F32 : VOPCX_F32 <"v_cmpsx_nlg_f32">; 433defm V_CMPSX_NGT_F32 : VOPCX_F32 <"v_cmpsx_ngt_f32", "v_cmpsx_nlt_f32">; 434defm V_CMPSX_NLE_F32 : VOPCX_F32 <"v_cmpsx_nle_f32">; 435defm V_CMPSX_NEQ_F32 : VOPCX_F32 <"v_cmpsx_neq_f32">; 436defm V_CMPSX_NLT_F32 : VOPCX_F32 <"v_cmpsx_nlt_f32">; 437defm V_CMPSX_TRU_F32 : VOPCX_F32 <"v_cmpsx_tru_f32">; 438 439defm V_CMPS_F_F64 : VOPC_F64 <"v_cmps_f_f64">; 440defm V_CMPS_LT_F64 : VOPC_F64 <"v_cmps_lt_f64", COND_NULL, "v_cmps_gt_f64">; 441defm V_CMPS_EQ_F64 : VOPC_F64 <"v_cmps_eq_f64">; 442defm V_CMPS_LE_F64 : VOPC_F64 <"v_cmps_le_f64", COND_NULL, "v_cmps_ge_f64">; 443defm V_CMPS_GT_F64 : VOPC_F64 <"v_cmps_gt_f64">; 444defm V_CMPS_LG_F64 : VOPC_F64 <"v_cmps_lg_f64">; 445defm V_CMPS_GE_F64 : VOPC_F64 <"v_cmps_ge_f64">; 446defm V_CMPS_O_F64 : VOPC_F64 <"v_cmps_o_f64">; 447defm V_CMPS_U_F64 : VOPC_F64 <"v_cmps_u_f64">; 448defm V_CMPS_NGE_F64 : VOPC_F64 <"v_cmps_nge_f64", COND_NULL, "v_cmps_nle_f64">; 449defm V_CMPS_NLG_F64 : VOPC_F64 <"v_cmps_nlg_f64">; 450defm V_CMPS_NGT_F64 : VOPC_F64 <"v_cmps_ngt_f64", COND_NULL, "v_cmps_nlt_f64">; 451defm V_CMPS_NLE_F64 : VOPC_F64 <"v_cmps_nle_f64">; 452defm V_CMPS_NEQ_F64 : VOPC_F64 <"v_cmps_neq_f64">; 453defm V_CMPS_NLT_F64 : VOPC_F64 <"v_cmps_nlt_f64">; 454defm V_CMPS_TRU_F64 : VOPC_F64 <"v_cmps_tru_f64">; 455 456defm V_CMPSX_F_F64 : VOPCX_F64 <"v_cmpsx_f_f64">; 457defm V_CMPSX_LT_F64 : VOPCX_F64 <"v_cmpsx_lt_f64", "v_cmpsx_gt_f64">; 458defm V_CMPSX_EQ_F64 : VOPCX_F64 <"v_cmpsx_eq_f64">; 459defm V_CMPSX_LE_F64 : VOPCX_F64 <"v_cmpsx_le_f64", "v_cmpsx_ge_f64">; 460defm V_CMPSX_GT_F64 : VOPCX_F64 <"v_cmpsx_gt_f64">; 461defm V_CMPSX_LG_F64 : VOPCX_F64 <"v_cmpsx_lg_f64">; 462defm V_CMPSX_GE_F64 : VOPCX_F64 <"v_cmpsx_ge_f64">; 463defm V_CMPSX_O_F64 : VOPCX_F64 <"v_cmpsx_o_f64">; 464defm V_CMPSX_U_F64 : VOPCX_F64 <"v_cmpsx_u_f64">; 465defm V_CMPSX_NGE_F64 : VOPCX_F64 <"v_cmpsx_nge_f64", "v_cmpsx_nle_f64">; 466defm V_CMPSX_NLG_F64 : VOPCX_F64 <"v_cmpsx_nlg_f64">; 467defm V_CMPSX_NGT_F64 : VOPCX_F64 <"v_cmpsx_ngt_f64", "v_cmpsx_nlt_f64">; 468defm V_CMPSX_NLE_F64 : VOPCX_F64 <"v_cmpsx_nle_f64">; 469defm V_CMPSX_NEQ_F64 : VOPCX_F64 <"v_cmpsx_neq_f64">; 470defm V_CMPSX_NLT_F64 : VOPCX_F64 <"v_cmpsx_nlt_f64">; 471defm V_CMPSX_TRU_F64 : VOPCX_F64 <"v_cmpsx_tru_f64">; 472 473} // End SubtargetPredicate = isGFX6GFX7 474 475let SubtargetPredicate = Has16BitInsts in { 476 477defm V_CMP_F_F16 : VOPC_F16 <"v_cmp_f_f16">; 478defm V_CMP_LT_F16 : VOPC_F16 <"v_cmp_lt_f16", COND_OLT, "v_cmp_gt_f16">; 479defm V_CMP_EQ_F16 : VOPC_F16 <"v_cmp_eq_f16", COND_OEQ>; 480defm V_CMP_LE_F16 : VOPC_F16 <"v_cmp_le_f16", COND_OLE, "v_cmp_ge_f16">; 481defm V_CMP_GT_F16 : VOPC_F16 <"v_cmp_gt_f16", COND_OGT>; 482defm V_CMP_LG_F16 : VOPC_F16 <"v_cmp_lg_f16", COND_ONE>; 483defm V_CMP_GE_F16 : VOPC_F16 <"v_cmp_ge_f16", COND_OGE>; 484defm V_CMP_O_F16 : VOPC_F16 <"v_cmp_o_f16", COND_O>; 485defm V_CMP_U_F16 : VOPC_F16 <"v_cmp_u_f16", COND_UO>; 486defm V_CMP_NGE_F16 : VOPC_F16 <"v_cmp_nge_f16", COND_ULT, "v_cmp_nle_f16">; 487defm V_CMP_NLG_F16 : VOPC_F16 <"v_cmp_nlg_f16", COND_UEQ>; 488defm V_CMP_NGT_F16 : VOPC_F16 <"v_cmp_ngt_f16", COND_ULE, "v_cmp_nlt_f16">; 489defm V_CMP_NLE_F16 : VOPC_F16 <"v_cmp_nle_f16", COND_UGT>; 490defm V_CMP_NEQ_F16 : VOPC_F16 <"v_cmp_neq_f16", COND_UNE>; 491defm V_CMP_NLT_F16 : VOPC_F16 <"v_cmp_nlt_f16", COND_UGE>; 492defm V_CMP_TRU_F16 : VOPC_F16 <"v_cmp_tru_f16">; 493 494defm V_CMPX_F_F16 : VOPCX_F16 <"v_cmpx_f_f16">; 495defm V_CMPX_LT_F16 : VOPCX_F16 <"v_cmpx_lt_f16", "v_cmpx_gt_f16">; 496defm V_CMPX_EQ_F16 : VOPCX_F16 <"v_cmpx_eq_f16">; 497defm V_CMPX_LE_F16 : VOPCX_F16 <"v_cmpx_le_f16", "v_cmpx_ge_f16">; 498defm V_CMPX_GT_F16 : VOPCX_F16 <"v_cmpx_gt_f16">; 499defm V_CMPX_LG_F16 : VOPCX_F16 <"v_cmpx_lg_f16">; 500defm V_CMPX_GE_F16 : VOPCX_F16 <"v_cmpx_ge_f16">; 501defm V_CMPX_O_F16 : VOPCX_F16 <"v_cmpx_o_f16">; 502defm V_CMPX_U_F16 : VOPCX_F16 <"v_cmpx_u_f16">; 503defm V_CMPX_NGE_F16 : VOPCX_F16 <"v_cmpx_nge_f16", "v_cmpx_nle_f16">; 504defm V_CMPX_NLG_F16 : VOPCX_F16 <"v_cmpx_nlg_f16">; 505defm V_CMPX_NGT_F16 : VOPCX_F16 <"v_cmpx_ngt_f16", "v_cmpx_nlt_f16">; 506defm V_CMPX_NLE_F16 : VOPCX_F16 <"v_cmpx_nle_f16">; 507defm V_CMPX_NEQ_F16 : VOPCX_F16 <"v_cmpx_neq_f16">; 508defm V_CMPX_NLT_F16 : VOPCX_F16 <"v_cmpx_nlt_f16">; 509defm V_CMPX_TRU_F16 : VOPCX_F16 <"v_cmpx_tru_f16">; 510 511defm V_CMP_F_I16 : VOPC_I16 <"v_cmp_f_i16">; 512defm V_CMP_LT_I16 : VOPC_I16 <"v_cmp_lt_i16", COND_SLT, "v_cmp_gt_i16">; 513defm V_CMP_EQ_I16 : VOPC_I16 <"v_cmp_eq_i16">; 514defm V_CMP_LE_I16 : VOPC_I16 <"v_cmp_le_i16", COND_SLE, "v_cmp_ge_i16">; 515defm V_CMP_GT_I16 : VOPC_I16 <"v_cmp_gt_i16", COND_SGT>; 516defm V_CMP_NE_I16 : VOPC_I16 <"v_cmp_ne_i16">; 517defm V_CMP_GE_I16 : VOPC_I16 <"v_cmp_ge_i16", COND_SGE>; 518defm V_CMP_T_I16 : VOPC_I16 <"v_cmp_t_i16">; 519 520defm V_CMP_F_U16 : VOPC_I16 <"v_cmp_f_u16">; 521defm V_CMP_LT_U16 : VOPC_I16 <"v_cmp_lt_u16", COND_ULT, "v_cmp_gt_u16">; 522defm V_CMP_EQ_U16 : VOPC_I16 <"v_cmp_eq_u16", COND_EQ>; 523defm V_CMP_LE_U16 : VOPC_I16 <"v_cmp_le_u16", COND_ULE, "v_cmp_ge_u16">; 524defm V_CMP_GT_U16 : VOPC_I16 <"v_cmp_gt_u16", COND_UGT>; 525defm V_CMP_NE_U16 : VOPC_I16 <"v_cmp_ne_u16", COND_NE>; 526defm V_CMP_GE_U16 : VOPC_I16 <"v_cmp_ge_u16", COND_UGE>; 527defm V_CMP_T_U16 : VOPC_I16 <"v_cmp_t_u16">; 528 529defm V_CMPX_F_I16 : VOPCX_I16 <"v_cmpx_f_i16">; 530defm V_CMPX_LT_I16 : VOPCX_I16 <"v_cmpx_lt_i16", "v_cmpx_gt_i16">; 531defm V_CMPX_EQ_I16 : VOPCX_I16 <"v_cmpx_eq_i16">; 532defm V_CMPX_LE_I16 : VOPCX_I16 <"v_cmpx_le_i16", "v_cmpx_ge_i16">; 533defm V_CMPX_GT_I16 : VOPCX_I16 <"v_cmpx_gt_i16">; 534defm V_CMPX_NE_I16 : VOPCX_I16 <"v_cmpx_ne_i16">; 535defm V_CMPX_GE_I16 : VOPCX_I16 <"v_cmpx_ge_i16">; 536defm V_CMPX_T_I16 : VOPCX_I16 <"v_cmpx_t_i16">; 537defm V_CMPX_F_U16 : VOPCX_I16 <"v_cmpx_f_u16">; 538 539defm V_CMPX_LT_U16 : VOPCX_I16 <"v_cmpx_lt_u16", "v_cmpx_gt_u16">; 540defm V_CMPX_EQ_U16 : VOPCX_I16 <"v_cmpx_eq_u16">; 541defm V_CMPX_LE_U16 : VOPCX_I16 <"v_cmpx_le_u16", "v_cmpx_ge_u16">; 542defm V_CMPX_GT_U16 : VOPCX_I16 <"v_cmpx_gt_u16">; 543defm V_CMPX_NE_U16 : VOPCX_I16 <"v_cmpx_ne_u16">; 544defm V_CMPX_GE_U16 : VOPCX_I16 <"v_cmpx_ge_u16">; 545defm V_CMPX_T_U16 : VOPCX_I16 <"v_cmpx_t_u16">; 546 547} // End SubtargetPredicate = Has16BitInsts 548 549defm V_CMP_F_I32 : VOPC_I32 <"v_cmp_f_i32">; 550defm V_CMP_LT_I32 : VOPC_I32 <"v_cmp_lt_i32", COND_SLT, "v_cmp_gt_i32">; 551defm V_CMP_EQ_I32 : VOPC_I32 <"v_cmp_eq_i32">; 552defm V_CMP_LE_I32 : VOPC_I32 <"v_cmp_le_i32", COND_SLE, "v_cmp_ge_i32">; 553defm V_CMP_GT_I32 : VOPC_I32 <"v_cmp_gt_i32", COND_SGT>; 554defm V_CMP_NE_I32 : VOPC_I32 <"v_cmp_ne_i32">; 555defm V_CMP_GE_I32 : VOPC_I32 <"v_cmp_ge_i32", COND_SGE>; 556defm V_CMP_T_I32 : VOPC_I32 <"v_cmp_t_i32">; 557 558defm V_CMPX_F_I32 : VOPCX_I32 <"v_cmpx_f_i32">; 559defm V_CMPX_LT_I32 : VOPCX_I32 <"v_cmpx_lt_i32", "v_cmpx_gt_i32">; 560defm V_CMPX_EQ_I32 : VOPCX_I32 <"v_cmpx_eq_i32">; 561defm V_CMPX_LE_I32 : VOPCX_I32 <"v_cmpx_le_i32", "v_cmpx_ge_i32">; 562defm V_CMPX_GT_I32 : VOPCX_I32 <"v_cmpx_gt_i32">; 563defm V_CMPX_NE_I32 : VOPCX_I32 <"v_cmpx_ne_i32">; 564defm V_CMPX_GE_I32 : VOPCX_I32 <"v_cmpx_ge_i32">; 565defm V_CMPX_T_I32 : VOPCX_I32 <"v_cmpx_t_i32">; 566 567defm V_CMP_F_I64 : VOPC_I64 <"v_cmp_f_i64">; 568defm V_CMP_LT_I64 : VOPC_I64 <"v_cmp_lt_i64", COND_SLT, "v_cmp_gt_i64">; 569defm V_CMP_EQ_I64 : VOPC_I64 <"v_cmp_eq_i64">; 570defm V_CMP_LE_I64 : VOPC_I64 <"v_cmp_le_i64", COND_SLE, "v_cmp_ge_i64">; 571defm V_CMP_GT_I64 : VOPC_I64 <"v_cmp_gt_i64", COND_SGT>; 572defm V_CMP_NE_I64 : VOPC_I64 <"v_cmp_ne_i64">; 573defm V_CMP_GE_I64 : VOPC_I64 <"v_cmp_ge_i64", COND_SGE>; 574defm V_CMP_T_I64 : VOPC_I64 <"v_cmp_t_i64">; 575 576defm V_CMPX_F_I64 : VOPCX_I64 <"v_cmpx_f_i64">; 577defm V_CMPX_LT_I64 : VOPCX_I64 <"v_cmpx_lt_i64", "v_cmpx_gt_i64">; 578defm V_CMPX_EQ_I64 : VOPCX_I64 <"v_cmpx_eq_i64">; 579defm V_CMPX_LE_I64 : VOPCX_I64 <"v_cmpx_le_i64", "v_cmpx_ge_i64">; 580defm V_CMPX_GT_I64 : VOPCX_I64 <"v_cmpx_gt_i64">; 581defm V_CMPX_NE_I64 : VOPCX_I64 <"v_cmpx_ne_i64">; 582defm V_CMPX_GE_I64 : VOPCX_I64 <"v_cmpx_ge_i64">; 583defm V_CMPX_T_I64 : VOPCX_I64 <"v_cmpx_t_i64">; 584 585defm V_CMP_F_U32 : VOPC_I32 <"v_cmp_f_u32">; 586defm V_CMP_LT_U32 : VOPC_I32 <"v_cmp_lt_u32", COND_ULT, "v_cmp_gt_u32">; 587defm V_CMP_EQ_U32 : VOPC_I32 <"v_cmp_eq_u32", COND_EQ>; 588defm V_CMP_LE_U32 : VOPC_I32 <"v_cmp_le_u32", COND_ULE, "v_cmp_ge_u32">; 589defm V_CMP_GT_U32 : VOPC_I32 <"v_cmp_gt_u32", COND_UGT>; 590defm V_CMP_NE_U32 : VOPC_I32 <"v_cmp_ne_u32", COND_NE>; 591defm V_CMP_GE_U32 : VOPC_I32 <"v_cmp_ge_u32", COND_UGE>; 592defm V_CMP_T_U32 : VOPC_I32 <"v_cmp_t_u32">; 593 594defm V_CMPX_F_U32 : VOPCX_I32 <"v_cmpx_f_u32">; 595defm V_CMPX_LT_U32 : VOPCX_I32 <"v_cmpx_lt_u32", "v_cmpx_gt_u32">; 596defm V_CMPX_EQ_U32 : VOPCX_I32 <"v_cmpx_eq_u32">; 597defm V_CMPX_LE_U32 : VOPCX_I32 <"v_cmpx_le_u32", "v_cmpx_le_u32">; 598defm V_CMPX_GT_U32 : VOPCX_I32 <"v_cmpx_gt_u32">; 599defm V_CMPX_NE_U32 : VOPCX_I32 <"v_cmpx_ne_u32">; 600defm V_CMPX_GE_U32 : VOPCX_I32 <"v_cmpx_ge_u32">; 601defm V_CMPX_T_U32 : VOPCX_I32 <"v_cmpx_t_u32">; 602 603defm V_CMP_F_U64 : VOPC_I64 <"v_cmp_f_u64">; 604defm V_CMP_LT_U64 : VOPC_I64 <"v_cmp_lt_u64", COND_ULT, "v_cmp_gt_u64">; 605defm V_CMP_EQ_U64 : VOPC_I64 <"v_cmp_eq_u64", COND_EQ>; 606defm V_CMP_LE_U64 : VOPC_I64 <"v_cmp_le_u64", COND_ULE, "v_cmp_ge_u64">; 607defm V_CMP_GT_U64 : VOPC_I64 <"v_cmp_gt_u64", COND_UGT>; 608defm V_CMP_NE_U64 : VOPC_I64 <"v_cmp_ne_u64", COND_NE>; 609defm V_CMP_GE_U64 : VOPC_I64 <"v_cmp_ge_u64", COND_UGE>; 610defm V_CMP_T_U64 : VOPC_I64 <"v_cmp_t_u64">; 611 612defm V_CMPX_F_U64 : VOPCX_I64 <"v_cmpx_f_u64">; 613defm V_CMPX_LT_U64 : VOPCX_I64 <"v_cmpx_lt_u64", "v_cmpx_gt_u64">; 614defm V_CMPX_EQ_U64 : VOPCX_I64 <"v_cmpx_eq_u64">; 615defm V_CMPX_LE_U64 : VOPCX_I64 <"v_cmpx_le_u64", "v_cmpx_ge_u64">; 616defm V_CMPX_GT_U64 : VOPCX_I64 <"v_cmpx_gt_u64">; 617defm V_CMPX_NE_U64 : VOPCX_I64 <"v_cmpx_ne_u64">; 618defm V_CMPX_GE_U64 : VOPCX_I64 <"v_cmpx_ge_u64">; 619defm V_CMPX_T_U64 : VOPCX_I64 <"v_cmpx_t_u64">; 620 621//===----------------------------------------------------------------------===// 622// Class instructions 623//===----------------------------------------------------------------------===// 624 625class VOPC_Class_Profile<list<SchedReadWrite> sched, ValueType vt> : 626 VOPC_Profile<sched, vt, i32> { 627 let Ins64 = (ins Src0Mod:$src0_modifiers, Src0RC64:$src0, Src1RC64:$src1); 628 let Asm64 = "$sdst, $src0_modifiers, $src1"; 629 630 let InsSDWA = (ins Src0ModSDWA:$src0_modifiers, Src0SDWA:$src0, 631 Src1ModSDWA:$src1_modifiers, Src1SDWA:$src1, 632 clampmod:$clamp, src0_sel:$src0_sel, src1_sel:$src1_sel); 633 634 let AsmSDWA = " vcc, $src0_modifiers, $src1_modifiers$clamp $src0_sel $src1_sel"; 635 let HasSrc1Mods = 0; 636 let HasClamp = 0; 637 let HasOMod = 0; 638} 639 640class VOPC_Class_NoSdst_Profile<list<SchedReadWrite> sched, ValueType vt> : 641 VOPC_Class_Profile<sched, vt> { 642 let Outs64 = (outs ); 643 let OutsSDWA = (outs ); 644 let InsSDWA = (ins Src0ModSDWA:$src0_modifiers, Src0SDWA:$src0, 645 Src1ModSDWA:$src1_modifiers, Src1SDWA:$src1, 646 src0_sel:$src0_sel, src1_sel:$src1_sel); 647 let Asm64 = "$src0_modifiers, $src1"; 648 let AsmSDWA9 = "$src0_modifiers, $src1_modifiers $src0_sel $src1_sel"; 649 let EmitDst = 0; 650} 651 652class getVOPCClassPat64 <VOPProfile P> { 653 list<dag> ret = 654 [(set i1:$sdst, 655 (AMDGPUfp_class 656 (P.Src0VT (VOP3Mods P.Src0VT:$src0, i32:$src0_modifiers)), 657 P.Src1VT:$src1))]; 658} 659 660// Special case for class instructions which only have modifiers on 661// the 1st source operand. 662multiclass VOPC_Class_Pseudos <string opName, VOPC_Profile p, bit DefExec, 663 bit DefVcc = 1> { 664 def _e32 : VOPC_Pseudo <opName, p>, 665 VCMPXNoSDstTable<1, opName#"_e32"> { 666 let Defs = !if(DefExec, !if(DefVcc, [VCC, EXEC], [EXEC]), 667 !if(DefVcc, [VCC], [])); 668 let SchedRW = p.Schedule; 669 let isConvergent = DefExec; 670 } 671 672 def _e64 : VOP3_Pseudo<opName, p, getVOPCClassPat64<p>.ret>, 673 VCMPXNoSDstTable<1, opName#"_e64"> { 674 let Defs = !if(DefExec, [EXEC], []); 675 let SchedRW = p.Schedule; 676 } 677 678 foreach _ = BoolToList<p.HasExtSDWA>.ret in 679 def _sdwa : VOPC_SDWA_Pseudo <opName, p> { 680 let Defs = !if(DefExec, !if(DefVcc, [VCC, EXEC], [EXEC]), 681 !if(DefVcc, [VCC], [])); 682 let SchedRW = p.Schedule; 683 let isConvergent = DefExec; 684 } 685} 686 687let SubtargetPredicate = HasSdstCMPX in { 688multiclass VOPCX_Class_Pseudos <string opName, 689 VOPC_Profile P, 690 VOPC_Profile P_NoSDst> : 691 VOPC_Class_Pseudos <opName, P, 1, 1> { 692 693 def _nosdst_e32 : VOPC_Pseudo <opName#"_nosdst", P_NoSDst, [], 0>, 694 VCMPXNoSDstTable<0, opName#"_e32"> { 695 let Defs = [EXEC]; 696 let SchedRW = P_NoSDst.Schedule; 697 let isConvergent = 1; 698 let SubtargetPredicate = HasNoSdstCMPX; 699 } 700 701 def _nosdst_e64 : VOP3_Pseudo<opName#"_nosdst", P_NoSDst>, 702 VCMPXNoSDstTable<0, opName#"_e64"> { 703 let Defs = [EXEC]; 704 let SchedRW = P_NoSDst.Schedule; 705 let SubtargetPredicate = HasNoSdstCMPX; 706 } 707 708 foreach _ = BoolToList<P_NoSDst.HasExtSDWA>.ret in 709 def _nosdst_sdwa : VOPC_SDWA_Pseudo <opName#"_nosdst", P_NoSDst> { 710 let Defs = [EXEC]; 711 let SchedRW = P_NoSDst.Schedule; 712 let isConvergent = 1; 713 let SubtargetPredicate = HasNoSdstCMPX; 714 } 715} 716} // End SubtargetPredicate = HasSdstCMPX 717 718def VOPC_I1_F16_I32 : VOPC_Class_Profile<[Write32Bit], f16>; 719def VOPC_I1_F32_I32 : VOPC_Class_Profile<[Write32Bit], f32>; 720def VOPC_I1_F64_I32 : VOPC_Class_Profile<[WriteDoubleAdd], f64>; 721 722def VOPC_F16_I32 : VOPC_Class_NoSdst_Profile<[Write32Bit], f16>; 723def VOPC_F32_I32 : VOPC_Class_NoSdst_Profile<[Write32Bit], f32>; 724def VOPC_F64_I32 : VOPC_Class_NoSdst_Profile<[Write64Bit], f64>; 725 726multiclass VOPC_CLASS_F16 <string opName> : 727 VOPC_Class_Pseudos <opName, VOPC_I1_F16_I32, 0>; 728 729multiclass VOPCX_CLASS_F16 <string opName> : 730 VOPCX_Class_Pseudos <opName, VOPC_I1_F16_I32, VOPC_F16_I32>; 731 732multiclass VOPC_CLASS_F32 <string opName> : 733 VOPC_Class_Pseudos <opName, VOPC_I1_F32_I32, 0>; 734 735multiclass VOPCX_CLASS_F32 <string opName> : 736 VOPCX_Class_Pseudos <opName, VOPC_I1_F32_I32, VOPC_F32_I32>; 737 738multiclass VOPC_CLASS_F64 <string opName> : 739 VOPC_Class_Pseudos <opName, VOPC_I1_F64_I32, 0>; 740 741multiclass VOPCX_CLASS_F64 <string opName> : 742 VOPCX_Class_Pseudos <opName, VOPC_I1_F64_I32, VOPC_F64_I32>; 743 744// cmp_class ignores the FP mode and faithfully reports the unmodified 745// source value. 746let ReadsModeReg = 0, mayRaiseFPException = 0 in { 747defm V_CMP_CLASS_F32 : VOPC_CLASS_F32 <"v_cmp_class_f32">; 748defm V_CMPX_CLASS_F32 : VOPCX_CLASS_F32 <"v_cmpx_class_f32">; 749defm V_CMP_CLASS_F64 : VOPC_CLASS_F64 <"v_cmp_class_f64">; 750defm V_CMPX_CLASS_F64 : VOPCX_CLASS_F64 <"v_cmpx_class_f64">; 751 752let SubtargetPredicate = Has16BitInsts in { 753defm V_CMP_CLASS_F16 : VOPC_CLASS_F16 <"v_cmp_class_f16">; 754defm V_CMPX_CLASS_F16 : VOPCX_CLASS_F16 <"v_cmpx_class_f16">; 755} 756} // End ReadsModeReg = 0, mayRaiseFPException = 0 757 758//===----------------------------------------------------------------------===// 759// V_ICMPIntrinsic Pattern. 760//===----------------------------------------------------------------------===// 761 762// We need to use COPY_TO_REGCLASS to w/a the problem when ReplaceAllUsesWith() 763// complaints it cannot replace i1 <-> i64/i32 if node was not morphed in place. 764multiclass ICMP_Pattern <PatFrags cond, Instruction inst, ValueType vt> { 765 let WaveSizePredicate = isWave64 in 766 def : GCNPat < 767 (i64 (AMDGPUsetcc vt:$src0, vt:$src1, cond)), 768 (i64 (COPY_TO_REGCLASS (inst $src0, $src1), SReg_64)) 769 >; 770 771 let WaveSizePredicate = isWave32 in 772 def : GCNPat < 773 (i32 (AMDGPUsetcc vt:$src0, vt:$src1, cond)), 774 (i32 (COPY_TO_REGCLASS (inst $src0, $src1), SReg_32)) 775 >; 776} 777 778defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U32_e64, i32>; 779defm : ICMP_Pattern <COND_NE, V_CMP_NE_U32_e64, i32>; 780defm : ICMP_Pattern <COND_UGT, V_CMP_GT_U32_e64, i32>; 781defm : ICMP_Pattern <COND_UGE, V_CMP_GE_U32_e64, i32>; 782defm : ICMP_Pattern <COND_ULT, V_CMP_LT_U32_e64, i32>; 783defm : ICMP_Pattern <COND_ULE, V_CMP_LE_U32_e64, i32>; 784defm : ICMP_Pattern <COND_SGT, V_CMP_GT_I32_e64, i32>; 785defm : ICMP_Pattern <COND_SGE, V_CMP_GE_I32_e64, i32>; 786defm : ICMP_Pattern <COND_SLT, V_CMP_LT_I32_e64, i32>; 787defm : ICMP_Pattern <COND_SLE, V_CMP_LE_I32_e64, i32>; 788 789defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U64_e64, i64>; 790defm : ICMP_Pattern <COND_NE, V_CMP_NE_U64_e64, i64>; 791defm : ICMP_Pattern <COND_UGT, V_CMP_GT_U64_e64, i64>; 792defm : ICMP_Pattern <COND_UGE, V_CMP_GE_U64_e64, i64>; 793defm : ICMP_Pattern <COND_ULT, V_CMP_LT_U64_e64, i64>; 794defm : ICMP_Pattern <COND_ULE, V_CMP_LE_U64_e64, i64>; 795defm : ICMP_Pattern <COND_SGT, V_CMP_GT_I64_e64, i64>; 796defm : ICMP_Pattern <COND_SGE, V_CMP_GE_I64_e64, i64>; 797defm : ICMP_Pattern <COND_SLT, V_CMP_LT_I64_e64, i64>; 798defm : ICMP_Pattern <COND_SLE, V_CMP_LE_I64_e64, i64>; 799 800defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U16_e64, i16>; 801defm : ICMP_Pattern <COND_NE, V_CMP_NE_U16_e64, i16>; 802defm : ICMP_Pattern <COND_UGT, V_CMP_GT_U16_e64, i16>; 803defm : ICMP_Pattern <COND_UGE, V_CMP_GE_U16_e64, i16>; 804defm : ICMP_Pattern <COND_ULT, V_CMP_LT_U16_e64, i16>; 805defm : ICMP_Pattern <COND_ULE, V_CMP_LE_U16_e64, i16>; 806defm : ICMP_Pattern <COND_SGT, V_CMP_GT_I16_e64, i16>; 807defm : ICMP_Pattern <COND_SGE, V_CMP_GE_I16_e64, i16>; 808defm : ICMP_Pattern <COND_SLT, V_CMP_LT_I16_e64, i16>; 809defm : ICMP_Pattern <COND_SLE, V_CMP_LE_I16_e64, i16>; 810 811multiclass FCMP_Pattern <PatFrags cond, Instruction inst, ValueType vt> { 812 let WaveSizePredicate = isWave64 in 813 def : GCNPat < 814 (i64 (AMDGPUsetcc (vt (VOP3Mods vt:$src0, i32:$src0_modifiers)), 815 (vt (VOP3Mods vt:$src1, i32:$src1_modifiers)), cond)), 816 (i64 (COPY_TO_REGCLASS (inst $src0_modifiers, $src0, $src1_modifiers, $src1, 817 DSTCLAMP.NONE), SReg_64)) 818 >; 819 820 let WaveSizePredicate = isWave32 in 821 def : GCNPat < 822 (i32 (AMDGPUsetcc (vt (VOP3Mods vt:$src0, i32:$src0_modifiers)), 823 (vt (VOP3Mods vt:$src1, i32:$src1_modifiers)), cond)), 824 (i32 (COPY_TO_REGCLASS (inst $src0_modifiers, $src0, $src1_modifiers, $src1, 825 DSTCLAMP.NONE), SReg_32)) 826 >; 827} 828 829defm : FCMP_Pattern <COND_OEQ, V_CMP_EQ_F32_e64, f32>; 830defm : FCMP_Pattern <COND_ONE, V_CMP_NEQ_F32_e64, f32>; 831defm : FCMP_Pattern <COND_OGT, V_CMP_GT_F32_e64, f32>; 832defm : FCMP_Pattern <COND_OGE, V_CMP_GE_F32_e64, f32>; 833defm : FCMP_Pattern <COND_OLT, V_CMP_LT_F32_e64, f32>; 834defm : FCMP_Pattern <COND_OLE, V_CMP_LE_F32_e64, f32>; 835 836defm : FCMP_Pattern <COND_OEQ, V_CMP_EQ_F64_e64, f64>; 837defm : FCMP_Pattern <COND_ONE, V_CMP_NEQ_F64_e64, f64>; 838defm : FCMP_Pattern <COND_OGT, V_CMP_GT_F64_e64, f64>; 839defm : FCMP_Pattern <COND_OGE, V_CMP_GE_F64_e64, f64>; 840defm : FCMP_Pattern <COND_OLT, V_CMP_LT_F64_e64, f64>; 841defm : FCMP_Pattern <COND_OLE, V_CMP_LE_F64_e64, f64>; 842 843defm : FCMP_Pattern <COND_OEQ, V_CMP_EQ_F16_e64, f16>; 844defm : FCMP_Pattern <COND_ONE, V_CMP_NEQ_F16_e64, f16>; 845defm : FCMP_Pattern <COND_OGT, V_CMP_GT_F16_e64, f16>; 846defm : FCMP_Pattern <COND_OGE, V_CMP_GE_F16_e64, f16>; 847defm : FCMP_Pattern <COND_OLT, V_CMP_LT_F16_e64, f16>; 848defm : FCMP_Pattern <COND_OLE, V_CMP_LE_F16_e64, f16>; 849 850 851defm : FCMP_Pattern <COND_UEQ, V_CMP_NLG_F32_e64, f32>; 852defm : FCMP_Pattern <COND_UNE, V_CMP_NEQ_F32_e64, f32>; 853defm : FCMP_Pattern <COND_UGT, V_CMP_NLE_F32_e64, f32>; 854defm : FCMP_Pattern <COND_UGE, V_CMP_NLT_F32_e64, f32>; 855defm : FCMP_Pattern <COND_ULT, V_CMP_NGE_F32_e64, f32>; 856defm : FCMP_Pattern <COND_ULE, V_CMP_NGT_F32_e64, f32>; 857 858defm : FCMP_Pattern <COND_UEQ, V_CMP_NLG_F64_e64, f64>; 859defm : FCMP_Pattern <COND_UNE, V_CMP_NEQ_F64_e64, f64>; 860defm : FCMP_Pattern <COND_UGT, V_CMP_NLE_F64_e64, f64>; 861defm : FCMP_Pattern <COND_UGE, V_CMP_NLT_F64_e64, f64>; 862defm : FCMP_Pattern <COND_ULT, V_CMP_NGE_F64_e64, f64>; 863defm : FCMP_Pattern <COND_ULE, V_CMP_NGT_F64_e64, f64>; 864 865defm : FCMP_Pattern <COND_UEQ, V_CMP_NLG_F16_e64, f16>; 866defm : FCMP_Pattern <COND_UNE, V_CMP_NEQ_F16_e64, f16>; 867defm : FCMP_Pattern <COND_UGT, V_CMP_NLE_F16_e64, f16>; 868defm : FCMP_Pattern <COND_UGE, V_CMP_NLT_F16_e64, f16>; 869defm : FCMP_Pattern <COND_ULT, V_CMP_NGE_F16_e64, f16>; 870defm : FCMP_Pattern <COND_ULE, V_CMP_NGT_F16_e64, f16>; 871 872//===----------------------------------------------------------------------===// 873// Target-specific instruction encodings. 874//===----------------------------------------------------------------------===// 875 876//===----------------------------------------------------------------------===// 877// GFX10. 878//===----------------------------------------------------------------------===// 879 880let AssemblerPredicate = isGFX10Plus in { 881 multiclass VOPC_Real_gfx10<bits<9> op> { 882 let DecoderNamespace = "GFX10" in { 883 def _e32_gfx10 : 884 VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_e32"), SIEncodingFamily.GFX10>, 885 VOPCe<op{7-0}>; 886 def _e64_gfx10 : 887 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.GFX10>, 888 VOP3a_gfx10<{0, op}, !cast<VOP3_Pseudo>(NAME#"_e64").Pfl> { 889 // Encoding used for VOPC instructions encoded as VOP3 differs from 890 // VOP3e by destination name (sdst) as VOPC doesn't have vector dst. 891 bits<8> sdst; 892 let Inst{7-0} = sdst; 893 } 894 } // End DecoderNamespace = "GFX10" 895 896 foreach _ = BoolToList<!cast<VOPC_Pseudo>(NAME#"_e32").Pfl.HasExtSDWA9>.ret in 897 def _sdwa_gfx10 : 898 VOP_SDWA10_Real<!cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa")>, 899 VOPC_SDWA9e<op{7-0}, !cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa").Pfl>; 900 901 defm : VOPCInstAliases<NAME, "gfx10">; 902 } 903 904 multiclass VOPCX_Real_gfx10<bits<9> op> { 905 let DecoderNamespace = "GFX10" in { 906 def _e32_gfx10 : 907 VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_nosdst_e32"), SIEncodingFamily.GFX10>, 908 VOPCe<op{7-0}> { 909 let AsmString = !subst("_nosdst", "", !cast<VOPC_Pseudo>(NAME#"_nosdst_e32").PseudoInstr) 910 # " " # !cast<VOPC_Pseudo>(NAME#"_nosdst_e32").AsmOperands; 911 } 912 913 def _e64_gfx10 : 914 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_nosdst_e64"), SIEncodingFamily.GFX10>, 915 VOP3a_gfx10<{0, op}, !cast<VOP3_Pseudo>(NAME#"_nosdst_e64").Pfl> { 916 let Inst{7-0} = ?; // sdst 917 let AsmString = !subst("_nosdst", "", !cast<VOP3_Pseudo>(NAME#"_nosdst_e64").Mnemonic) 918 # "{_e64} " # !cast<VOP3_Pseudo>(NAME#"_nosdst_e64").AsmOperands; 919 } 920 } // End DecoderNamespace = "GFX10" 921 922 foreach _ = BoolToList<!cast<VOPC_Pseudo>(NAME#"_nosdst_e32").Pfl.HasExtSDWA9>.ret in 923 def _sdwa_gfx10 : 924 VOP_SDWA10_Real<!cast<VOPC_SDWA_Pseudo>(NAME#"_nosdst_sdwa")>, 925 VOPC_SDWA9e<op{7-0}, !cast<VOPC_SDWA_Pseudo>(NAME#"_nosdst_sdwa").Pfl> { 926 let AsmString = !subst("_nosdst", "", !cast<VOPC_SDWA_Pseudo>(NAME#"_nosdst_sdwa").Mnemonic) 927 # "{_sdwa} " # !cast<VOPC_SDWA_Pseudo>(NAME#"_nosdst_sdwa").AsmOperands9; 928 } 929 930 defm : VOPCXInstAliases<NAME, "gfx10">; 931 } 932} // End AssemblerPredicate = isGFX10Plus 933 934defm V_CMP_LT_I16 : VOPC_Real_gfx10<0x089>; 935defm V_CMP_EQ_I16 : VOPC_Real_gfx10<0x08a>; 936defm V_CMP_LE_I16 : VOPC_Real_gfx10<0x08b>; 937defm V_CMP_GT_I16 : VOPC_Real_gfx10<0x08c>; 938defm V_CMP_NE_I16 : VOPC_Real_gfx10<0x08d>; 939defm V_CMP_GE_I16 : VOPC_Real_gfx10<0x08e>; 940defm V_CMP_CLASS_F16 : VOPC_Real_gfx10<0x08f>; 941defm V_CMPX_LT_I16 : VOPCX_Real_gfx10<0x099>; 942defm V_CMPX_EQ_I16 : VOPCX_Real_gfx10<0x09a>; 943defm V_CMPX_LE_I16 : VOPCX_Real_gfx10<0x09b>; 944defm V_CMPX_GT_I16 : VOPCX_Real_gfx10<0x09c>; 945defm V_CMPX_NE_I16 : VOPCX_Real_gfx10<0x09d>; 946defm V_CMPX_GE_I16 : VOPCX_Real_gfx10<0x09e>; 947defm V_CMPX_CLASS_F16 : VOPCX_Real_gfx10<0x09f>; 948defm V_CMP_LT_U16 : VOPC_Real_gfx10<0x0a9>; 949defm V_CMP_EQ_U16 : VOPC_Real_gfx10<0x0aa>; 950defm V_CMP_LE_U16 : VOPC_Real_gfx10<0x0ab>; 951defm V_CMP_GT_U16 : VOPC_Real_gfx10<0x0ac>; 952defm V_CMP_NE_U16 : VOPC_Real_gfx10<0x0ad>; 953defm V_CMP_GE_U16 : VOPC_Real_gfx10<0x0ae>; 954defm V_CMPX_LT_U16 : VOPCX_Real_gfx10<0x0b9>; 955defm V_CMPX_EQ_U16 : VOPCX_Real_gfx10<0x0ba>; 956defm V_CMPX_LE_U16 : VOPCX_Real_gfx10<0x0bb>; 957defm V_CMPX_GT_U16 : VOPCX_Real_gfx10<0x0bc>; 958defm V_CMPX_NE_U16 : VOPCX_Real_gfx10<0x0bd>; 959defm V_CMPX_GE_U16 : VOPCX_Real_gfx10<0x0be>; 960defm V_CMP_F_F16 : VOPC_Real_gfx10<0x0c8>; 961defm V_CMP_LT_F16 : VOPC_Real_gfx10<0x0c9>; 962defm V_CMP_EQ_F16 : VOPC_Real_gfx10<0x0ca>; 963defm V_CMP_LE_F16 : VOPC_Real_gfx10<0x0cb>; 964defm V_CMP_GT_F16 : VOPC_Real_gfx10<0x0cc>; 965defm V_CMP_LG_F16 : VOPC_Real_gfx10<0x0cd>; 966defm V_CMP_GE_F16 : VOPC_Real_gfx10<0x0ce>; 967defm V_CMP_O_F16 : VOPC_Real_gfx10<0x0cf>; 968defm V_CMPX_F_F16 : VOPCX_Real_gfx10<0x0d8>; 969defm V_CMPX_LT_F16 : VOPCX_Real_gfx10<0x0d9>; 970defm V_CMPX_EQ_F16 : VOPCX_Real_gfx10<0x0da>; 971defm V_CMPX_LE_F16 : VOPCX_Real_gfx10<0x0db>; 972defm V_CMPX_GT_F16 : VOPCX_Real_gfx10<0x0dc>; 973defm V_CMPX_LG_F16 : VOPCX_Real_gfx10<0x0dd>; 974defm V_CMPX_GE_F16 : VOPCX_Real_gfx10<0x0de>; 975defm V_CMPX_O_F16 : VOPCX_Real_gfx10<0x0df>; 976defm V_CMP_U_F16 : VOPC_Real_gfx10<0x0e8>; 977defm V_CMP_NGE_F16 : VOPC_Real_gfx10<0x0e9>; 978defm V_CMP_NLG_F16 : VOPC_Real_gfx10<0x0ea>; 979defm V_CMP_NGT_F16 : VOPC_Real_gfx10<0x0eb>; 980defm V_CMP_NLE_F16 : VOPC_Real_gfx10<0x0ec>; 981defm V_CMP_NEQ_F16 : VOPC_Real_gfx10<0x0ed>; 982defm V_CMP_NLT_F16 : VOPC_Real_gfx10<0x0ee>; 983defm V_CMP_TRU_F16 : VOPC_Real_gfx10<0x0ef>; 984defm V_CMPX_U_F16 : VOPCX_Real_gfx10<0x0f8>; 985defm V_CMPX_NGE_F16 : VOPCX_Real_gfx10<0x0f9>; 986defm V_CMPX_NLG_F16 : VOPCX_Real_gfx10<0x0fa>; 987defm V_CMPX_NGT_F16 : VOPCX_Real_gfx10<0x0fb>; 988defm V_CMPX_NLE_F16 : VOPCX_Real_gfx10<0x0fc>; 989defm V_CMPX_NEQ_F16 : VOPCX_Real_gfx10<0x0fd>; 990defm V_CMPX_NLT_F16 : VOPCX_Real_gfx10<0x0fe>; 991defm V_CMPX_TRU_F16 : VOPCX_Real_gfx10<0x0ff>; 992 993//===----------------------------------------------------------------------===// 994// GFX6, GFX7, GFX10. 995//===----------------------------------------------------------------------===// 996 997let AssemblerPredicate = isGFX6GFX7 in { 998 multiclass VOPC_Real_gfx6_gfx7<bits<9> op> { 999 let DecoderNamespace = "GFX6GFX7" in { 1000 def _e32_gfx6_gfx7 : 1001 VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_e32"), SIEncodingFamily.SI>, 1002 VOPCe<op{7-0}>; 1003 def _e64_gfx6_gfx7 : 1004 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.SI>, 1005 VOP3a_gfx6_gfx7<op, !cast<VOP3_Pseudo>(NAME#"_e64").Pfl> { 1006 // Encoding used for VOPC instructions encoded as VOP3 differs from 1007 // VOP3e by destination name (sdst) as VOPC doesn't have vector dst. 1008 bits<8> sdst; 1009 let Inst{7-0} = sdst; 1010 } 1011 } // End DecoderNamespace = "GFX6GFX7" 1012 1013 defm : VOPCInstAliases<NAME, "gfx6_gfx7">; 1014 } 1015} // End AssemblerPredicate = isGFX6GFX7 1016 1017multiclass VOPC_Real_gfx6_gfx7_gfx10<bits<9> op> : 1018 VOPC_Real_gfx6_gfx7<op>, VOPC_Real_gfx10<op>; 1019 1020multiclass VOPCX_Real_gfx6_gfx7<bits<9> op> : 1021 VOPC_Real_gfx6_gfx7<op>; 1022 1023multiclass VOPCX_Real_gfx6_gfx7_gfx10 <bits<9> op> : 1024 VOPC_Real_gfx6_gfx7<op>, VOPCX_Real_gfx10<op>; 1025 1026defm V_CMP_F_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x000>; 1027defm V_CMP_LT_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x001>; 1028defm V_CMP_EQ_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x002>; 1029defm V_CMP_LE_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x003>; 1030defm V_CMP_GT_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x004>; 1031defm V_CMP_LG_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x005>; 1032defm V_CMP_GE_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x006>; 1033defm V_CMP_O_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x007>; 1034defm V_CMP_U_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x008>; 1035defm V_CMP_NGE_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x009>; 1036defm V_CMP_NLG_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00a>; 1037defm V_CMP_NGT_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00b>; 1038defm V_CMP_NLE_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00c>; 1039defm V_CMP_NEQ_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00d>; 1040defm V_CMP_NLT_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00e>; 1041defm V_CMP_TRU_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x00f>; 1042defm V_CMPX_F_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x010>; 1043defm V_CMPX_LT_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x011>; 1044defm V_CMPX_EQ_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x012>; 1045defm V_CMPX_LE_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x013>; 1046defm V_CMPX_GT_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x014>; 1047defm V_CMPX_LG_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x015>; 1048defm V_CMPX_GE_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x016>; 1049defm V_CMPX_O_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x017>; 1050defm V_CMPX_U_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x018>; 1051defm V_CMPX_NGE_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x019>; 1052defm V_CMPX_NLG_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01a>; 1053defm V_CMPX_NGT_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01b>; 1054defm V_CMPX_NLE_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01c>; 1055defm V_CMPX_NEQ_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01d>; 1056defm V_CMPX_NLT_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01e>; 1057defm V_CMPX_TRU_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x01f>; 1058defm V_CMP_F_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x020>; 1059defm V_CMP_LT_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x021>; 1060defm V_CMP_EQ_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x022>; 1061defm V_CMP_LE_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x023>; 1062defm V_CMP_GT_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x024>; 1063defm V_CMP_LG_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x025>; 1064defm V_CMP_GE_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x026>; 1065defm V_CMP_O_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x027>; 1066defm V_CMP_U_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x028>; 1067defm V_CMP_NGE_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x029>; 1068defm V_CMP_NLG_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x02a>; 1069defm V_CMP_NGT_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x02b>; 1070defm V_CMP_NLE_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x02c>; 1071defm V_CMP_NEQ_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x02d>; 1072defm V_CMP_NLT_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x02e>; 1073defm V_CMP_TRU_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x02f>; 1074defm V_CMPX_F_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x030>; 1075defm V_CMPX_LT_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x031>; 1076defm V_CMPX_EQ_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x032>; 1077defm V_CMPX_LE_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x033>; 1078defm V_CMPX_GT_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x034>; 1079defm V_CMPX_LG_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x035>; 1080defm V_CMPX_GE_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x036>; 1081defm V_CMPX_O_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x037>; 1082defm V_CMPX_U_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x038>; 1083defm V_CMPX_NGE_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x039>; 1084defm V_CMPX_NLG_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03a>; 1085defm V_CMPX_NGT_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03b>; 1086defm V_CMPX_NLE_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03c>; 1087defm V_CMPX_NEQ_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03d>; 1088defm V_CMPX_NLT_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03e>; 1089defm V_CMPX_TRU_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x03f>; 1090defm V_CMPS_F_F32 : VOPC_Real_gfx6_gfx7<0x040>; 1091defm V_CMPS_LT_F32 : VOPC_Real_gfx6_gfx7<0x041>; 1092defm V_CMPS_EQ_F32 : VOPC_Real_gfx6_gfx7<0x042>; 1093defm V_CMPS_LE_F32 : VOPC_Real_gfx6_gfx7<0x043>; 1094defm V_CMPS_GT_F32 : VOPC_Real_gfx6_gfx7<0x044>; 1095defm V_CMPS_LG_F32 : VOPC_Real_gfx6_gfx7<0x045>; 1096defm V_CMPS_GE_F32 : VOPC_Real_gfx6_gfx7<0x046>; 1097defm V_CMPS_O_F32 : VOPC_Real_gfx6_gfx7<0x047>; 1098defm V_CMPS_U_F32 : VOPC_Real_gfx6_gfx7<0x048>; 1099defm V_CMPS_NGE_F32 : VOPC_Real_gfx6_gfx7<0x049>; 1100defm V_CMPS_NLG_F32 : VOPC_Real_gfx6_gfx7<0x04a>; 1101defm V_CMPS_NGT_F32 : VOPC_Real_gfx6_gfx7<0x04b>; 1102defm V_CMPS_NLE_F32 : VOPC_Real_gfx6_gfx7<0x04c>; 1103defm V_CMPS_NEQ_F32 : VOPC_Real_gfx6_gfx7<0x04d>; 1104defm V_CMPS_NLT_F32 : VOPC_Real_gfx6_gfx7<0x04e>; 1105defm V_CMPS_TRU_F32 : VOPC_Real_gfx6_gfx7<0x04f>; 1106defm V_CMPSX_F_F32 : VOPCX_Real_gfx6_gfx7<0x050>; 1107defm V_CMPSX_LT_F32 : VOPCX_Real_gfx6_gfx7<0x051>; 1108defm V_CMPSX_EQ_F32 : VOPCX_Real_gfx6_gfx7<0x052>; 1109defm V_CMPSX_LE_F32 : VOPCX_Real_gfx6_gfx7<0x053>; 1110defm V_CMPSX_GT_F32 : VOPCX_Real_gfx6_gfx7<0x054>; 1111defm V_CMPSX_LG_F32 : VOPCX_Real_gfx6_gfx7<0x055>; 1112defm V_CMPSX_GE_F32 : VOPCX_Real_gfx6_gfx7<0x056>; 1113defm V_CMPSX_O_F32 : VOPCX_Real_gfx6_gfx7<0x057>; 1114defm V_CMPSX_U_F32 : VOPCX_Real_gfx6_gfx7<0x058>; 1115defm V_CMPSX_NGE_F32 : VOPCX_Real_gfx6_gfx7<0x059>; 1116defm V_CMPSX_NLG_F32 : VOPCX_Real_gfx6_gfx7<0x05a>; 1117defm V_CMPSX_NGT_F32 : VOPCX_Real_gfx6_gfx7<0x05b>; 1118defm V_CMPSX_NLE_F32 : VOPCX_Real_gfx6_gfx7<0x05c>; 1119defm V_CMPSX_NEQ_F32 : VOPCX_Real_gfx6_gfx7<0x05d>; 1120defm V_CMPSX_NLT_F32 : VOPCX_Real_gfx6_gfx7<0x05e>; 1121defm V_CMPSX_TRU_F32 : VOPCX_Real_gfx6_gfx7<0x05f>; 1122defm V_CMPS_F_F64 : VOPC_Real_gfx6_gfx7<0x060>; 1123defm V_CMPS_LT_F64 : VOPC_Real_gfx6_gfx7<0x061>; 1124defm V_CMPS_EQ_F64 : VOPC_Real_gfx6_gfx7<0x062>; 1125defm V_CMPS_LE_F64 : VOPC_Real_gfx6_gfx7<0x063>; 1126defm V_CMPS_GT_F64 : VOPC_Real_gfx6_gfx7<0x064>; 1127defm V_CMPS_LG_F64 : VOPC_Real_gfx6_gfx7<0x065>; 1128defm V_CMPS_GE_F64 : VOPC_Real_gfx6_gfx7<0x066>; 1129defm V_CMPS_O_F64 : VOPC_Real_gfx6_gfx7<0x067>; 1130defm V_CMPS_U_F64 : VOPC_Real_gfx6_gfx7<0x068>; 1131defm V_CMPS_NGE_F64 : VOPC_Real_gfx6_gfx7<0x069>; 1132defm V_CMPS_NLG_F64 : VOPC_Real_gfx6_gfx7<0x06a>; 1133defm V_CMPS_NGT_F64 : VOPC_Real_gfx6_gfx7<0x06b>; 1134defm V_CMPS_NLE_F64 : VOPC_Real_gfx6_gfx7<0x06c>; 1135defm V_CMPS_NEQ_F64 : VOPC_Real_gfx6_gfx7<0x06d>; 1136defm V_CMPS_NLT_F64 : VOPC_Real_gfx6_gfx7<0x06e>; 1137defm V_CMPS_TRU_F64 : VOPC_Real_gfx6_gfx7<0x06f>; 1138defm V_CMPSX_F_F64 : VOPCX_Real_gfx6_gfx7<0x070>; 1139defm V_CMPSX_LT_F64 : VOPCX_Real_gfx6_gfx7<0x071>; 1140defm V_CMPSX_EQ_F64 : VOPCX_Real_gfx6_gfx7<0x072>; 1141defm V_CMPSX_LE_F64 : VOPCX_Real_gfx6_gfx7<0x073>; 1142defm V_CMPSX_GT_F64 : VOPCX_Real_gfx6_gfx7<0x074>; 1143defm V_CMPSX_LG_F64 : VOPCX_Real_gfx6_gfx7<0x075>; 1144defm V_CMPSX_GE_F64 : VOPCX_Real_gfx6_gfx7<0x076>; 1145defm V_CMPSX_O_F64 : VOPCX_Real_gfx6_gfx7<0x077>; 1146defm V_CMPSX_U_F64 : VOPCX_Real_gfx6_gfx7<0x078>; 1147defm V_CMPSX_NGE_F64 : VOPCX_Real_gfx6_gfx7<0x079>; 1148defm V_CMPSX_NLG_F64 : VOPCX_Real_gfx6_gfx7<0x07a>; 1149defm V_CMPSX_NGT_F64 : VOPCX_Real_gfx6_gfx7<0x07b>; 1150defm V_CMPSX_NLE_F64 : VOPCX_Real_gfx6_gfx7<0x07c>; 1151defm V_CMPSX_NEQ_F64 : VOPCX_Real_gfx6_gfx7<0x07d>; 1152defm V_CMPSX_NLT_F64 : VOPCX_Real_gfx6_gfx7<0x07e>; 1153defm V_CMPSX_TRU_F64 : VOPCX_Real_gfx6_gfx7<0x07f>; 1154defm V_CMP_F_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x080>; 1155defm V_CMP_LT_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x081>; 1156defm V_CMP_EQ_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x082>; 1157defm V_CMP_LE_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x083>; 1158defm V_CMP_GT_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x084>; 1159defm V_CMP_NE_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x085>; 1160defm V_CMP_GE_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x086>; 1161defm V_CMP_T_I32 : VOPC_Real_gfx6_gfx7_gfx10<0x087>; 1162defm V_CMP_CLASS_F32 : VOPC_Real_gfx6_gfx7_gfx10<0x088>; 1163defm V_CMPX_F_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x090>; 1164defm V_CMPX_LT_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x091>; 1165defm V_CMPX_EQ_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x092>; 1166defm V_CMPX_LE_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x093>; 1167defm V_CMPX_GT_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x094>; 1168defm V_CMPX_NE_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x095>; 1169defm V_CMPX_GE_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x096>; 1170defm V_CMPX_T_I32 : VOPCX_Real_gfx6_gfx7_gfx10<0x097>; 1171defm V_CMPX_CLASS_F32 : VOPCX_Real_gfx6_gfx7_gfx10<0x098>; 1172defm V_CMP_F_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a0>; 1173defm V_CMP_LT_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a1>; 1174defm V_CMP_EQ_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a2>; 1175defm V_CMP_LE_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a3>; 1176defm V_CMP_GT_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a4>; 1177defm V_CMP_NE_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a5>; 1178defm V_CMP_GE_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a6>; 1179defm V_CMP_T_I64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a7>; 1180defm V_CMP_CLASS_F64 : VOPC_Real_gfx6_gfx7_gfx10<0x0a8>; 1181defm V_CMPX_F_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b0>; 1182defm V_CMPX_LT_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b1>; 1183defm V_CMPX_EQ_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b2>; 1184defm V_CMPX_LE_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b3>; 1185defm V_CMPX_GT_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b4>; 1186defm V_CMPX_NE_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b5>; 1187defm V_CMPX_GE_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b6>; 1188defm V_CMPX_T_I64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b7>; 1189defm V_CMPX_CLASS_F64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0b8>; 1190defm V_CMP_F_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c0>; 1191defm V_CMP_LT_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c1>; 1192defm V_CMP_EQ_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c2>; 1193defm V_CMP_LE_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c3>; 1194defm V_CMP_GT_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c4>; 1195defm V_CMP_NE_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c5>; 1196defm V_CMP_GE_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c6>; 1197defm V_CMP_T_U32 : VOPC_Real_gfx6_gfx7_gfx10<0x0c7>; 1198defm V_CMPX_F_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d0>; 1199defm V_CMPX_LT_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d1>; 1200defm V_CMPX_EQ_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d2>; 1201defm V_CMPX_LE_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d3>; 1202defm V_CMPX_GT_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d4>; 1203defm V_CMPX_NE_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d5>; 1204defm V_CMPX_GE_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d6>; 1205defm V_CMPX_T_U32 : VOPCX_Real_gfx6_gfx7_gfx10<0x0d7>; 1206defm V_CMP_F_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e0>; 1207defm V_CMP_LT_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e1>; 1208defm V_CMP_EQ_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e2>; 1209defm V_CMP_LE_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e3>; 1210defm V_CMP_GT_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e4>; 1211defm V_CMP_NE_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e5>; 1212defm V_CMP_GE_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e6>; 1213defm V_CMP_T_U64 : VOPC_Real_gfx6_gfx7_gfx10<0x0e7>; 1214defm V_CMPX_F_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f0>; 1215defm V_CMPX_LT_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f1>; 1216defm V_CMPX_EQ_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f2>; 1217defm V_CMPX_LE_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f3>; 1218defm V_CMPX_GT_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f4>; 1219defm V_CMPX_NE_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f5>; 1220defm V_CMPX_GE_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f6>; 1221defm V_CMPX_T_U64 : VOPCX_Real_gfx6_gfx7_gfx10<0x0f7>; 1222 1223//===----------------------------------------------------------------------===// 1224// GFX8, GFX9 (VI). 1225//===----------------------------------------------------------------------===// 1226 1227multiclass VOPC_Real_vi <bits<10> op> { 1228 let AssemblerPredicate = isGFX8GFX9, DecoderNamespace = "GFX8" in { 1229 def _e32_vi : 1230 VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_e32"), SIEncodingFamily.VI>, 1231 VOPCe<op{7-0}>; 1232 1233 def _e64_vi : 1234 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.VI>, 1235 VOP3a_vi <op, !cast<VOP3_Pseudo>(NAME#"_e64").Pfl> { 1236 // Encoding used for VOPC instructions encoded as VOP3 1237 // Differs from VOP3e by destination name (sdst) as VOPC doesn't have vector dst 1238 bits<8> sdst; 1239 let Inst{7-0} = sdst; 1240 } 1241 } 1242 1243 foreach _ = BoolToList<!cast<VOPC_Pseudo>(NAME#"_e32").Pfl.HasExtSDWA>.ret in 1244 def _sdwa_vi : 1245 VOP_SDWA_Real <!cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa")>, 1246 VOPC_SDWAe <op{7-0}, !cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa").Pfl>; 1247 1248 foreach _ = BoolToList<!cast<VOPC_Pseudo>(NAME#"_e32").Pfl.HasExtSDWA9>.ret in 1249 def _sdwa_gfx9 : 1250 VOP_SDWA9_Real <!cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa")>, 1251 VOPC_SDWA9e <op{7-0}, !cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa").Pfl>; 1252 1253 let AssemblerPredicate = isGFX8GFX9 in { 1254 defm : VOPCInstAliases<NAME, "vi">; 1255 } 1256} 1257 1258defm V_CMP_CLASS_F32 : VOPC_Real_vi <0x10>; 1259defm V_CMPX_CLASS_F32 : VOPC_Real_vi <0x11>; 1260defm V_CMP_CLASS_F64 : VOPC_Real_vi <0x12>; 1261defm V_CMPX_CLASS_F64 : VOPC_Real_vi <0x13>; 1262defm V_CMP_CLASS_F16 : VOPC_Real_vi <0x14>; 1263defm V_CMPX_CLASS_F16 : VOPC_Real_vi <0x15>; 1264 1265defm V_CMP_F_F16 : VOPC_Real_vi <0x20>; 1266defm V_CMP_LT_F16 : VOPC_Real_vi <0x21>; 1267defm V_CMP_EQ_F16 : VOPC_Real_vi <0x22>; 1268defm V_CMP_LE_F16 : VOPC_Real_vi <0x23>; 1269defm V_CMP_GT_F16 : VOPC_Real_vi <0x24>; 1270defm V_CMP_LG_F16 : VOPC_Real_vi <0x25>; 1271defm V_CMP_GE_F16 : VOPC_Real_vi <0x26>; 1272defm V_CMP_O_F16 : VOPC_Real_vi <0x27>; 1273defm V_CMP_U_F16 : VOPC_Real_vi <0x28>; 1274defm V_CMP_NGE_F16 : VOPC_Real_vi <0x29>; 1275defm V_CMP_NLG_F16 : VOPC_Real_vi <0x2a>; 1276defm V_CMP_NGT_F16 : VOPC_Real_vi <0x2b>; 1277defm V_CMP_NLE_F16 : VOPC_Real_vi <0x2c>; 1278defm V_CMP_NEQ_F16 : VOPC_Real_vi <0x2d>; 1279defm V_CMP_NLT_F16 : VOPC_Real_vi <0x2e>; 1280defm V_CMP_TRU_F16 : VOPC_Real_vi <0x2f>; 1281 1282defm V_CMPX_F_F16 : VOPC_Real_vi <0x30>; 1283defm V_CMPX_LT_F16 : VOPC_Real_vi <0x31>; 1284defm V_CMPX_EQ_F16 : VOPC_Real_vi <0x32>; 1285defm V_CMPX_LE_F16 : VOPC_Real_vi <0x33>; 1286defm V_CMPX_GT_F16 : VOPC_Real_vi <0x34>; 1287defm V_CMPX_LG_F16 : VOPC_Real_vi <0x35>; 1288defm V_CMPX_GE_F16 : VOPC_Real_vi <0x36>; 1289defm V_CMPX_O_F16 : VOPC_Real_vi <0x37>; 1290defm V_CMPX_U_F16 : VOPC_Real_vi <0x38>; 1291defm V_CMPX_NGE_F16 : VOPC_Real_vi <0x39>; 1292defm V_CMPX_NLG_F16 : VOPC_Real_vi <0x3a>; 1293defm V_CMPX_NGT_F16 : VOPC_Real_vi <0x3b>; 1294defm V_CMPX_NLE_F16 : VOPC_Real_vi <0x3c>; 1295defm V_CMPX_NEQ_F16 : VOPC_Real_vi <0x3d>; 1296defm V_CMPX_NLT_F16 : VOPC_Real_vi <0x3e>; 1297defm V_CMPX_TRU_F16 : VOPC_Real_vi <0x3f>; 1298 1299defm V_CMP_F_F32 : VOPC_Real_vi <0x40>; 1300defm V_CMP_LT_F32 : VOPC_Real_vi <0x41>; 1301defm V_CMP_EQ_F32 : VOPC_Real_vi <0x42>; 1302defm V_CMP_LE_F32 : VOPC_Real_vi <0x43>; 1303defm V_CMP_GT_F32 : VOPC_Real_vi <0x44>; 1304defm V_CMP_LG_F32 : VOPC_Real_vi <0x45>; 1305defm V_CMP_GE_F32 : VOPC_Real_vi <0x46>; 1306defm V_CMP_O_F32 : VOPC_Real_vi <0x47>; 1307defm V_CMP_U_F32 : VOPC_Real_vi <0x48>; 1308defm V_CMP_NGE_F32 : VOPC_Real_vi <0x49>; 1309defm V_CMP_NLG_F32 : VOPC_Real_vi <0x4a>; 1310defm V_CMP_NGT_F32 : VOPC_Real_vi <0x4b>; 1311defm V_CMP_NLE_F32 : VOPC_Real_vi <0x4c>; 1312defm V_CMP_NEQ_F32 : VOPC_Real_vi <0x4d>; 1313defm V_CMP_NLT_F32 : VOPC_Real_vi <0x4e>; 1314defm V_CMP_TRU_F32 : VOPC_Real_vi <0x4f>; 1315 1316defm V_CMPX_F_F32 : VOPC_Real_vi <0x50>; 1317defm V_CMPX_LT_F32 : VOPC_Real_vi <0x51>; 1318defm V_CMPX_EQ_F32 : VOPC_Real_vi <0x52>; 1319defm V_CMPX_LE_F32 : VOPC_Real_vi <0x53>; 1320defm V_CMPX_GT_F32 : VOPC_Real_vi <0x54>; 1321defm V_CMPX_LG_F32 : VOPC_Real_vi <0x55>; 1322defm V_CMPX_GE_F32 : VOPC_Real_vi <0x56>; 1323defm V_CMPX_O_F32 : VOPC_Real_vi <0x57>; 1324defm V_CMPX_U_F32 : VOPC_Real_vi <0x58>; 1325defm V_CMPX_NGE_F32 : VOPC_Real_vi <0x59>; 1326defm V_CMPX_NLG_F32 : VOPC_Real_vi <0x5a>; 1327defm V_CMPX_NGT_F32 : VOPC_Real_vi <0x5b>; 1328defm V_CMPX_NLE_F32 : VOPC_Real_vi <0x5c>; 1329defm V_CMPX_NEQ_F32 : VOPC_Real_vi <0x5d>; 1330defm V_CMPX_NLT_F32 : VOPC_Real_vi <0x5e>; 1331defm V_CMPX_TRU_F32 : VOPC_Real_vi <0x5f>; 1332 1333defm V_CMP_F_F64 : VOPC_Real_vi <0x60>; 1334defm V_CMP_LT_F64 : VOPC_Real_vi <0x61>; 1335defm V_CMP_EQ_F64 : VOPC_Real_vi <0x62>; 1336defm V_CMP_LE_F64 : VOPC_Real_vi <0x63>; 1337defm V_CMP_GT_F64 : VOPC_Real_vi <0x64>; 1338defm V_CMP_LG_F64 : VOPC_Real_vi <0x65>; 1339defm V_CMP_GE_F64 : VOPC_Real_vi <0x66>; 1340defm V_CMP_O_F64 : VOPC_Real_vi <0x67>; 1341defm V_CMP_U_F64 : VOPC_Real_vi <0x68>; 1342defm V_CMP_NGE_F64 : VOPC_Real_vi <0x69>; 1343defm V_CMP_NLG_F64 : VOPC_Real_vi <0x6a>; 1344defm V_CMP_NGT_F64 : VOPC_Real_vi <0x6b>; 1345defm V_CMP_NLE_F64 : VOPC_Real_vi <0x6c>; 1346defm V_CMP_NEQ_F64 : VOPC_Real_vi <0x6d>; 1347defm V_CMP_NLT_F64 : VOPC_Real_vi <0x6e>; 1348defm V_CMP_TRU_F64 : VOPC_Real_vi <0x6f>; 1349 1350defm V_CMPX_F_F64 : VOPC_Real_vi <0x70>; 1351defm V_CMPX_LT_F64 : VOPC_Real_vi <0x71>; 1352defm V_CMPX_EQ_F64 : VOPC_Real_vi <0x72>; 1353defm V_CMPX_LE_F64 : VOPC_Real_vi <0x73>; 1354defm V_CMPX_GT_F64 : VOPC_Real_vi <0x74>; 1355defm V_CMPX_LG_F64 : VOPC_Real_vi <0x75>; 1356defm V_CMPX_GE_F64 : VOPC_Real_vi <0x76>; 1357defm V_CMPX_O_F64 : VOPC_Real_vi <0x77>; 1358defm V_CMPX_U_F64 : VOPC_Real_vi <0x78>; 1359defm V_CMPX_NGE_F64 : VOPC_Real_vi <0x79>; 1360defm V_CMPX_NLG_F64 : VOPC_Real_vi <0x7a>; 1361defm V_CMPX_NGT_F64 : VOPC_Real_vi <0x7b>; 1362defm V_CMPX_NLE_F64 : VOPC_Real_vi <0x7c>; 1363defm V_CMPX_NEQ_F64 : VOPC_Real_vi <0x7d>; 1364defm V_CMPX_NLT_F64 : VOPC_Real_vi <0x7e>; 1365defm V_CMPX_TRU_F64 : VOPC_Real_vi <0x7f>; 1366 1367defm V_CMP_F_I16 : VOPC_Real_vi <0xa0>; 1368defm V_CMP_LT_I16 : VOPC_Real_vi <0xa1>; 1369defm V_CMP_EQ_I16 : VOPC_Real_vi <0xa2>; 1370defm V_CMP_LE_I16 : VOPC_Real_vi <0xa3>; 1371defm V_CMP_GT_I16 : VOPC_Real_vi <0xa4>; 1372defm V_CMP_NE_I16 : VOPC_Real_vi <0xa5>; 1373defm V_CMP_GE_I16 : VOPC_Real_vi <0xa6>; 1374defm V_CMP_T_I16 : VOPC_Real_vi <0xa7>; 1375 1376defm V_CMP_F_U16 : VOPC_Real_vi <0xa8>; 1377defm V_CMP_LT_U16 : VOPC_Real_vi <0xa9>; 1378defm V_CMP_EQ_U16 : VOPC_Real_vi <0xaa>; 1379defm V_CMP_LE_U16 : VOPC_Real_vi <0xab>; 1380defm V_CMP_GT_U16 : VOPC_Real_vi <0xac>; 1381defm V_CMP_NE_U16 : VOPC_Real_vi <0xad>; 1382defm V_CMP_GE_U16 : VOPC_Real_vi <0xae>; 1383defm V_CMP_T_U16 : VOPC_Real_vi <0xaf>; 1384 1385defm V_CMPX_F_I16 : VOPC_Real_vi <0xb0>; 1386defm V_CMPX_LT_I16 : VOPC_Real_vi <0xb1>; 1387defm V_CMPX_EQ_I16 : VOPC_Real_vi <0xb2>; 1388defm V_CMPX_LE_I16 : VOPC_Real_vi <0xb3>; 1389defm V_CMPX_GT_I16 : VOPC_Real_vi <0xb4>; 1390defm V_CMPX_NE_I16 : VOPC_Real_vi <0xb5>; 1391defm V_CMPX_GE_I16 : VOPC_Real_vi <0xb6>; 1392defm V_CMPX_T_I16 : VOPC_Real_vi <0xb7>; 1393 1394defm V_CMPX_F_U16 : VOPC_Real_vi <0xb8>; 1395defm V_CMPX_LT_U16 : VOPC_Real_vi <0xb9>; 1396defm V_CMPX_EQ_U16 : VOPC_Real_vi <0xba>; 1397defm V_CMPX_LE_U16 : VOPC_Real_vi <0xbb>; 1398defm V_CMPX_GT_U16 : VOPC_Real_vi <0xbc>; 1399defm V_CMPX_NE_U16 : VOPC_Real_vi <0xbd>; 1400defm V_CMPX_GE_U16 : VOPC_Real_vi <0xbe>; 1401defm V_CMPX_T_U16 : VOPC_Real_vi <0xbf>; 1402 1403defm V_CMP_F_I32 : VOPC_Real_vi <0xc0>; 1404defm V_CMP_LT_I32 : VOPC_Real_vi <0xc1>; 1405defm V_CMP_EQ_I32 : VOPC_Real_vi <0xc2>; 1406defm V_CMP_LE_I32 : VOPC_Real_vi <0xc3>; 1407defm V_CMP_GT_I32 : VOPC_Real_vi <0xc4>; 1408defm V_CMP_NE_I32 : VOPC_Real_vi <0xc5>; 1409defm V_CMP_GE_I32 : VOPC_Real_vi <0xc6>; 1410defm V_CMP_T_I32 : VOPC_Real_vi <0xc7>; 1411 1412defm V_CMPX_F_I32 : VOPC_Real_vi <0xd0>; 1413defm V_CMPX_LT_I32 : VOPC_Real_vi <0xd1>; 1414defm V_CMPX_EQ_I32 : VOPC_Real_vi <0xd2>; 1415defm V_CMPX_LE_I32 : VOPC_Real_vi <0xd3>; 1416defm V_CMPX_GT_I32 : VOPC_Real_vi <0xd4>; 1417defm V_CMPX_NE_I32 : VOPC_Real_vi <0xd5>; 1418defm V_CMPX_GE_I32 : VOPC_Real_vi <0xd6>; 1419defm V_CMPX_T_I32 : VOPC_Real_vi <0xd7>; 1420 1421defm V_CMP_F_I64 : VOPC_Real_vi <0xe0>; 1422defm V_CMP_LT_I64 : VOPC_Real_vi <0xe1>; 1423defm V_CMP_EQ_I64 : VOPC_Real_vi <0xe2>; 1424defm V_CMP_LE_I64 : VOPC_Real_vi <0xe3>; 1425defm V_CMP_GT_I64 : VOPC_Real_vi <0xe4>; 1426defm V_CMP_NE_I64 : VOPC_Real_vi <0xe5>; 1427defm V_CMP_GE_I64 : VOPC_Real_vi <0xe6>; 1428defm V_CMP_T_I64 : VOPC_Real_vi <0xe7>; 1429 1430defm V_CMPX_F_I64 : VOPC_Real_vi <0xf0>; 1431defm V_CMPX_LT_I64 : VOPC_Real_vi <0xf1>; 1432defm V_CMPX_EQ_I64 : VOPC_Real_vi <0xf2>; 1433defm V_CMPX_LE_I64 : VOPC_Real_vi <0xf3>; 1434defm V_CMPX_GT_I64 : VOPC_Real_vi <0xf4>; 1435defm V_CMPX_NE_I64 : VOPC_Real_vi <0xf5>; 1436defm V_CMPX_GE_I64 : VOPC_Real_vi <0xf6>; 1437defm V_CMPX_T_I64 : VOPC_Real_vi <0xf7>; 1438 1439defm V_CMP_F_U32 : VOPC_Real_vi <0xc8>; 1440defm V_CMP_LT_U32 : VOPC_Real_vi <0xc9>; 1441defm V_CMP_EQ_U32 : VOPC_Real_vi <0xca>; 1442defm V_CMP_LE_U32 : VOPC_Real_vi <0xcb>; 1443defm V_CMP_GT_U32 : VOPC_Real_vi <0xcc>; 1444defm V_CMP_NE_U32 : VOPC_Real_vi <0xcd>; 1445defm V_CMP_GE_U32 : VOPC_Real_vi <0xce>; 1446defm V_CMP_T_U32 : VOPC_Real_vi <0xcf>; 1447 1448defm V_CMPX_F_U32 : VOPC_Real_vi <0xd8>; 1449defm V_CMPX_LT_U32 : VOPC_Real_vi <0xd9>; 1450defm V_CMPX_EQ_U32 : VOPC_Real_vi <0xda>; 1451defm V_CMPX_LE_U32 : VOPC_Real_vi <0xdb>; 1452defm V_CMPX_GT_U32 : VOPC_Real_vi <0xdc>; 1453defm V_CMPX_NE_U32 : VOPC_Real_vi <0xdd>; 1454defm V_CMPX_GE_U32 : VOPC_Real_vi <0xde>; 1455defm V_CMPX_T_U32 : VOPC_Real_vi <0xdf>; 1456 1457defm V_CMP_F_U64 : VOPC_Real_vi <0xe8>; 1458defm V_CMP_LT_U64 : VOPC_Real_vi <0xe9>; 1459defm V_CMP_EQ_U64 : VOPC_Real_vi <0xea>; 1460defm V_CMP_LE_U64 : VOPC_Real_vi <0xeb>; 1461defm V_CMP_GT_U64 : VOPC_Real_vi <0xec>; 1462defm V_CMP_NE_U64 : VOPC_Real_vi <0xed>; 1463defm V_CMP_GE_U64 : VOPC_Real_vi <0xee>; 1464defm V_CMP_T_U64 : VOPC_Real_vi <0xef>; 1465 1466defm V_CMPX_F_U64 : VOPC_Real_vi <0xf8>; 1467defm V_CMPX_LT_U64 : VOPC_Real_vi <0xf9>; 1468defm V_CMPX_EQ_U64 : VOPC_Real_vi <0xfa>; 1469defm V_CMPX_LE_U64 : VOPC_Real_vi <0xfb>; 1470defm V_CMPX_GT_U64 : VOPC_Real_vi <0xfc>; 1471defm V_CMPX_NE_U64 : VOPC_Real_vi <0xfd>; 1472defm V_CMPX_GE_U64 : VOPC_Real_vi <0xfe>; 1473defm V_CMPX_T_U64 : VOPC_Real_vi <0xff>; 1474